From 87e2ee5eb02e0daf3251220e719a7844845dc4e1 Mon Sep 17 00:00:00 2001 From: Eebit Date: Sat, 17 Aug 2024 21:43:52 -0400 Subject: [PATCH 1/2] (spline) Some progress --- asm/spline.s | 826 -------------------------------------------------- ldscript.txt | 2 + src/spline.c | 297 ++++++++++++++++++ src/spline_.c | 98 ++++++ 4 files changed, 397 insertions(+), 826 deletions(-) create mode 100644 src/spline.c create mode 100644 src/spline_.c diff --git a/asm/spline.s b/asm/spline.s index 63e947d5..4919336c 100644 --- a/asm/spline.s +++ b/asm/spline.s @@ -2,671 +2,6 @@ .SYNTAX UNIFIED - THUMB_FUNC_START sub_800A42C -sub_800A42C: @ 0x0800A42C - push {r4, r5, r6, r7, lr} - mov r7, r8 - push {r7} - adds r7, r0, #0 - adds r5, r1, #0 - adds r4, r2, #0 - adds r6, r5, r4 - cmp r6, #0 - beq _0800A4DE - movs r0, #0x80 - lsls r0, r0, #5 - mov r8, r0 - cmp r6, r8 - ble _0800A45C - lsls r1, r5, #0xc - adds r0, r6, #0 - bl DivArm - adds r5, r0, #0 - lsls r1, r4, #0xc - adds r0, r6, #0 - bl DivArm - adds r4, r0, #0 -_0800A45C: - movs r0, #0x80 - lsls r0, r0, #6 - subs r0, r0, r4 - subs r0, r0, r5 - movs r1, #0x80 - lsls r1, r1, #0x11 - bl DivArm - adds r6, r0, #0 - cmp r7, r5 - bge _0800A496 - cmp r5, #0 - bne _0800A478 - movs r5, #1 -_0800A478: - lsls r1, r6, #0xc - adds r0, r5, #0 - bl DivArm - adds r1, r0, #0 - muls r1, r7, r1 - mov r0, r8 - bl DivArm - adds r1, r0, #0 - muls r1, r7, r1 - mov r0, r8 - bl DivArm - b _0800A4DE -_0800A496: - mov r1, r8 - subs r0, r1, r4 - cmp r7, r0 - bge _0800A4B4 - lsls r1, r7, #0xd - mov r0, r8 - bl DivArm - subs r0, r0, r5 - adds r1, r6, #0 - muls r1, r0, r1 - mov r0, r8 - bl DivArm - b _0800A4DE -_0800A4B4: - mov r0, r8 - subs r7, r0, r7 - cmp r4, #0 - bne _0800A4BE - movs r4, #1 -_0800A4BE: - lsls r1, r6, #0xc - adds r0, r4, #0 - bl DivArm - adds r1, r0, #0 - muls r1, r7, r1 - mov r0, r8 - bl DivArm - adds r1, r0, #0 - muls r1, r7, r1 - mov r0, r8 - bl DivArm - mov r1, r8 - subs r0, r1, r0 -_0800A4DE: - pop {r3} - mov r8, r3 - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800A42C - - THUMB_FUNC_START sub_800A4E8 -sub_800A4E8: @ 0x0800A4E8 - ldrh r2, [r0] - strh r2, [r1] - ldrh r2, [r0, #2] - strh r2, [r1, #4] - ldr r2, [r0, #4] - str r2, [r1, #0xc] - ldr r2, [r0, #8] - str r2, [r1, #0x18] - adds r0, #0xc - ldrh r2, [r0, #2] - strh r2, [r1, #2] - ldr r2, [r0, #4] - str r2, [r1, #8] - ldr r2, [r0, #8] - str r2, [r1, #0x14] - adds r0, #0xc - ldrh r2, [r0, #2] - strh r2, [r1, #6] - ldr r2, [r0, #4] - str r2, [r1, #0x10] - ldr r0, [r0, #8] - str r0, [r1, #0x1c] - bx lr - - THUMB_FUNC_END sub_800A4E8 - - THUMB_FUNC_START sub_800A518 -sub_800A518: @ 0x0800A518 - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0x20 - str r1, [sp] - str r2, [sp, #4] - movs r2, #0 - ldrsh r1, [r0, r2] - str r1, [sp, #0x14] - ldr r1, [r0, #0x14] - movs r4, #2 - ldrsh r5, [r0, r4] - movs r7, #4 - ldrsh r3, [r0, r7] - movs r4, #6 - ldrsh r2, [r0, r4] - ldr r7, [r0, #8] - str r7, [sp, #0x18] - ldr r4, [r0, #0xc] - str r4, [sp, #0x1c] - ldr r0, [r0, #0x10] - mov r9, r0 - movs r7, #0 - ldrsh r0, [r1, r7] - movs r6, #0x80 - lsls r6, r6, #5 - subs r4, r6, r0 - movs r7, #2 - ldrsh r0, [r1, r7] - mov r8, r0 - movs r0, #4 - ldrsh r7, [r1, r0] - cmp r2, r5 - beq _0800A564 - cmp r2, r3 - bne _0800A56A -_0800A564: - movs r1, #0 - str r1, [sp, #0x10] - b _0800A580 -_0800A56A: - subs r0, r2, r3 - subs r1, r5, r3 - lsls r1, r1, #0xc - bl DivArm - adds r1, r0, #0 - lsls r1, r1, #0xd - adds r0, r6, #0 - bl DivArm - str r0, [sp, #0x10] -_0800A580: - adds r5, r7, #0 - cmp r7, #0 - bge _0800A588 - negs r5, r7 -_0800A588: - movs r6, #0x80 - lsls r6, r6, #5 - ldr r2, [sp, #0x10] - adds r1, r5, #0 - muls r1, r2, r1 - adds r0, r6, #0 - bl DivArm - ldr r2, [sp, #0x10] - adds r1, r2, r5 - subs r1, r1, r0 - str r1, [sp, #0x10] - subs r0, r6, r7 - adds r1, r4, #0 - muls r1, r0, r1 - adds r0, r6, #0 - bl DivArm - mov r2, r8 - adds r1, r2, r6 - muls r1, r0, r1 - adds r0, r6, #0 - bl DivArm - adds r1, r0, #0 - lsls r1, r1, #0xb - adds r0, r6, #0 - bl DivArm - str r0, [sp, #8] - adds r0, r7, r6 - adds r1, r4, #0 - muls r1, r0, r1 - adds r0, r6, #0 - bl DivArm - mov r4, r8 - subs r1, r6, r4 - muls r1, r0, r1 - adds r0, r6, #0 - bl DivArm - adds r1, r0, #0 - lsls r1, r1, #0xb - adds r0, r6, #0 - bl DivArm - str r0, [sp, #0xc] - ldr r7, [sp, #0x14] - cmp r7, #0 - ble _0800A66E - mov sl, r9 - ldr r0, [sp, #0x1c] - mov r9, r0 - ldr r7, [sp, #0x18] - ldr r1, [sp, #0x14] - mov r8, r1 -_0800A5FA: - ldr r1, [r7] - mov r2, r9 - ldr r0, [r2] - subs r6, r1, r0 - mov r0, sl - ldr r4, [r0] - subs r4, r4, r1 - ldr r2, [sp, #8] - adds r1, r2, #0 - muls r1, r6, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r5, r0, #0 - ldr r0, [sp, #0xc] - adds r1, r0, #0 - muls r1, r4, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r5, r5, r0 - ldr r2, [sp, #0x10] - adds r1, r2, #0 - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - ldr r4, [sp] - str r0, [r4] - ldr r0, [sp, #4] - cmp r0, #2 - bne _0800A654 - ldr r1, [sp, #8] - ldr r2, [sp, #0xc] - adds r0, r1, r2 - adds r1, r0, #0 - muls r1, r6, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - str r0, [r4] -_0800A654: - ldr r4, [sp] - adds r4, #4 - str r4, [sp] - movs r0, #4 - add sl, r0 - add r9, r0 - adds r7, #4 - movs r1, #1 - negs r1, r1 - add r8, r1 - mov r2, r8 - cmp r2, #0 - bne _0800A5FA -_0800A66E: - add sp, #0x20 - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r0} - bx r0 - - THUMB_FUNC_END sub_800A518 - - THUMB_FUNC_START sub_800A680 -sub_800A680: @ 0x0800A680 - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0x1c - mov sl, r1 - str r2, [sp] - movs r2, #0 - ldrsh r1, [r0, r2] - str r1, [sp, #0x10] - ldr r1, [r0, #0x14] - movs r3, #2 - ldrsh r4, [r0, r3] - movs r5, #4 - ldrsh r3, [r0, r5] - movs r6, #6 - ldrsh r2, [r0, r6] - ldr r5, [r0, #8] - str r5, [sp, #0x14] - ldr r6, [r0, #0xc] - str r6, [sp, #0x18] - ldr r0, [r0, #0x10] - mov r9, r0 - movs r5, #0 - ldrsh r0, [r1, r5] - movs r5, #0x80 - lsls r5, r5, #5 - subs r7, r5, r0 - movs r0, #2 - ldrsh r6, [r1, r0] - mov r8, r6 - movs r0, #4 - ldrsh r6, [r1, r0] - cmp r2, r4 - beq _0800A6CC - cmp r2, r3 - bne _0800A6D2 -_0800A6CC: - movs r1, #0 - str r1, [sp, #0xc] - b _0800A6E8 -_0800A6D2: - subs r0, r2, r3 - subs r1, r2, r4 - lsls r1, r1, #0xc - bl DivArm - adds r1, r0, #0 - lsls r1, r1, #0xd - adds r0, r5, #0 - bl DivArm - str r0, [sp, #0xc] -_0800A6E8: - adds r4, r6, #0 - cmp r6, #0 - bge _0800A6F0 - negs r4, r6 -_0800A6F0: - movs r5, #0x80 - lsls r5, r5, #5 - ldr r2, [sp, #0xc] - adds r1, r4, #0 - muls r1, r2, r1 - adds r0, r5, #0 - bl DivArm - ldr r3, [sp, #0xc] - adds r1, r3, r4 - subs r1, r1, r0 - str r1, [sp, #0xc] - adds r0, r6, r5 - adds r1, r7, #0 - muls r1, r0, r1 - adds r0, r5, #0 - bl DivArm - mov r2, r8 - adds r1, r2, r5 - muls r1, r0, r1 - adds r0, r5, #0 - bl DivArm - adds r1, r0, #0 - lsls r1, r1, #0xb - adds r0, r5, #0 - bl DivArm - str r0, [sp, #4] - subs r0, r5, r6 - adds r1, r7, #0 - muls r1, r0, r1 - adds r0, r5, #0 - bl DivArm - mov r3, r8 - subs r1, r5, r3 - muls r1, r0, r1 - adds r0, r5, #0 - bl DivArm - adds r1, r0, #0 - lsls r1, r1, #0xb - adds r0, r5, #0 - bl DivArm - str r0, [sp, #8] - ldr r6, [sp, #0x10] - cmp r6, #0 - ble _0800A7C8 - ldr r0, [sp, #0x18] - mov r8, r0 - ldr r6, [sp, #0x14] - ldr r7, [sp, #0x10] -_0800A75E: - ldr r2, [r6] - mov r3, r8 - ldr r1, [r3] - subs r1, r2, r1 - mov r5, r9 - ldr r0, [r5] - subs r5, r0, r2 - ldr r0, [sp, #4] - muls r1, r0, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r4, r0, #0 - ldr r2, [sp, #8] - adds r1, r2, #0 - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r4, r4, r0 - ldr r3, [sp, #0xc] - adds r1, r3, #0 - muls r1, r4, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov r1, sl - str r0, [r1] - ldr r2, [sp] - cmp r2, #1 - bne _0800A7B8 - ldr r3, [sp, #4] - ldr r1, [sp, #8] - adds r0, r3, r1 - adds r1, r0, #0 - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov r2, sl - str r0, [r2] -_0800A7B8: - movs r3, #4 - add sl, r3 - add r9, r3 - add r8, r3 - adds r6, #4 - subs r7, #1 - cmp r7, #0 - bne _0800A75E -_0800A7C8: - add sp, #0x1c - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r0} - bx r0 - - THUMB_FUNC_END sub_800A680 - - THUMB_FUNC_START sub_800A7D8 -sub_800A7D8: @ 0x0800A7D8 - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0x50 - adds r4, r0, #0 - adds r7, r1, #0 - adds r6, r2, #0 - movs r1, #0 - ldrsh r0, [r4, r1] - str r0, [sp, #0x44] - ldr r0, [r4, #0x10] - mov r8, r0 - ldr r1, [r4, #0x1c] - mov r9, r1 - adds r0, r4, #0 - mov r1, sp - bl sub_800A4E8 - add r5, sp, #0x34 - mov r0, sp - adds r1, r5, #0 - adds r2, r6, #0 - bl sub_800A680 - adds r4, #0xc - adds r0, r4, #0 - mov r1, sp - bl sub_800A4E8 - add r4, sp, #0x24 - mov r0, sp - adds r1, r4, #0 - adds r2, r6, #0 - bl sub_800A518 - mov sl, r8 - str r5, [sp, #0x48] - str r4, [sp, #0x4c] - ldr r0, [sp, #0x44] - cmp r0, #0 - ble _0800A8C6 - movs r6, #0x80 - lsls r6, r6, #5 - mov r8, r0 -_0800A834: - mov r0, sl - ldr r1, [r0] - lsls r1, r1, #0xd - adds r0, r6, #0 - bl DivArm - adds r4, r0, #0 - mov r0, r9 - ldr r1, [r0] - lsls r1, r1, #0xd - adds r0, r6, #0 - bl DivArm - subs r4, r4, r0 - ldr r1, [sp, #0x48] - ldr r0, [r1] - adds r4, r4, r0 - ldr r1, [sp, #0x4c] - ldr r0, [r1] - adds r4, r4, r0 - str r4, [r7] - mov r1, sl - ldr r0, [r1] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #0xc - negs r1, r1 - adds r0, r6, #0 - bl DivArm - adds r4, r0, #0 - mov r1, r9 - adds r1, #4 - mov r9, r1 - subs r1, #4 - ldm r1!, {r0} - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #0xc - adds r0, r6, #0 - bl DivArm - adds r5, r0, #0 - ldr r0, [sp, #0x48] - ldr r1, [r0] - lsls r1, r1, #0xd - adds r0, r6, #0 - bl DivArm - adds r4, r4, r5 - subs r4, r4, r0 - ldr r1, [sp, #0x4c] - ldm r1!, {r0} - str r1, [sp, #0x4c] - subs r4, r4, r0 - str r4, [r7, #4] - ldr r1, [sp, #0x48] - ldm r1!, {r0} - str r1, [sp, #0x48] - str r0, [r7, #8] - mov r1, sl - adds r1, #4 - mov sl, r1 - subs r1, #4 - ldm r1!, {r0} - str r0, [r7, #0xc] - adds r7, #0x10 - movs r0, #1 - negs r0, r0 - add r8, r0 - mov r1, r8 - cmp r1, #0 - bne _0800A834 -_0800A8C6: - add sp, #0x50 - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r0} - bx r0 - - THUMB_FUNC_END sub_800A7D8 - - THUMB_FUNC_START sub_800A8D8 -sub_800A8D8: @ 0x0800A8D8 - push {r4, r5, r6, r7, lr} - adds r5, r0, #0 - adds r6, r2, #0 - adds r7, r3, #0 - lsls r1, r1, #0x10 - lsrs r2, r1, #0x10 - movs r1, #0 - ldrsh r0, [r5, r1] - lsls r4, r0, #0xc - ldr r1, [r6] - cmp r1, r4 - bge _0800A8FC - movs r0, #0 - str r0, [r7] - str r4, [r6] - movs r0, #2 - negs r0, r0 - b _0800A948 -_0800A8FC: - lsls r0, r2, #0x10 - asrs r3, r0, #0x10 - lsls r0, r3, #1 - adds r0, r0, r5 - subs r0, #2 - movs r2, #0 - ldrsh r0, [r0, r2] - lsls r2, r0, #0xc - cmp r1, r2 - ble _0800A91C - subs r0, r3, #1 - str r0, [r7] - str r2, [r6] - movs r0, #2 - negs r0, r0 - b _0800A948 -_0800A91C: - movs r3, #0 - cmp r4, r1 - bgt _0800A928 - movs r4, #2 - ldrsh r0, [r5, r4] - b _0800A93E -_0800A928: - adds r3, #1 - lsls r0, r3, #1 - adds r2, r0, r5 - movs r1, #0 - ldrsh r0, [r2, r1] - lsls r0, r0, #0xc - ldr r1, [r6] - cmp r0, r1 - bgt _0800A928 - movs r4, #2 - ldrsh r0, [r2, r4] -_0800A93E: - lsls r0, r0, #0xc - cmp r0, r1 - blt _0800A928 - str r3, [r7] - movs r0, #0 -_0800A948: - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800A8D8 - THUMB_FUNC_START sub_800A950 sub_800A950: @ 0x0800A950 push {r4, r5, r6, r7, lr} @@ -2573,164 +1908,3 @@ _0800B7D0: THUMB_FUNC_END sub_800B764 - THUMB_FUNC_START _DivArm1 -_DivArm1: @ 0x0800B7E0 - push {r4, r5, r6, r7, lr} - adds r5, r1, #0 - adds r6, r2, #0 - cmp r6, #0 - bne _0800B7F4 - lsls r1, r0, #0xc - adds r0, r5, #0 - bl DivArm - b _0800B846 -_0800B7F4: - lsls r4, r0, #0xc - adds r0, r5, #0 - adds r1, r4, #0 - bl DivArm - movs r7, #0x80 - lsls r7, r7, #5 - subs r0, r7, r0 - cmp r0, #0 - bge _0800B81C - adds r0, r5, #0 - adds r1, r4, #0 - bl DivArm - ldr r2, _0800B818 @ 0xFFFFF000 - adds r1, r0, r2 - b _0800B826 - .align 2, 0 -_0800B818: .4byte 0xFFFFF000 -_0800B81C: - adds r0, r5, #0 - adds r1, r4, #0 - bl DivArm - subs r1, r7, r0 -_0800B826: - adds r5, r1, #0 - cmp r6, #0 - ble _0800B840 - adds r4, r6, #0 -_0800B82E: - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r1, r0, #0 - subs r4, #1 - cmp r4, #0 - bne _0800B82E -_0800B840: - movs r0, #0x80 - lsls r0, r0, #5 - subs r0, r0, r1 -_0800B846: - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END _DivArm1 - - THUMB_FUNC_START _DivArm2 -_DivArm2: @ 0x0800B84C - push {r4, r5, r6, r7, lr} - mov r7, r8 - push {r7} - adds r7, r0, #0 - adds r3, r1, #0 - mov r8, r2 - cmp r2, #0 - bne _0800B866 - lsls r1, r7, #0xc - adds r0, r3, #0 - bl DivArm - b _0800B906 -_0800B866: - lsrs r0, r3, #0x1f - adds r0, r3, r0 - asrs r6, r0, #1 - cmp r7, r6 - bge _0800B896 - lsls r4, r7, #0xc - adds r0, r6, #0 - adds r1, r4, #0 - bl DivArm - cmp r0, #0 - bge _0800B88A - adds r0, r6, #0 - adds r1, r4, #0 - bl DivArm - negs r1, r0 - b _0800B8CA -_0800B88A: - adds r0, r6, #0 - adds r1, r4, #0 - bl DivArm - adds r1, r0, #0 - b _0800B8CA -_0800B896: - subs r0, r7, r6 - lsls r4, r0, #0xc - adds r0, r6, #0 - adds r1, r4, #0 - bl DivArm - movs r5, #0x80 - lsls r5, r5, #5 - subs r0, r5, r0 - cmp r0, #0 - bge _0800B8C0 - adds r0, r6, #0 - adds r1, r4, #0 - bl DivArm - ldr r2, _0800B8BC @ 0xFFFFF000 - adds r1, r0, r2 - b _0800B8CA - .align 2, 0 -_0800B8BC: .4byte 0xFFFFF000 -_0800B8C0: - adds r0, r6, #0 - adds r1, r4, #0 - bl DivArm - subs r1, r5, r0 -_0800B8CA: - adds r5, r1, #0 - mov r0, r8 - cmp r0, #0 - ble _0800B8E6 - mov r4, r8 -_0800B8D4: - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r1, r0, #0 - subs r4, #1 - cmp r4, #0 - bne _0800B8D4 -_0800B8E6: - cmp r7, r6 - bge _0800B8F2 - lsrs r0, r1, #0x1f - adds r0, r1, r0 - asrs r1, r0, #1 - b _0800B904 -_0800B8F2: - movs r0, #0x80 - lsls r0, r0, #5 - subs r0, r0, r1 - lsrs r1, r0, #0x1f - adds r0, r0, r1 - asrs r0, r0, #1 - movs r2, #0x80 - lsls r2, r2, #4 - adds r1, r0, r2 -_0800B904: - adds r0, r1, #0 -_0800B906: - pop {r3} - mov r8, r3 - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - THUMB_FUNC_END _DivArm2 diff --git a/ldscript.txt b/ldscript.txt index 0a404085..01c30683 100644 --- a/ldscript.txt +++ b/ldscript.txt @@ -311,7 +311,9 @@ SECTIONS src/ap.o(.text); src/gamecontrol.o(.text); src/msg.o(.text); + src/spline.o(.text); asm/spline.o(.text); + src/spline_.o(.text); src/eventscr_utils.o(.text); src/eventscr_gmap.o(.text); src/event.o(.text); diff --git a/src/spline.c b/src/spline.c new file mode 100644 index 00000000..2a36aee5 --- /dev/null +++ b/src/spline.c @@ -0,0 +1,297 @@ +#include "global.h" + +#include "spline.h" + +struct UnkSplineStruct1 +{ + /* 00 */ s16 unk_00; + /* 02 */ s16 unk_02; + /* 04 */ u32 * unk_04; + /* 08 */ s16 * unk_08; +}; + +struct UnkSplineStruct2 +{ + /* 00 */ s16 unk_00; + /* 02 */ s16 unk_02; + /* 04 */ s16 unk_04; + /* 06 */ s16 unk_06; + /* 08 */ u32 * unk_08; + /* 0C */ u32 * unk_0c; + /* 10 */ u32 * unk_10; + /* 14 */ s16 * unk_14; + /* 18 */ s16 * unk_18; + /* 1C */ s16 * unk_1c; + /* 20 */ s16 * unk_20; +}; + +struct UnkSplineStruct3 +{ + /* 00 */ int unk_00; + /* 04 */ int unk_04; + /* 08 */ int unk_08; + /* 0C */ int unk_0c; +}; + +//! FE8U = 0x0800A42C +int sub_800A42C(int val, int start, int end) +{ +#if NONMATCHING + int num1 = start + end; +#else + register int num1 asm("r6") = start + end; +#endif + + if (num1 == 0) + return val; + + if (num1 > 0x1000) + { + start = DivArm(num1, start * 0x1000); + end = DivArm(num1, end * 0x1000); + } + + num1 = DivArm(0x2000 - start - end, 0x1000000); + + if (val < start) + { + if (start == 0) + start = 1; + + return DivArm(0x1000, DivArm(0x1000, DivArm(start, num1 * 0x1000) * val) * val); + } + + if (val < (0x1000 - end)) + { + return DivArm(0x1000, num1 * (DivArm(0x1000, val * 0x2000) - start)); + } + + val = 0x1000 - val; + if (end == 0) + end = 1; + + return 0x1000 - DivArm(0x1000, DivArm(0x1000, DivArm(end, num1 * 0x1000) * val) * val); +} + +//! FE8U = 0x0800A4E8 +void sub_800A4E8(struct UnkSplineStruct1 * src, struct UnkSplineStruct2 * dest) +{ + dest->unk_00 = src->unk_00; + + dest->unk_04 = src->unk_02; + dest->unk_0c = src->unk_04; + dest->unk_18 = src->unk_08; + + src++; + + dest->unk_02 = src->unk_02; + dest->unk_08 = src->unk_04; + dest->unk_14 = src->unk_08; + + src++; + + dest->unk_06 = src->unk_02; + dest->unk_10 = src->unk_04; + dest->unk_1c = src->unk_08; + + return; +} + +//! FE8U = 0x0800A518 +void sub_800A518(struct UnkSplineStruct2 * arg_0, int * arg_1, int arg_2) +{ + int i; + int sp_08; + int sp_0c; + int sp_10; + + int sp_14 = arg_0->unk_00; + s16 * r1 = arg_0->unk_14; + int r5 = arg_0->unk_02; + int r3 = arg_0->unk_04; + int r2 = arg_0->unk_06; + + int * sp_18 = arg_0->unk_08; + int * sp_1c = arg_0->unk_0c; + int * r9 = arg_0->unk_10; + + int r4 = 0x1000 - r1[0]; + int r8 = r1[1]; + int r7 = r1[2]; + + if ((r2 == r5) || (r2 == r3)) + { + sp_10 = 0; + } + else + { + sp_10 = DivArm(0x1000, DivArm(r2 - r3, (r5 - r3) * 0x1000) << 0xd); + } + + r5 = (r7 > 0) ? r7 : -r7; + + sp_10 = (sp_10 + r5) - DivArm(0x1000, r5 * sp_10); + sp_08 = DivArm(0x1000, DivArm(0x1000, DivArm(0x1000, r4 * (0x1000 - r7)) * (r8 + 0x1000)) << 0xb); + sp_0c = DivArm(0x1000, DivArm(0x1000, DivArm(0x1000, r4 * (r7 + 0x1000)) * (0x1000 - r8)) << 0xb); + + for (i = 0; i < sp_14; i++) + { + int a = sp_18[i] - sp_1c[i]; + int b = r9[i] - sp_18[i]; + + *arg_1 = DivArm(0x1000, sp_10 * (DivArm(0x1000, sp_08 * a) + DivArm(0x1000, sp_0c * b))); + + if (arg_2 == 2) + { + *arg_1 = DivArm(0x1000, (sp_08 + sp_0c) * a); + } + arg_1++; + } + + return; +} + +//! FE8U = 0x0800A680 +void sub_800A680(struct UnkSplineStruct2 * arg_0, int * arg_1, int arg_2) +{ + int i; + int sp_04; + int sp_08; + int sp_0c; + + int sp_10 = arg_0->unk_00; + s16 * r1 = arg_0->unk_14; + int r4 = arg_0->unk_02; + int r3 = arg_0->unk_04; + int r2 = arg_0->unk_06; + + int * sp_14 = arg_0->unk_08; + int * sp_18 = arg_0->unk_0c; + int * r9 = arg_0->unk_10; + + int r7 = 0x1000 - r1[0]; + int r8 = r1[1]; + int r6 = r1[2]; + + if ((r2 == r4) || (r2 == r3)) + { + sp_0c = 0; + } + else + { + sp_0c = DivArm(0x1000, DivArm(r2 - r3, (r2 - r4) * 0x1000) << 0xd); + } + + r4 = (r6 > 0) ? r6 : -r6; + + sp_0c = (sp_0c + r4) - DivArm(0x1000, r4 * sp_0c); + sp_04 = DivArm(0x1000, DivArm(0x1000, DivArm(0x1000, r7 * (r6 + 0x1000)) * (r8 + 0x1000)) << 0xb); + sp_08 = DivArm(0x1000, DivArm(0x1000, DivArm(0x1000, r7 * (0x1000 - r6)) * (0x1000 - r8)) << 0xb); + + for (i = 0; i < sp_10; i++) + { + int a = sp_14[i] - sp_18[i]; + int b = r9[i] - sp_14[i]; + + *arg_1 = DivArm(0x1000, sp_0c * (DivArm(0x1000, sp_04 * a) + DivArm(0x1000, sp_08 * b))); + + if (arg_2 == 1) + { + *arg_1 = DivArm(0x1000, (sp_04 + sp_08) * b); + } + + arg_1++; + } + + return; +} + +//! FE8U = 0x0800A7D8 +void sub_800A7D8(struct UnkSplineStruct1 * arg_0, struct UnkSplineStruct3 * arg_1, int arg_2) +{ + int * r8; + int * r9; + int sp_44; + int * sp_48; + int * sp_4c; + int i; + int * sl; + int * r9_; + struct UnkSplineStruct2 unk; + int arrayA[4]; + int arrayB[4]; + + sp_44 = arg_0->unk_00; + + r8 = arg_0[1].unk_04; + r9 = arg_0[2].unk_04; + + sub_800A4E8(arg_0 + 0, &unk); + sub_800A680(&unk, arrayB, arg_2); + + sub_800A4E8(arg_0 + 1, &unk); + sub_800A518(&unk, arrayA, arg_2); + + sl = r8; + r9_ = r9; + sp_48 = arrayB; + sp_4c = arrayA; + + for (i = 0; i < sp_44; i++) + { + arg_1->unk_00 = (DivArm(0x1000, *sl << 0xd) - DivArm(0x1000, *r9_ << 0xd)) + *sp_48 + *sp_4c; + arg_1->unk_04 = + ((DivArm(0x1000, *sl * -0x3000) + DivArm(0x1000, *r9_ * 0x3000)) - DivArm(0x1000, *sp_48 << 0xd)) - *sp_4c; + arg_1->unk_08 = *sp_48; + arg_1->unk_0c = *sl; + + sp_48++; + sp_4c++; + sl++; + r9_++; + arg_1++; + } + + return; +} + +//! FE8U = 0x0800A8D8 +int sub_800A8D8(s16 * arg_0, s16 arg_1, int * arg_2, int * arg_3) +{ + int r2; + int r3; + + int r4 = arg_0[0] * 0x1000; + + if (*arg_2 < r4) + { + *arg_3 = 0; + *arg_2 = r4; + return -2; + } + + r2 = arg_0[arg_1 - 1] * 0x1000; + + if (*arg_2 > r2) + { + *arg_3 = arg_1 - 1; + *arg_2 = r2; + return -2; + } + + r3 = 0; + + while (1) + { + if (arg_0[r3] * 0x1000 <= *arg_2 && arg_0[r3 + 1] * 0x1000 >= *arg_2) + { + break; + } + + r3++; + } + + *arg_3 = r3; + + return 0; +} diff --git a/src/spline_.c b/src/spline_.c new file mode 100644 index 00000000..52b2283a --- /dev/null +++ b/src/spline_.c @@ -0,0 +1,98 @@ +#include "global.h" + +#include "spline.h" + +//! FE8U = 0x0800B7E0 +int _DivArm1(int arg_0, int arg_1, int arg_2) +{ + int r1; + int r4; + int r5; + int i; + + if (arg_2 == 0) + { + return DivArm(arg_1, arg_0 << 12); + } + + r4 = arg_0 * 0x1000; + + if (0x1000 - DivArm(arg_1, r4) < 0) + { + r1 = DivArm(arg_1, r4) - 0x1000; + } + else + { + r1 = 0x1000 - DivArm(arg_1, r4); + } + + r5 = r1; + + for (i = 0; i < arg_2; i++) + { + r1 = DivArm(0x1000, r1 * r5); + } + + return 0x1000 - r1; +} + +//! FE8U = 0x0800B84C +int _DivArm2(int arg_0, int arg_1, int arg_2) +{ + int r1; +#if NONMATCHING + int r5; +#else + register int r5 asm("r5"); +#endif + int r6; + int i; + + if (arg_2 == 0) + { + return DivArm(arg_1, arg_0 << 12); + } + + r6 = arg_1 / 2; + + if (arg_0 < r6) + { + if (DivArm(r6, arg_0 * 0x1000) < 0) + { + r1 = -DivArm(r6, arg_0 * 0x1000); + } + else + { + r1 = DivArm(r6, arg_0 * 0x1000); + } + } + else + { + if (0x1000 - DivArm(r6, (arg_0 - r6) * 0x1000) < 0) + { + r1 = DivArm(r6, (arg_0 - r6) * 0x1000) - 0x1000; + } + else + { + r1 = 0x1000 - DivArm(r6, (arg_0 - r6) * 0x1000); + } + } + + r5 = r1; + + for (i = 0; i < arg_2; i++) + { + r1 = DivArm(0x1000, r1 * r5); + } + + if (arg_0 < r6) + { + r1 = r1 / 2; + } + else + { + r1 = (0x1000 - r1) / 2 + 0x800; + } + + return r1; +} From 98df6f30c786b81a308aca99c4649bc00aeb0a09 Mon Sep 17 00:00:00 2001 From: Eebit Date: Sat, 14 Sep 2024 17:03:31 -0400 Subject: [PATCH 2/2] (spline) More progress; cleanup of other usages --- asm/spline.s | 1910 ------------------------------------------ asm/spline_800A950.s | 281 +++++++ asm/spline_800AF64.s | 280 +++++++ include/spline.h | 41 +- include/worldmap.h | 2 +- ldscript.txt | 6 +- src/bmdifficulty.c | 43 +- src/spline.c | 31 - src/spline_.c | 98 --- src/spline_800AB58.c | 251 ++++++ src/spline_800B16C.c | 415 +++++++++ src/worldmap_mapmu.c | 4 +- src/worldmap_path.c | 24 +- 13 files changed, 1302 insertions(+), 2084 deletions(-) delete mode 100644 asm/spline.s create mode 100644 asm/spline_800A950.s create mode 100644 asm/spline_800AF64.s delete mode 100644 src/spline_.c create mode 100644 src/spline_800AB58.c create mode 100644 src/spline_800B16C.c diff --git a/asm/spline.s b/asm/spline.s deleted file mode 100644 index 4919336c..00000000 --- a/asm/spline.s +++ /dev/null @@ -1,1910 +0,0 @@ - .INCLUDE "macro.inc" - - .SYNTAX UNIFIED - - THUMB_FUNC_START sub_800A950 -sub_800A950: @ 0x0800A950 - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0xb4 - str r0, [sp, #0xac] - str r2, [sp, #0x88] - movs r2, #0 - ldrsh r0, [r0, r2] - str r0, [sp, #0x8c] - ldr r3, [sp, #0xac] - ldr r3, [r3, #4] - mov r9, r3 - ldr r7, [sp, #0xac] - ldr r7, [r7, #8] - str r7, [sp, #0x90] - ldr r0, [sp, #0xac] - ldr r0, [r0, #0xc] - mov r8, r0 - add r0, sp, #0x80 - str r1, [r0] - cmp r1, #0 - bne _0800A986 - movs r1, #0 - str r1, [sp, #0x94] - b _0800A990 -_0800A986: - ldr r2, [sp, #0xac] - movs r3, #2 - ldrsh r0, [r2, r3] - subs r0, #1 - str r0, [sp, #0x94] -_0800A990: - mov r7, sp - adds r7, #0x10 - str r7, [sp, #0xa8] - ldr r1, [sp, #0xac] - ldrh r0, [r1, #2] - add r2, sp, #0x34 - add r1, sp, #0xc -_0800A99E: - str r2, [r1] - subs r2, #0xc - subs r1, #4 - cmp r1, sp - bge _0800A99E - lsls r0, r0, #0x10 - cmp r0, #0 - bne _0800A9B4 - movs r0, #1 - negs r0, r0 - b _0800AB48 -_0800A9B4: - ldr r2, [sp, #0xac] - movs r3, #2 - ldrsh r1, [r2, r3] - add r4, sp, #0x84 - mov r0, r9 - add r2, sp, #0x80 - adds r3, r4, #0 - bl sub_800A8D8 - ldr r1, [r4] - cmp r1, #0 - bne _0800A9D2 - movs r7, #1 - str r7, [sp, #0x98] - b _0800A9E6 -_0800A9D2: - ldr r2, [sp, #0xac] - movs r3, #2 - ldrsh r0, [r2, r3] - subs r0, #1 - movs r7, #0 - str r7, [sp, #0x98] - cmp r1, r0 - bne _0800A9E6 - movs r0, #2 - str r0, [sp, #0x98] -_0800A9E6: - ldr r1, [sp, #0xac] - ldr r0, [r1, #0x10] - ldr r4, _0800AA44 @ gUnknown_08591AB4 - cmp r0, #0 - beq _0800A9F2 - adds r4, r0, #0 -_0800A9F2: - movs r6, #0 - ldr r2, [sp, #0xac] - ldrh r2, [r2] - add r3, sp, #0xa4 - strh r2, [r3] - mov r7, sp - adds r7, #0x40 - str r7, [sp, #0xa0] - add r0, sp, #0x84 - mov sl, r0 - add r3, sp, #0x18 - add r2, sp, #0x14 - ldr r5, [sp, #0xa8] - adds r5, #2 - ldr r1, [sp, #0xa8] - mov ip, r1 - ldr r0, [sp, #0x94] - ldr r1, [sp, #0x8c] - adds r7, r0, #0 - muls r7, r1, r7 - lsls r0, r7, #2 - ldr r7, [sp, #0x90] - adds r0, r7, r0 - str r0, [sp, #0x9c] -_0800AA22: - add r0, sp, #0xa4 - ldrh r1, [r0] - mov r0, ip - strh r1, [r0] - mov r1, sl - ldr r0, [r1] - adds r0, r0, r6 - subs r1, r0, #1 - cmp r1, #0 - bgt _0800AA48 - mov r7, r9 - ldrh r0, [r7] - strh r0, [r5] - ldr r0, [sp, #0x90] - str r0, [r2] - b _0800AAA0 - .align 2, 0 -_0800AA44: .4byte gUnknown_08591AB4 -_0800AA48: - ldr r7, [sp, #0x94] - cmp r1, r7 - blt _0800AA66 - lsls r1, r7, #1 - mov r0, r9 - adds r0, r1, r0 - ldrh r0, [r0] - strh r0, [r5] - ldr r7, [sp, #0x9c] - str r7, [r2] - mov r0, r8 - cmp r0, #0 - beq _0800AAA0 - add r1, r8 - b _0800AA90 -_0800AA66: - lsls r0, r0, #1 - add r0, r9 - subs r0, #2 - ldrh r0, [r0] - strh r0, [r5] - mov r1, sl - ldr r0, [r1] - adds r1, r0, r6 - subs r0, r1, #1 - ldr r7, [sp, #0x8c] - muls r0, r7, r0 - lsls r0, r0, #2 - ldr r7, [sp, #0x90] - adds r0, r7, r0 - str r0, [r2] - mov r0, r8 - cmp r0, #0 - beq _0800AAA0 - lsls r0, r1, #1 - add r0, r8 - subs r1, r0, #2 -_0800AA90: - movs r7, #0 - ldrsh r1, [r1, r7] - lsls r0, r1, #1 - adds r0, r0, r1 - lsls r0, r0, #2 - adds r0, r4, r0 - str r0, [r3] - b _0800AAA2 -_0800AAA0: - str r4, [r3] -_0800AAA2: - adds r3, #0xc - adds r2, #0xc - adds r5, #0xc - movs r0, #0xc - add ip, r0 - adds r6, #1 - cmp r6, #3 - ble _0800AA22 - ldr r0, [sp] - ldr r1, [sp, #0xa0] - ldr r2, [sp, #0x98] - bl sub_800A7D8 - ldr r2, [sp, #0xac] - movs r3, #2 - ldrsh r1, [r2, r3] - ldr r2, [sp, #0x84] - adds r0, r2, #1 - cmp r1, r0 - ble _0800AAE6 - lsls r1, r2, #1 - add r1, r9 - movs r7, #2 - ldrsh r0, [r1, r7] - movs r3, #0 - ldrsh r2, [r1, r3] - subs r0, r0, r2 - lsls r2, r2, #0xc - ldr r1, [sp, #0x80] - subs r1, r1, r2 - bl DivArm - adds r5, r0, #0 - b _0800AAF4 -_0800AAE6: - lsls r0, r2, #1 - add r0, r9 - movs r7, #0 - ldrsh r0, [r0, r7] - lsls r0, r0, #0xc - ldr r1, [sp, #0x80] - subs r5, r1, r0 -_0800AAF4: - ldr r4, [sp, #0xa0] - movs r6, #0 - ldr r0, [sp, #0x8c] - cmp r6, r0 - bcs _0800AB46 - movs r7, #0x80 - lsls r7, r7, #5 - ldr r1, [sp, #0x88] - mov r8, r1 -_0800AB06: - ldr r0, [r4] - adds r1, r5, #0 - muls r1, r0, r1 - adds r0, r7, #0 - bl DivArm - ldr r1, [r4, #4] - adds r0, r0, r1 - adds r1, r5, #0 - muls r1, r0, r1 - adds r0, r7, #0 - bl DivArm - ldr r1, [r4, #8] - adds r0, r0, r1 - adds r1, r5, #0 - muls r1, r0, r1 - adds r0, r7, #0 - bl DivArm - ldr r1, [r4, #0xc] - adds r0, r0, r1 - mov r2, r8 - adds r2, #4 - mov r8, r2 - subs r2, #4 - stm r2!, {r0} - adds r4, #0x10 - adds r6, #1 - ldr r3, [sp, #0x8c] - cmp r6, r3 - bcc _0800AB06 -_0800AB46: - ldr r0, [sp, #0x84] -_0800AB48: - add sp, #0xb4 - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800A950 - - THUMB_FUNC_START sub_800AB58 -sub_800AB58: @ 0x0800AB58 - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0x1c - adds r6, r1, #0 - ldr r1, [r0] - str r1, [sp] - ldr r2, [r0, #4] - str r2, [sp, #4] - ldr r3, [r0, #8] - str r3, [sp, #8] - ldr r0, [r0, #0xc] - mov r9, r0 - adds r0, r1, #0 - adds r1, r0, #0 - muls r1, r0, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r4, r0, #0 - ldr r2, [sp, #4] - adds r1, r2, #0 - muls r1, r2, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov sl, r0 - ldr r3, [sp, #8] - adds r1, r3, #0 - muls r1, r3, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov r8, r0 - mov r0, r9 - mov r1, r9 - muls r1, r0, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - add r4, sl - add r4, r8 - adds r4, r4, r0 - movs r1, #0x80 - lsls r1, r1, #0x12 - adds r0, r4, #0 - bl DivArm - adds r4, r0, #0 - ldr r2, [sp] - adds r1, r2, #0 - muls r1, r4, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov r8, r0 - ldr r3, [sp, #4] - adds r1, r3, #0 - muls r1, r4, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r5, r0, #0 - ldr r0, [sp, #8] - adds r1, r0, #0 - muls r1, r4, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r7, r0, #0 - mov r2, r8 - mov r1, r9 - muls r1, r2, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - str r0, [sp, #0xc] - mov r1, r9 - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - str r0, [sp, #0x10] - mov r1, r9 - muls r1, r7, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - str r0, [sp, #0x14] - ldr r3, [sp] - mov r1, r8 - muls r1, r3, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov sl, r0 - ldr r0, [sp] - adds r1, r0, #0 - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov r8, r0 - ldr r2, [sp] - adds r1, r2, #0 - muls r1, r7, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov r9, r0 - ldr r3, [sp, #4] - adds r1, r3, #0 - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - str r0, [sp, #0x18] - ldr r0, [sp, #4] - adds r1, r0, #0 - muls r1, r7, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r4, r0, #0 - ldr r2, [sp, #8] - adds r1, r2, #0 - muls r1, r7, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - ldr r3, [sp, #0x18] - adds r1, r3, r0 - movs r2, #0x80 - lsls r2, r2, #5 - subs r1, r2, r1 - str r1, [r6] - ldr r1, [sp, #0x14] - add r1, r8 - str r1, [r6, #4] - mov r3, r9 - ldr r2, [sp, #0x10] - subs r1, r3, r2 - str r1, [r6, #8] - mov r3, r8 - ldr r1, [sp, #0x14] - subs r3, r3, r1 - str r3, [r6, #0x10] - add r0, sl - movs r2, #0x80 - lsls r2, r2, #5 - subs r0, r2, r0 - str r0, [r6, #0x14] - ldr r3, [sp, #0xc] - adds r0, r4, r3 - str r0, [r6, #0x18] - ldr r0, [sp, #0x10] - add r9, r0 - mov r1, r9 - str r1, [r6, #0x20] - subs r4, r4, r3 - str r4, [r6, #0x24] - ldr r2, [sp, #0x18] - add sl, r2 - mov r0, sl - movs r3, #0x80 - lsls r3, r3, #5 - subs r0, r3, r0 - str r0, [r6, #0x28] - movs r0, #0 - str r0, [r6, #0x38] - str r0, [r6, #0x34] - str r0, [r6, #0x30] - str r0, [r6, #0x2c] - str r0, [r6, #0x1c] - str r0, [r6, #0xc] - str r3, [r6, #0x3c] - add sp, #0x1c - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r0} - bx r0 - - THUMB_FUNC_END sub_800AB58 - - THUMB_FUNC_START sub_800ACEC -sub_800ACEC: @ 0x0800ACEC - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0x1c - mov r8, r1 - ldr r1, [r0] - str r1, [sp] - ldr r2, [r0, #4] - str r2, [sp, #4] - ldr r3, [r0, #8] - str r3, [sp, #8] - ldr r0, [r0, #0xc] - mov r9, r0 - adds r0, r1, #0 - adds r1, r0, #0 - muls r1, r0, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r4, r0, #0 - ldr r2, [sp, #4] - adds r1, r2, #0 - muls r1, r2, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov sl, r0 - ldr r3, [sp, #8] - adds r1, r3, #0 - muls r1, r3, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r6, r0, #0 - mov r0, r9 - mov r1, r9 - muls r1, r0, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - add r4, sl - adds r4, r4, r6 - adds r4, r4, r0 - movs r1, #0x80 - lsls r1, r1, #0x12 - adds r0, r4, #0 - bl DivArm - adds r4, r0, #0 - ldr r2, [sp] - adds r1, r2, #0 - muls r1, r4, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r6, r0, #0 - ldr r3, [sp, #4] - adds r1, r3, #0 - muls r1, r4, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r5, r0, #0 - ldr r0, [sp, #8] - adds r1, r0, #0 - muls r1, r4, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r7, r0, #0 - mov r1, r9 - muls r1, r6, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - str r0, [sp, #0xc] - mov r1, r9 - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - str r0, [sp, #0x10] - mov r1, r9 - muls r1, r7, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - str r0, [sp, #0x14] - ldr r2, [sp] - adds r1, r2, #0 - muls r1, r6, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov sl, r0 - ldr r3, [sp] - adds r1, r3, #0 - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r6, r0, #0 - ldr r0, [sp] - adds r1, r0, #0 - muls r1, r7, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - mov r9, r0 - ldr r2, [sp, #4] - adds r1, r2, #0 - muls r1, r5, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - str r0, [sp, #0x18] - ldr r3, [sp, #4] - adds r1, r3, #0 - muls r1, r7, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - adds r4, r0, #0 - ldr r0, [sp, #8] - adds r1, r0, #0 - muls r1, r7, r1 - movs r0, #0x80 - lsls r0, r0, #5 - bl DivArm - ldr r2, [sp, #0x18] - adds r1, r2, r0 - movs r3, #0x80 - lsls r3, r3, #5 - subs r1, r3, r1 - mov r2, r8 - str r1, [r2] - ldr r3, [sp, #0x14] - adds r1, r6, r3 - str r1, [r2, #4] - mov r2, r9 - ldr r3, [sp, #0x10] - subs r1, r2, r3 - mov r2, r8 - str r1, [r2, #8] - ldr r3, [sp, #0x14] - subs r6, r6, r3 - str r6, [r2, #0xc] - add r0, sl - movs r1, #0x80 - lsls r1, r1, #5 - subs r0, r1, r0 - str r0, [r2, #0x10] - ldr r2, [sp, #0xc] - adds r0, r4, r2 - mov r3, r8 - str r0, [r3, #0x14] - ldr r0, [sp, #0x10] - add r9, r0 - mov r1, r9 - str r1, [r3, #0x18] - subs r4, r4, r2 - str r4, [r3, #0x1c] - ldr r2, [sp, #0x18] - add sl, r2 - mov r0, sl - movs r3, #0x80 - lsls r3, r3, #5 - subs r0, r3, r0 - mov r1, r8 - str r0, [r1, #0x20] - str r3, [r1, #0x2c] - str r3, [r1, #0x28] - str r3, [r1, #0x24] - add sp, #0x1c - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r0} - bx r0 - - THUMB_FUNC_END sub_800ACEC - - THUMB_FUNC_START sub_800AE7C -sub_800AE7C: @ 0x0800AE7C - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0x14 - adds r4, r0, #0 - mov sl, r1 - adds r6, r2, #0 - adds r7, r3, #0 - ldr r0, [r4] - mov r8, r0 - movs r0, #4 - mov r1, r8 - ands r0, r1 - cmp r0, #0 - beq _0800AED4 - mov r1, sp - ldrh r0, [r4, #8] - movs r2, #0 - mov r9, r2 - strh r0, [r1, #2] - movs r0, #3 - strh r0, [r1] - ldr r0, [r4, #0xc] - str r0, [sp, #4] - ldr r0, [r4, #0x10] - str r0, [sp, #8] - ldr r0, [r4, #0x14] - str r0, [sp, #0xc] - ldr r0, [r4, #0x18] - str r0, [sp, #0x10] - mov r0, sp - mov r1, sl - adds r2, r6, #0 - bl sub_800A950 - adds r5, r0, #0 - cmp r5, #0 - bge _0800AED4 - mov r0, r9 - str r0, [r6, #8] - str r0, [r6, #4] - str r0, [r6] -_0800AED4: - movs r0, #8 - mov r1, r8 - ands r0, r1 - cmp r0, #0 - beq _0800AF14 - mov r1, sp - ldrh r0, [r4, #0x1c] - movs r6, #0 - strh r0, [r1, #2] - movs r0, #4 - strh r0, [r1] - ldr r0, [r4, #0x20] - str r0, [sp, #4] - ldr r0, [r4, #0x24] - str r0, [sp, #8] - ldr r0, [r4, #0x28] - str r0, [sp, #0xc] - ldr r0, [r4, #0x2c] - str r0, [sp, #0x10] - mov r0, sp - mov r1, sl - adds r2, r7, #0 - bl sub_800A950 - adds r5, r0, #0 - cmp r5, #0 - bge _0800AF14 - str r6, [r7, #8] - str r6, [r7, #4] - str r6, [r7] - movs r0, #1 - str r0, [r7, #0xc] -_0800AF14: - movs r0, #0x10 - mov r2, r8 - ands r2, r0 - cmp r2, #0 - beq _0800AF52 - mov r1, sp - ldrh r0, [r4, #0x30] - movs r6, #0 - strh r0, [r1, #2] - movs r0, #3 - strh r0, [r1] - ldr r0, [r4, #0x34] - str r0, [sp, #4] - ldr r0, [r4, #0x38] - str r0, [sp, #8] - ldr r0, [r4, #0x3c] - str r0, [sp, #0xc] - ldr r0, [r4, #0x40] - str r0, [sp, #0x10] - mov r0, sp - mov r1, sl - ldr r2, [sp, #0x34] - bl sub_800A950 - adds r5, r0, #0 - cmp r5, #0 - bge _0800AF52 - ldr r0, [sp, #0x34] - str r6, [r0, #8] - str r6, [r0, #4] - str r6, [r0] -_0800AF52: - adds r0, r5, #0 - add sp, #0x14 - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800AE7C - - THUMB_FUNC_START sub_800AF64 -sub_800AF64: @ 0x0800AF64 - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0xb0 - adds r7, r0, #0 - str r2, [sp, #0x88] - movs r2, #0 - ldrsh r0, [r7, r2] - str r0, [sp, #0x8c] - ldr r3, [r7, #4] - mov r9, r3 - ldr r4, [r7, #8] - str r4, [sp, #0x90] - ldr r0, [r7, #0xc] - mov r8, r0 - ldr r2, [r7, #0x10] - mov sl, r2 - add r0, sp, #0x80 - str r1, [r0] - cmp r1, #0 - bne _0800AF98 - movs r3, #0 - str r3, [sp, #0x94] - b _0800AFA0 -_0800AF98: - movs r4, #2 - ldrsh r0, [r7, r4] - subs r0, #1 - str r0, [sp, #0x94] -_0800AFA0: - mov r0, sp - adds r0, #0x10 - str r0, [sp, #0xa4] - ldrh r0, [r7, #2] - add r2, sp, #0x34 - add r1, sp, #0xc -_0800AFAC: - str r2, [r1] - subs r2, #0xc - subs r1, #4 - cmp r1, sp - bge _0800AFAC - lsls r0, r0, #0x10 - cmp r0, #0 - bne _0800AFC2 - movs r0, #1 - negs r0, r0 - b _0800B15A -_0800AFC2: - movs r2, #2 - ldrsh r1, [r7, r2] - add r4, sp, #0x84 - mov r0, r9 - add r2, sp, #0x80 - adds r3, r4, #0 - bl sub_800A8D8 - ldr r1, [r4] - cmp r1, #0 - bne _0800AFDC - movs r3, #1 - b _0800AFEC -_0800AFDC: - movs r4, #2 - ldrsh r0, [r7, r4] - subs r0, #1 - movs r2, #0 - str r2, [sp, #0x98] - cmp r1, r0 - bne _0800AFEE - movs r3, #2 -_0800AFEC: - str r3, [sp, #0x98] -_0800AFEE: - movs r6, #0 - ldrh r4, [r7] - add r0, sp, #0xa8 - strh r4, [r0] - mov r1, sp - adds r1, #0x40 - str r1, [sp, #0xa0] - add r2, sp, #0x18 - mov ip, r6 - add r5, sp, #0x14 - mov r3, sp - adds r3, #0x84 - str r3, [sp, #0xac] - ldr r4, [sp, #0x94] - lsls r0, r4, #2 - ldr r1, [sp, #0x90] - adds r0, r0, r1 - str r0, [sp, #0x9c] -_0800B012: - ldr r3, [sp, #0xa4] - add r3, ip - add r4, sp, #0xa8 - ldrh r4, [r4] - strh r4, [r3] - ldr r1, [sp, #0xac] - ldr r0, [r1] - adds r0, r0, r6 - subs r1, r0, #1 - cmp r1, #0 - bgt _0800B048 - mov r4, r9 - ldrh r0, [r4] - strh r0, [r3, #2] - ldr r1, [sp, #0x90] - ldr r0, [r1] - str r0, [r5] - mov r3, sl - ldr r0, [r3] - cmp r0, #0 - bne _0800B0AC - ldr r4, _0800B044 @ gUnknown_08591AB4 - str r4, [r2] - b _0800B0B4 - .align 2, 0 -_0800B044: .4byte gUnknown_08591AB4 -_0800B048: - ldr r4, [sp, #0x94] - cmp r1, r4 - blt _0800B076 - lsls r1, r4, #1 - mov r4, r9 - adds r0, r1, r4 - ldrh r0, [r0] - strh r0, [r3, #2] - ldr r3, [sp, #0x9c] - ldr r0, [r3] - str r0, [r5] - mov r4, r8 - cmp r4, #0 - beq _0800B0B0 - adds r0, r1, r4 - movs r1, #0 - ldrsh r0, [r0, r1] - lsls r0, r0, #2 - add r0, sl - ldr r0, [r0] - cmp r0, #0 - bne _0800B0AC - b _0800B0B0 -_0800B076: - lsls r0, r0, #1 - add r0, r9 - subs r0, #2 - ldrh r0, [r0] - strh r0, [r3, #2] - ldr r4, [sp, #0xac] - ldr r0, [r4] - adds r1, r0, r6 - lsls r0, r1, #2 - ldr r3, [sp, #0x90] - adds r0, r0, r3 - subs r0, #4 - ldr r0, [r0] - str r0, [r5] - mov r4, r8 - cmp r4, #0 - beq _0800B0B0 - lsls r0, r1, #1 - add r0, r8 - subs r0, #2 - movs r1, #0 - ldrsh r0, [r0, r1] - lsls r0, r0, #2 - add r0, sl - ldr r0, [r0] - cmp r0, #0 - beq _0800B0B0 -_0800B0AC: - str r0, [r2] - b _0800B0B4 -_0800B0B0: - ldr r3, _0800B0F4 @ gUnknown_08591AB4 - str r3, [r2] -_0800B0B4: - adds r2, #0xc - movs r4, #0xc - add ip, r4 - adds r5, #0xc - adds r6, #1 - cmp r6, #3 - ble _0800B012 - ldr r0, [sp] - ldr r1, [sp, #0xa0] - ldr r2, [sp, #0x98] - bl sub_800A7D8 - movs r0, #2 - ldrsh r1, [r7, r0] - ldr r2, [sp, #0x84] - adds r0, r2, #1 - cmp r1, r0 - ble _0800B0F8 - lsls r1, r2, #1 - add r1, r9 - movs r2, #2 - ldrsh r0, [r1, r2] - movs r3, #0 - ldrsh r2, [r1, r3] - subs r0, r0, r2 - lsls r2, r2, #0xc - ldr r1, [sp, #0x80] - subs r1, r1, r2 - bl DivArm - adds r5, r0, #0 - b _0800B106 - .align 2, 0 -_0800B0F4: .4byte gUnknown_08591AB4 -_0800B0F8: - lsls r0, r2, #1 - add r0, r9 - movs r4, #0 - ldrsh r0, [r0, r4] - lsls r0, r0, #0xc - ldr r1, [sp, #0x80] - subs r5, r1, r0 -_0800B106: - ldr r4, [sp, #0xa0] - movs r6, #0 - ldr r0, [sp, #0x8c] - cmp r6, r0 - bcs _0800B158 - movs r7, #0x80 - lsls r7, r7, #5 - ldr r1, [sp, #0x88] - mov r8, r1 -_0800B118: - ldr r0, [r4] - adds r1, r5, #0 - muls r1, r0, r1 - adds r0, r7, #0 - bl DivArm - ldr r1, [r4, #4] - adds r0, r0, r1 - adds r1, r5, #0 - muls r1, r0, r1 - adds r0, r7, #0 - bl DivArm - ldr r1, [r4, #8] - adds r0, r0, r1 - adds r1, r5, #0 - muls r1, r0, r1 - adds r0, r7, #0 - bl DivArm - ldr r1, [r4, #0xc] - adds r0, r0, r1 - mov r2, r8 - adds r2, #4 - mov r8, r2 - subs r2, #4 - stm r2!, {r0} - adds r4, #0x10 - adds r6, #1 - ldr r3, [sp, #0x8c] - cmp r6, r3 - bcc _0800B118 -_0800B158: - ldr r0, [sp, #0x84] -_0800B15A: - add sp, #0xb0 - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800AF64 - - THUMB_FUNC_START sub_800B16C -sub_800B16C: @ 0x0800B16C - push {r4, lr} - adds r4, r0, #0 - ldr r0, [r4, #4] - cmp r0, #0 - beq _0800B180 - ldr r1, [r4] - ldr r2, [r4, #0x10] - bl sub_800AF64 - adds r1, r0, #0 -_0800B180: - ldr r0, [r4, #8] - cmp r0, #0 - beq _0800B190 - ldr r1, [r4] - ldr r2, [r4, #0x14] - bl sub_800AF64 - adds r1, r0, #0 -_0800B190: - adds r0, r1, #0 - pop {r4} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800B16C - - THUMB_FUNC_START sub_800B198 -sub_800B198: @ 0x0800B198 - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0x1c - adds r6, r0, #0 - adds r7, r1, #0 - adds r5, r2, #0 - str r3, [sp, #0x14] - ldr r0, [sp, #0x3c] - lsls r0, r0, #0x10 - lsrs r0, r0, #0x10 - mov sl, r0 - ldr r0, [r6, #4] - mov r8, r0 - movs r2, #0 - ldrsh r1, [r6, r2] - mov r9, r1 - add r2, sp, #0x14 - add r3, sp, #0x18 - bl sub_800A8D8 - ldr r0, [r7, #4] - mov r1, sl - strh r1, [r0, #2] - mov r0, r9 - subs r0, #1 - ldr r4, [sp, #0x18] - cmp r4, r0 - bge _0800B2AC - lsls r4, r4, #1 - add r4, r8 - movs r2, #0x80 - lsls r2, r2, #5 - mov r8, r2 - ldr r1, [sp, #0x14] - mov r0, r8 - bl DivArm - movs r2, #2 - ldrsh r1, [r4, r2] - lsls r0, r0, #0x10 - asrs r0, r0, #0x10 - cmp r1, r0 - bne _0800B2AC - ldr r4, [r7, #8] - ldr r3, [sp, #0x18] - lsls r2, r3, #1 - adds r1, r2, r3 - lsls r1, r1, #2 - ldr r0, [r6, #8] - adds r0, r0, r1 - adds r0, #0xc - str r0, [r4, #4] - ldr r4, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r2, r2, r0 - movs r5, #2 - ldrsh r0, [r2, r5] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - str r0, [r4, #4] - mov r0, r9 - subs r0, #2 - cmp r3, r0 - bge _0800B262 - ldr r1, [sp, #0x14] - mov r0, r8 - bl DivArm - ldr r1, [r7, #4] - mov r8, r1 - ldr r3, [sp, #0x18] - ldr r2, [r6, #4] - lsls r4, r3, #1 - adds r2, r4, r2 - mov r5, sl - lsls r1, r5, #0x10 - asrs r1, r1, #0x10 - ldrh r2, [r2, #4] - adds r1, r1, r2 - subs r1, r1, r0 - mov r0, r8 - strh r1, [r0, #4] - ldr r1, [r7, #8] - adds r3, r4, r3 - lsls r3, r3, #2 - ldr r0, [r6, #8] - adds r0, r0, r3 - adds r0, #0x18 - str r0, [r1, #8] - ldr r2, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r4, r4, r0 - movs r1, #4 - ldrsh r0, [r4, r1] - b _0800B29E -_0800B262: - ldr r1, [sp, #0x14] - mov r0, r8 - bl DivArm - ldr r2, [r7, #4] - mov r8, r2 - ldr r3, [sp, #0x18] - ldr r2, [r6, #4] - lsls r4, r3, #1 - adds r2, r4, r2 - mov r5, sl - lsls r1, r5, #0x10 - asrs r1, r1, #0x10 - ldrh r2, [r2, #2] - adds r1, r1, r2 - subs r1, r1, r0 - mov r0, r8 - strh r1, [r0, #4] - ldr r1, [r7, #8] - adds r3, r4, r3 - lsls r3, r3, #2 - ldr r0, [r6, #8] - adds r0, r0, r3 - adds r0, #0xc - str r0, [r1, #8] - ldr r2, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r4, r4, r0 - movs r1, #2 - ldrsh r0, [r4, r1] -_0800B29E: - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - str r0, [r2, #8] - b _0800B376 -_0800B2AC: - mov r1, sp - ldrh r0, [r6] - movs r4, #0 - strh r0, [r1, #2] - movs r0, #3 - strh r0, [r1] - ldr r0, [r6, #4] - str r0, [sp, #4] - ldr r0, [r6, #8] - str r0, [sp, #8] - ldr r0, [r6, #0xc] - str r0, [sp, #0xc] - ldr r0, [r6, #0x10] - str r0, [sp, #0x10] - ldr r1, [sp, #0x14] - mov r0, sp - adds r2, r5, #0 - bl sub_800A950 - cmp r0, #0 - bge _0800B2DC - str r4, [r5, #8] - str r4, [r5, #4] - str r4, [r5] -_0800B2DC: - ldr r4, [r7, #8] - str r5, [r4, #4] - ldr r2, [r7, #0x10] - mov r8, r2 - ldr r2, [sp, #0x18] - ldr r1, [r6, #0xc] - lsls r0, r2, #1 - adds r3, r0, r1 - movs r1, #0 - ldrsh r0, [r3, r1] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - mov r1, r8 - str r0, [r1, #4] - mov r0, r9 - subs r0, #1 - cmp r2, r0 - blt _0800B328 - ldr r1, [r7, #4] - mov r2, sl - lsls r0, r2, #0x10 - asrs r0, r0, #0x10 - adds r0, #1 - strh r0, [r1, #4] - str r5, [r4, #8] - movs r5, #0 - ldrsh r0, [r3, r5] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - mov r1, r8 - str r0, [r1, #8] - b _0800B372 -_0800B328: - movs r0, #0x80 - lsls r0, r0, #5 - ldr r1, [sp, #0x14] - bl DivArm - ldr r2, [r7, #4] - mov r8, r2 - ldr r3, [sp, #0x18] - ldr r2, [r6, #4] - lsls r4, r3, #1 - adds r2, r4, r2 - mov r5, sl - lsls r1, r5, #0x10 - asrs r1, r1, #0x10 - ldrh r2, [r2, #2] - adds r1, r1, r2 - subs r1, r1, r0 - mov r0, r8 - strh r1, [r0, #4] - ldr r1, [r7, #8] - adds r3, r4, r3 - lsls r3, r3, #2 - ldr r0, [r6, #8] - adds r0, r0, r3 - adds r0, #0xc - str r0, [r1, #8] - ldr r2, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r4, r4, r0 - movs r1, #2 - ldrsh r0, [r4, r1] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - str r0, [r2, #8] -_0800B372: - movs r0, #1 - b _0800B378 -_0800B376: - movs r0, #0 -_0800B378: - add sp, #0x1c - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800B198 - - THUMB_FUNC_START sub_800B388 -sub_800B388: @ 0x0800B388 - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0x1c - adds r6, r0, #0 - adds r7, r1, #0 - adds r5, r2, #0 - str r3, [sp, #0x14] - ldr r0, [sp, #0x3c] - lsls r0, r0, #0x10 - lsrs r0, r0, #0x10 - mov sl, r0 - ldr r0, [r6, #4] - mov r8, r0 - movs r2, #0 - ldrsh r1, [r6, r2] - mov r9, r1 - add r2, sp, #0x14 - add r3, sp, #0x18 - bl sub_800A8D8 - ldr r0, [r7, #4] - mov r1, sl - strh r1, [r0, #2] - mov r0, r9 - subs r0, #1 - ldr r4, [sp, #0x18] - cmp r4, r0 - bge _0800B496 - lsls r4, r4, #1 - add r4, r8 - movs r2, #0x80 - lsls r2, r2, #5 - mov r8, r2 - ldr r1, [sp, #0x14] - mov r0, r8 - bl DivArm - movs r2, #2 - ldrsh r1, [r4, r2] - lsls r0, r0, #0x10 - asrs r0, r0, #0x10 - cmp r1, r0 - bne _0800B496 - ldr r3, [r7, #8] - ldr r2, [sp, #0x18] - lsls r1, r2, #4 - ldr r0, [r6, #8] - adds r0, r0, r1 - adds r0, #0x10 - str r0, [r3, #4] - ldr r3, [r7, #0x10] - ldr r1, [r6, #0xc] - lsls r0, r2, #1 - adds r0, r0, r1 - movs r5, #2 - ldrsh r0, [r0, r5] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - str r0, [r3, #4] - mov r0, r9 - subs r0, #2 - cmp r2, r0 - bge _0800B44E - ldr r1, [sp, #0x14] - mov r0, r8 - bl DivArm - ldr r1, [r7, #4] - mov r8, r1 - ldr r3, [sp, #0x18] - ldr r2, [r6, #4] - lsls r4, r3, #1 - adds r2, r4, r2 - mov r5, sl - lsls r1, r5, #0x10 - asrs r1, r1, #0x10 - ldrh r2, [r2, #4] - adds r1, r1, r2 - subs r1, r1, r0 - mov r0, r8 - strh r1, [r0, #4] - ldr r1, [r7, #8] - lsls r3, r3, #4 - ldr r0, [r6, #8] - adds r0, r0, r3 - adds r0, #0x20 - str r0, [r1, #8] - ldr r2, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r4, r4, r0 - movs r1, #4 - ldrsh r0, [r4, r1] - b _0800B488 -_0800B44E: - ldr r1, [sp, #0x14] - mov r0, r8 - bl DivArm - ldr r2, [r7, #4] - mov r8, r2 - ldr r3, [sp, #0x18] - ldr r2, [r6, #4] - lsls r4, r3, #1 - adds r2, r4, r2 - mov r5, sl - lsls r1, r5, #0x10 - asrs r1, r1, #0x10 - ldrh r2, [r2, #2] - adds r1, r1, r2 - subs r1, r1, r0 - mov r0, r8 - strh r1, [r0, #4] - ldr r1, [r7, #8] - lsls r3, r3, #4 - ldr r0, [r6, #8] - adds r0, r0, r3 - adds r0, #0x10 - str r0, [r1, #8] - ldr r2, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r4, r4, r0 - movs r1, #2 - ldrsh r0, [r4, r1] -_0800B488: - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - str r0, [r2, #8] - b _0800B562 -_0800B496: - mov r1, sp - ldrh r0, [r6] - movs r4, #0 - strh r0, [r1, #2] - movs r0, #4 - strh r0, [r1] - ldr r0, [r6, #4] - str r0, [sp, #4] - ldr r0, [r6, #8] - str r0, [sp, #8] - ldr r0, [r6, #0xc] - str r0, [sp, #0xc] - ldr r0, [r6, #0x10] - str r0, [sp, #0x10] - ldr r1, [sp, #0x14] - mov r0, sp - adds r2, r5, #0 - bl sub_800A950 - cmp r0, #0 - bge _0800B4CA - str r4, [r5, #8] - str r4, [r5, #4] - str r4, [r5] - movs r0, #1 - str r0, [r5, #0xc] -_0800B4CA: - ldr r4, [r7, #8] - str r5, [r4, #4] - ldr r2, [r7, #0x10] - mov r8, r2 - ldr r2, [sp, #0x18] - ldr r1, [r6, #0xc] - lsls r0, r2, #1 - adds r3, r0, r1 - movs r1, #0 - ldrsh r0, [r3, r1] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - mov r1, r8 - str r0, [r1, #4] - mov r0, r9 - subs r0, #1 - cmp r2, r0 - blt _0800B516 - ldr r1, [r7, #4] - mov r2, sl - lsls r0, r2, #0x10 - asrs r0, r0, #0x10 - adds r0, #1 - strh r0, [r1, #4] - str r5, [r4, #8] - movs r5, #0 - ldrsh r0, [r3, r5] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - mov r1, r8 - str r0, [r1, #8] - b _0800B55E -_0800B516: - movs r0, #0x80 - lsls r0, r0, #5 - ldr r1, [sp, #0x14] - bl DivArm - ldr r2, [r7, #4] - mov r8, r2 - ldr r3, [sp, #0x18] - ldr r2, [r6, #4] - lsls r4, r3, #1 - adds r2, r4, r2 - mov r5, sl - lsls r1, r5, #0x10 - asrs r1, r1, #0x10 - ldrh r2, [r2, #2] - adds r1, r1, r2 - subs r1, r1, r0 - mov r0, r8 - strh r1, [r0, #4] - ldr r1, [r7, #8] - lsls r3, r3, #4 - ldr r0, [r6, #8] - adds r0, r0, r3 - adds r0, #0x10 - str r0, [r1, #8] - ldr r2, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r4, r4, r0 - movs r1, #2 - ldrsh r0, [r4, r1] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - str r0, [r2, #8] -_0800B55E: - movs r0, #1 - b _0800B564 -_0800B562: - movs r0, #0 -_0800B564: - add sp, #0x1c - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800B388 - - THUMB_FUNC_START sub_800B574 -sub_800B574: @ 0x0800B574 - push {r4, r5, r6, r7, lr} - mov r7, sl - mov r6, r9 - mov r5, r8 - push {r5, r6, r7} - sub sp, #0x1c - adds r6, r0, #0 - adds r7, r1, #0 - adds r5, r2, #0 - str r3, [sp, #0x14] - ldr r0, [sp, #0x3c] - lsls r0, r0, #0x10 - lsrs r0, r0, #0x10 - mov sl, r0 - ldr r0, [r6, #4] - mov r8, r0 - movs r2, #0 - ldrsh r1, [r6, r2] - mov r9, r1 - add r2, sp, #0x14 - add r3, sp, #0x18 - bl sub_800A8D8 - ldr r0, [r7, #4] - mov r1, sl - strh r1, [r0, #2] - mov r0, r9 - subs r0, #1 - ldr r4, [sp, #0x18] - cmp r4, r0 - bge _0800B688 - lsls r4, r4, #1 - add r4, r8 - movs r2, #0x80 - lsls r2, r2, #5 - mov r8, r2 - ldr r1, [sp, #0x14] - mov r0, r8 - bl DivArm - movs r2, #2 - ldrsh r1, [r4, r2] - lsls r0, r0, #0x10 - asrs r0, r0, #0x10 - cmp r1, r0 - bne _0800B688 - ldr r4, [r7, #8] - ldr r3, [sp, #0x18] - lsls r2, r3, #1 - adds r1, r2, r3 - lsls r1, r1, #2 - ldr r0, [r6, #8] - adds r0, r0, r1 - adds r0, #0xc - str r0, [r4, #4] - ldr r4, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r2, r2, r0 - movs r5, #2 - ldrsh r0, [r2, r5] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - str r0, [r4, #4] - mov r0, r9 - subs r0, #2 - cmp r3, r0 - bge _0800B63E - ldr r1, [sp, #0x14] - mov r0, r8 - bl DivArm - ldr r1, [r7, #4] - mov r8, r1 - ldr r3, [sp, #0x18] - ldr r2, [r6, #4] - lsls r4, r3, #1 - adds r2, r4, r2 - mov r5, sl - lsls r1, r5, #0x10 - asrs r1, r1, #0x10 - ldrh r2, [r2, #4] - adds r1, r1, r2 - subs r1, r1, r0 - mov r0, r8 - strh r1, [r0, #4] - ldr r1, [r7, #8] - adds r3, r4, r3 - lsls r3, r3, #2 - ldr r0, [r6, #8] - adds r0, r0, r3 - adds r0, #0x18 - str r0, [r1, #8] - ldr r2, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r4, r4, r0 - movs r1, #4 - ldrsh r0, [r4, r1] - b _0800B67A -_0800B63E: - ldr r1, [sp, #0x14] - mov r0, r8 - bl DivArm - ldr r2, [r7, #4] - mov r8, r2 - ldr r3, [sp, #0x18] - ldr r2, [r6, #4] - lsls r4, r3, #1 - adds r2, r4, r2 - mov r5, sl - lsls r1, r5, #0x10 - asrs r1, r1, #0x10 - ldrh r2, [r2, #2] - adds r1, r1, r2 - subs r1, r1, r0 - mov r0, r8 - strh r1, [r0, #4] - ldr r1, [r7, #8] - adds r3, r4, r3 - lsls r3, r3, #2 - ldr r0, [r6, #8] - adds r0, r0, r3 - adds r0, #0xc - str r0, [r1, #8] - ldr r2, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r4, r4, r0 - movs r1, #2 - ldrsh r0, [r4, r1] -_0800B67A: - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - str r0, [r2, #8] - b _0800B752 -_0800B688: - mov r1, sp - ldrh r0, [r6] - movs r4, #0 - strh r0, [r1, #2] - movs r0, #3 - strh r0, [r1] - ldr r0, [r6, #4] - str r0, [sp, #4] - ldr r0, [r6, #8] - str r0, [sp, #8] - ldr r0, [r6, #0xc] - str r0, [sp, #0xc] - ldr r0, [r6, #0x10] - str r0, [sp, #0x10] - ldr r1, [sp, #0x14] - mov r0, sp - adds r2, r5, #0 - bl sub_800A950 - cmp r0, #0 - bge _0800B6B8 - str r4, [r5, #8] - str r4, [r5, #4] - str r4, [r5] -_0800B6B8: - ldr r4, [r7, #8] - str r5, [r4, #4] - ldr r2, [r7, #0x10] - mov r8, r2 - ldr r2, [sp, #0x18] - ldr r1, [r6, #0xc] - lsls r0, r2, #1 - adds r3, r0, r1 - movs r1, #0 - ldrsh r0, [r3, r1] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - mov r1, r8 - str r0, [r1, #4] - mov r0, r9 - subs r0, #1 - cmp r2, r0 - blt _0800B704 - ldr r1, [r7, #4] - mov r2, sl - lsls r0, r2, #0x10 - asrs r0, r0, #0x10 - adds r0, #1 - strh r0, [r1, #4] - str r5, [r4, #8] - movs r5, #0 - ldrsh r0, [r3, r5] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - mov r1, r8 - str r0, [r1, #8] - b _0800B74E -_0800B704: - movs r0, #0x80 - lsls r0, r0, #5 - ldr r1, [sp, #0x14] - bl DivArm - ldr r2, [r7, #4] - mov r8, r2 - ldr r3, [sp, #0x18] - ldr r2, [r6, #4] - lsls r4, r3, #1 - adds r2, r4, r2 - mov r5, sl - lsls r1, r5, #0x10 - asrs r1, r1, #0x10 - ldrh r2, [r2, #2] - adds r1, r1, r2 - subs r1, r1, r0 - mov r0, r8 - strh r1, [r0, #4] - ldr r1, [r7, #8] - adds r3, r4, r3 - lsls r3, r3, #2 - ldr r0, [r6, #8] - adds r0, r0, r3 - adds r0, #0xc - str r0, [r1, #8] - ldr r2, [r7, #0x10] - ldr r0, [r6, #0xc] - adds r4, r4, r0 - movs r1, #2 - ldrsh r0, [r4, r1] - lsls r1, r0, #1 - adds r1, r1, r0 - lsls r1, r1, #2 - ldr r0, [r6, #0x10] - adds r0, r0, r1 - str r0, [r2, #8] -_0800B74E: - movs r0, #1 - b _0800B754 -_0800B752: - movs r0, #0 -_0800B754: - add sp, #0x1c - pop {r3, r4, r5} - mov r8, r3 - mov r9, r4 - mov sl, r5 - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800B574 - - THUMB_FUNC_START sub_800B764 -sub_800B764: @ 0x0800B764 - push {r4, r5, r6, r7, lr} - mov r7, r9 - mov r6, r8 - push {r6, r7} - sub sp, #4 - adds r6, r0, #0 - adds r5, r1, #0 - lsls r2, r2, #0x10 - lsrs r7, r2, #0x10 - mov r9, r7 - ldr r4, [r6] - ldr r0, [r5, #4] - mov ip, r0 - ldr r0, [r5, #8] - mov r8, r0 - movs r0, #4 - ands r0, r4 - cmp r0, #0 - beq _0800B7A8 - mov r0, ip - ldr r1, [r0, #4] - movs r0, #0 - strh r0, [r1] - adds r0, r6, #0 - adds r0, #8 - ldr r2, [r5, #0x10] - ldr r3, [r5] - lsls r1, r7, #0x10 - asrs r1, r1, #0x10 - str r1, [sp] - mov r1, ip - bl sub_800B198 - adds r3, r0, #0 -_0800B7A8: - movs r0, #8 - ands r4, r0 - cmp r4, #0 - beq _0800B7D0 - mov r4, r8 - ldr r1, [r4, #4] - movs r0, #0 - strh r0, [r1] - adds r0, r6, #0 - adds r0, #0x1c - ldr r2, [r5, #0x14] - ldr r3, [r5] - mov r4, r9 - lsls r1, r4, #0x10 - asrs r1, r1, #0x10 - str r1, [sp] - mov r1, r8 - bl sub_800B388 - adds r3, r0, #0 -_0800B7D0: - adds r0, r3, #0 - add sp, #4 - pop {r3, r4} - mov r8, r3 - mov r9, r4 - pop {r4, r5, r6, r7} - pop {r1} - bx r1 - - THUMB_FUNC_END sub_800B764 - diff --git a/asm/spline_800A950.s b/asm/spline_800A950.s new file mode 100644 index 00000000..b9fc96f5 --- /dev/null +++ b/asm/spline_800A950.s @@ -0,0 +1,281 @@ + .INCLUDE "macro.inc" + + .SYNTAX UNIFIED + + THUMB_FUNC_START sub_800A950 +sub_800A950: @ 0x0800A950 + push {r4, r5, r6, r7, lr} + mov r7, sl + mov r6, r9 + mov r5, r8 + push {r5, r6, r7} + sub sp, #0xb4 + str r0, [sp, #0xac] + str r2, [sp, #0x88] + movs r2, #0 + ldrsh r0, [r0, r2] + str r0, [sp, #0x8c] + ldr r3, [sp, #0xac] + ldr r3, [r3, #4] + mov r9, r3 + ldr r7, [sp, #0xac] + ldr r7, [r7, #8] + str r7, [sp, #0x90] + ldr r0, [sp, #0xac] + ldr r0, [r0, #0xc] + mov r8, r0 + add r0, sp, #0x80 + str r1, [r0] + cmp r1, #0 + bne _0800A986 + movs r1, #0 + str r1, [sp, #0x94] + b _0800A990 +_0800A986: + ldr r2, [sp, #0xac] + movs r3, #2 + ldrsh r0, [r2, r3] + subs r0, #1 + str r0, [sp, #0x94] +_0800A990: + mov r7, sp + adds r7, #0x10 + str r7, [sp, #0xa8] + ldr r1, [sp, #0xac] + ldrh r0, [r1, #2] + add r2, sp, #0x34 + add r1, sp, #0xc +_0800A99E: + str r2, [r1] + subs r2, #0xc + subs r1, #4 + cmp r1, sp + bge _0800A99E + lsls r0, r0, #0x10 + cmp r0, #0 + bne _0800A9B4 + movs r0, #1 + negs r0, r0 + b _0800AB48 +_0800A9B4: + ldr r2, [sp, #0xac] + movs r3, #2 + ldrsh r1, [r2, r3] + add r4, sp, #0x84 + mov r0, r9 + add r2, sp, #0x80 + adds r3, r4, #0 + bl sub_800A8D8 + ldr r1, [r4] + cmp r1, #0 + bne _0800A9D2 + movs r7, #1 + str r7, [sp, #0x98] + b _0800A9E6 +_0800A9D2: + ldr r2, [sp, #0xac] + movs r3, #2 + ldrsh r0, [r2, r3] + subs r0, #1 + movs r7, #0 + str r7, [sp, #0x98] + cmp r1, r0 + bne _0800A9E6 + movs r0, #2 + str r0, [sp, #0x98] +_0800A9E6: + ldr r1, [sp, #0xac] + ldr r0, [r1, #0x10] + ldr r4, _0800AA44 @ gUnknown_08591AB4 + cmp r0, #0 + beq _0800A9F2 + adds r4, r0, #0 +_0800A9F2: + movs r6, #0 + ldr r2, [sp, #0xac] + ldrh r2, [r2] + add r3, sp, #0xa4 + strh r2, [r3] + mov r7, sp + adds r7, #0x40 + str r7, [sp, #0xa0] + add r0, sp, #0x84 + mov sl, r0 + add r3, sp, #0x18 + add r2, sp, #0x14 + ldr r5, [sp, #0xa8] + adds r5, #2 + ldr r1, [sp, #0xa8] + mov ip, r1 + ldr r0, [sp, #0x94] + ldr r1, [sp, #0x8c] + adds r7, r0, #0 + muls r7, r1, r7 + lsls r0, r7, #2 + ldr r7, [sp, #0x90] + adds r0, r7, r0 + str r0, [sp, #0x9c] +_0800AA22: + add r0, sp, #0xa4 + ldrh r1, [r0] + mov r0, ip + strh r1, [r0] + mov r1, sl + ldr r0, [r1] + adds r0, r0, r6 + subs r1, r0, #1 + cmp r1, #0 + bgt _0800AA48 + mov r7, r9 + ldrh r0, [r7] + strh r0, [r5] + ldr r0, [sp, #0x90] + str r0, [r2] + b _0800AAA0 + .align 2, 0 +_0800AA44: .4byte gUnknown_08591AB4 +_0800AA48: + ldr r7, [sp, #0x94] + cmp r1, r7 + blt _0800AA66 + lsls r1, r7, #1 + mov r0, r9 + adds r0, r1, r0 + ldrh r0, [r0] + strh r0, [r5] + ldr r7, [sp, #0x9c] + str r7, [r2] + mov r0, r8 + cmp r0, #0 + beq _0800AAA0 + add r1, r8 + b _0800AA90 +_0800AA66: + lsls r0, r0, #1 + add r0, r9 + subs r0, #2 + ldrh r0, [r0] + strh r0, [r5] + mov r1, sl + ldr r0, [r1] + adds r1, r0, r6 + subs r0, r1, #1 + ldr r7, [sp, #0x8c] + muls r0, r7, r0 + lsls r0, r0, #2 + ldr r7, [sp, #0x90] + adds r0, r7, r0 + str r0, [r2] + mov r0, r8 + cmp r0, #0 + beq _0800AAA0 + lsls r0, r1, #1 + add r0, r8 + subs r1, r0, #2 +_0800AA90: + movs r7, #0 + ldrsh r1, [r1, r7] + lsls r0, r1, #1 + adds r0, r0, r1 + lsls r0, r0, #2 + adds r0, r4, r0 + str r0, [r3] + b _0800AAA2 +_0800AAA0: + str r4, [r3] +_0800AAA2: + adds r3, #0xc + adds r2, #0xc + adds r5, #0xc + movs r0, #0xc + add ip, r0 + adds r6, #1 + cmp r6, #3 + ble _0800AA22 + ldr r0, [sp] + ldr r1, [sp, #0xa0] + ldr r2, [sp, #0x98] + bl sub_800A7D8 + ldr r2, [sp, #0xac] + movs r3, #2 + ldrsh r1, [r2, r3] + ldr r2, [sp, #0x84] + adds r0, r2, #1 + cmp r1, r0 + ble _0800AAE6 + lsls r1, r2, #1 + add r1, r9 + movs r7, #2 + ldrsh r0, [r1, r7] + movs r3, #0 + ldrsh r2, [r1, r3] + subs r0, r0, r2 + lsls r2, r2, #0xc + ldr r1, [sp, #0x80] + subs r1, r1, r2 + bl DivArm + adds r5, r0, #0 + b _0800AAF4 +_0800AAE6: + lsls r0, r2, #1 + add r0, r9 + movs r7, #0 + ldrsh r0, [r0, r7] + lsls r0, r0, #0xc + ldr r1, [sp, #0x80] + subs r5, r1, r0 +_0800AAF4: + ldr r4, [sp, #0xa0] + movs r6, #0 + ldr r0, [sp, #0x8c] + cmp r6, r0 + bcs _0800AB46 + movs r7, #0x80 + lsls r7, r7, #5 + ldr r1, [sp, #0x88] + mov r8, r1 +_0800AB06: + ldr r0, [r4] + adds r1, r5, #0 + muls r1, r0, r1 + adds r0, r7, #0 + bl DivArm + ldr r1, [r4, #4] + adds r0, r0, r1 + adds r1, r5, #0 + muls r1, r0, r1 + adds r0, r7, #0 + bl DivArm + ldr r1, [r4, #8] + adds r0, r0, r1 + adds r1, r5, #0 + muls r1, r0, r1 + adds r0, r7, #0 + bl DivArm + ldr r1, [r4, #0xc] + adds r0, r0, r1 + mov r2, r8 + adds r2, #4 + mov r8, r2 + subs r2, #4 + stm r2!, {r0} + adds r4, #0x10 + adds r6, #1 + ldr r3, [sp, #0x8c] + cmp r6, r3 + bcc _0800AB06 +_0800AB46: + ldr r0, [sp, #0x84] +_0800AB48: + add sp, #0xb4 + pop {r3, r4, r5} + mov r8, r3 + mov r9, r4 + mov sl, r5 + pop {r4, r5, r6, r7} + pop {r1} + bx r1 + + THUMB_FUNC_END sub_800A950 + + .align 2, 0 diff --git a/asm/spline_800AF64.s b/asm/spline_800AF64.s new file mode 100644 index 00000000..665a27a2 --- /dev/null +++ b/asm/spline_800AF64.s @@ -0,0 +1,280 @@ + .INCLUDE "macro.inc" + + .SYNTAX UNIFIED + + THUMB_FUNC_START sub_800AF64 +sub_800AF64: @ 0x0800AF64 + push {r4, r5, r6, r7, lr} + mov r7, sl + mov r6, r9 + mov r5, r8 + push {r5, r6, r7} + sub sp, #0xb0 + adds r7, r0, #0 + str r2, [sp, #0x88] + movs r2, #0 + ldrsh r0, [r7, r2] + str r0, [sp, #0x8c] + ldr r3, [r7, #4] + mov r9, r3 + ldr r4, [r7, #8] + str r4, [sp, #0x90] + ldr r0, [r7, #0xc] + mov r8, r0 + ldr r2, [r7, #0x10] + mov sl, r2 + add r0, sp, #0x80 + str r1, [r0] + cmp r1, #0 + bne _0800AF98 + movs r3, #0 + str r3, [sp, #0x94] + b _0800AFA0 +_0800AF98: + movs r4, #2 + ldrsh r0, [r7, r4] + subs r0, #1 + str r0, [sp, #0x94] +_0800AFA0: + mov r0, sp + adds r0, #0x10 + str r0, [sp, #0xa4] + ldrh r0, [r7, #2] + add r2, sp, #0x34 + add r1, sp, #0xc +_0800AFAC: + str r2, [r1] + subs r2, #0xc + subs r1, #4 + cmp r1, sp + bge _0800AFAC + lsls r0, r0, #0x10 + cmp r0, #0 + bne _0800AFC2 + movs r0, #1 + negs r0, r0 + b _0800B15A +_0800AFC2: + movs r2, #2 + ldrsh r1, [r7, r2] + add r4, sp, #0x84 + mov r0, r9 + add r2, sp, #0x80 + adds r3, r4, #0 + bl sub_800A8D8 + ldr r1, [r4] + cmp r1, #0 + bne _0800AFDC + movs r3, #1 + b _0800AFEC +_0800AFDC: + movs r4, #2 + ldrsh r0, [r7, r4] + subs r0, #1 + movs r2, #0 + str r2, [sp, #0x98] + cmp r1, r0 + bne _0800AFEE + movs r3, #2 +_0800AFEC: + str r3, [sp, #0x98] +_0800AFEE: + movs r6, #0 + ldrh r4, [r7] + add r0, sp, #0xa8 + strh r4, [r0] + mov r1, sp + adds r1, #0x40 + str r1, [sp, #0xa0] + add r2, sp, #0x18 + mov ip, r6 + add r5, sp, #0x14 + mov r3, sp + adds r3, #0x84 + str r3, [sp, #0xac] + ldr r4, [sp, #0x94] + lsls r0, r4, #2 + ldr r1, [sp, #0x90] + adds r0, r0, r1 + str r0, [sp, #0x9c] +_0800B012: + ldr r3, [sp, #0xa4] + add r3, ip + add r4, sp, #0xa8 + ldrh r4, [r4] + strh r4, [r3] + ldr r1, [sp, #0xac] + ldr r0, [r1] + adds r0, r0, r6 + subs r1, r0, #1 + cmp r1, #0 + bgt _0800B048 + mov r4, r9 + ldrh r0, [r4] + strh r0, [r3, #2] + ldr r1, [sp, #0x90] + ldr r0, [r1] + str r0, [r5] + mov r3, sl + ldr r0, [r3] + cmp r0, #0 + bne _0800B0AC + ldr r4, _0800B044 @ gUnknown_08591AB4 + str r4, [r2] + b _0800B0B4 + .align 2, 0 +_0800B044: .4byte gUnknown_08591AB4 +_0800B048: + ldr r4, [sp, #0x94] + cmp r1, r4 + blt _0800B076 + lsls r1, r4, #1 + mov r4, r9 + adds r0, r1, r4 + ldrh r0, [r0] + strh r0, [r3, #2] + ldr r3, [sp, #0x9c] + ldr r0, [r3] + str r0, [r5] + mov r4, r8 + cmp r4, #0 + beq _0800B0B0 + adds r0, r1, r4 + movs r1, #0 + ldrsh r0, [r0, r1] + lsls r0, r0, #2 + add r0, sl + ldr r0, [r0] + cmp r0, #0 + bne _0800B0AC + b _0800B0B0 +_0800B076: + lsls r0, r0, #1 + add r0, r9 + subs r0, #2 + ldrh r0, [r0] + strh r0, [r3, #2] + ldr r4, [sp, #0xac] + ldr r0, [r4] + adds r1, r0, r6 + lsls r0, r1, #2 + ldr r3, [sp, #0x90] + adds r0, r0, r3 + subs r0, #4 + ldr r0, [r0] + str r0, [r5] + mov r4, r8 + cmp r4, #0 + beq _0800B0B0 + lsls r0, r1, #1 + add r0, r8 + subs r0, #2 + movs r1, #0 + ldrsh r0, [r0, r1] + lsls r0, r0, #2 + add r0, sl + ldr r0, [r0] + cmp r0, #0 + beq _0800B0B0 +_0800B0AC: + str r0, [r2] + b _0800B0B4 +_0800B0B0: + ldr r3, _0800B0F4 @ gUnknown_08591AB4 + str r3, [r2] +_0800B0B4: + adds r2, #0xc + movs r4, #0xc + add ip, r4 + adds r5, #0xc + adds r6, #1 + cmp r6, #3 + ble _0800B012 + ldr r0, [sp] + ldr r1, [sp, #0xa0] + ldr r2, [sp, #0x98] + bl sub_800A7D8 + movs r0, #2 + ldrsh r1, [r7, r0] + ldr r2, [sp, #0x84] + adds r0, r2, #1 + cmp r1, r0 + ble _0800B0F8 + lsls r1, r2, #1 + add r1, r9 + movs r2, #2 + ldrsh r0, [r1, r2] + movs r3, #0 + ldrsh r2, [r1, r3] + subs r0, r0, r2 + lsls r2, r2, #0xc + ldr r1, [sp, #0x80] + subs r1, r1, r2 + bl DivArm + adds r5, r0, #0 + b _0800B106 + .align 2, 0 +_0800B0F4: .4byte gUnknown_08591AB4 +_0800B0F8: + lsls r0, r2, #1 + add r0, r9 + movs r4, #0 + ldrsh r0, [r0, r4] + lsls r0, r0, #0xc + ldr r1, [sp, #0x80] + subs r5, r1, r0 +_0800B106: + ldr r4, [sp, #0xa0] + movs r6, #0 + ldr r0, [sp, #0x8c] + cmp r6, r0 + bcs _0800B158 + movs r7, #0x80 + lsls r7, r7, #5 + ldr r1, [sp, #0x88] + mov r8, r1 +_0800B118: + ldr r0, [r4] + adds r1, r5, #0 + muls r1, r0, r1 + adds r0, r7, #0 + bl DivArm + ldr r1, [r4, #4] + adds r0, r0, r1 + adds r1, r5, #0 + muls r1, r0, r1 + adds r0, r7, #0 + bl DivArm + ldr r1, [r4, #8] + adds r0, r0, r1 + adds r1, r5, #0 + muls r1, r0, r1 + adds r0, r7, #0 + bl DivArm + ldr r1, [r4, #0xc] + adds r0, r0, r1 + mov r2, r8 + adds r2, #4 + mov r8, r2 + subs r2, #4 + stm r2!, {r0} + adds r4, #0x10 + adds r6, #1 + ldr r3, [sp, #0x8c] + cmp r6, r3 + bcc _0800B118 +_0800B158: + ldr r0, [sp, #0x84] +_0800B15A: + add sp, #0xb0 + pop {r3, r4, r5} + mov r8, r3 + mov r9, r4 + mov sl, r5 + pop {r4, r5, r6, r7} + pop {r1} + bx r1 + + THUMB_FUNC_END sub_800AF64 + + .align 2, 0 diff --git a/include/spline.h b/include/spline.h index bc3392e8..5bb9b4a8 100644 --- a/include/spline.h +++ b/include/spline.h @@ -1,29 +1,54 @@ #ifndef GUARD_SPLINE_H #define GUARD_SPLINE_H -struct Struct0859E7D4 -{ - int x; - int y; -}; - struct Struct02003BE8 { /* 00 */ u16 unk_00; /* 02 */ u16 unk_02; /* 04 */ u16 * unk_04; - /* 08 */ struct Struct0859E7D4 * unk_08; + /* 08 */ int * unk_08; /* 0C */ int * unk_0C; /* 10 */ int * unk_10; }; +struct UnkSplineStruct1 +{ + /* 00 */ s16 unk_00; + /* 02 */ s16 unk_02; + /* 04 */ u32 * unk_04; + /* 08 */ s16 * unk_08; +}; + +struct UnkSplineStruct2 +{ + /* 00 */ s16 unk_00; + /* 02 */ s16 unk_02; + /* 04 */ s16 unk_04; + /* 06 */ s16 unk_06; + /* 08 */ u32 * unk_08; + /* 0C */ u32 * unk_0c; + /* 10 */ u32 * unk_10; + /* 14 */ s16 * unk_14; + /* 18 */ s16 * unk_18; + /* 1C */ s16 * unk_1c; + /* 20 */ s16 * unk_20; +}; + +struct UnkSplineStruct3 +{ + /* 00 */ int unk_00; + /* 04 */ int unk_04; + /* 08 */ int unk_08; + /* 0C */ int unk_0c; +}; + int sub_800A42C(int a, int b, int c); // ??? sub_800A4E8(???); // ??? sub_800A518(???); // ??? sub_800A680(???); // ??? sub_800A7D8(???); // ??? sub_800A8D8(???); -void sub_800A950(struct Struct02003BE8 *, int, int *); +int sub_800A950(void *, int, int *); // ??? sub_800AB58(???); // ??? sub_800ACEC(???); // ??? sub_800AE7C(???); diff --git a/include/worldmap.h b/include/worldmap.h index 255bdad0..f97c3f8c 100644 --- a/include/worldmap.h +++ b/include/worldmap.h @@ -826,7 +826,7 @@ int sub_80BCA1C(int); // ??? sub_80BCBAC(???); s8 sub_80BCCFC(s8, s8, s8); // ??? sub_80BCDE4(???); -int sub_80BCE34(int, int, s16, u16 *, struct Struct0859E7D4 *, int); +int sub_80BCE34(int, int, s16, u16 *, int *, int); void ResetGmStoryNode(void); int GetPlayChapterId(u32); int GetNextUnclearedNode(struct GMapData *); diff --git a/ldscript.txt b/ldscript.txt index 01c30683..2e1d977e 100644 --- a/ldscript.txt +++ b/ldscript.txt @@ -312,8 +312,10 @@ SECTIONS src/gamecontrol.o(.text); src/msg.o(.text); src/spline.o(.text); - asm/spline.o(.text); - src/spline_.o(.text); + asm/spline_800A950.o(.text); + src/spline_800AB58.o(.text); + asm/spline_800AF64.o(.text); + src/spline_800B16C.o(.text); src/eventscr_utils.o(.text); src/eventscr_gmap.o(.text); src/event.o(.text); diff --git a/src/bmdifficulty.c b/src/bmdifficulty.c index 2a12abf0..3a6c2243 100644 --- a/src/bmdifficulty.c +++ b/src/bmdifficulty.c @@ -1118,7 +1118,7 @@ void sub_8038F78(struct Text* th) { extern struct Struct02003BE8 gUnknown_02003BE8; extern u16 gUnknown_02003B88[]; -extern struct Struct0859E7D4 gUnknown_02003BA8[]; +extern int gUnknown_02003BA8[]; // obj data? const u16 CONST_DATA obj_859E79C[] = { @@ -1135,20 +1135,21 @@ u16 CONST_DATA gUnknown_0859E7C8[] = { 0x0C00, 0x0DEB, 0x1000, }; -struct Struct0859E7D4 CONST_DATA gUnknown_0859E7D4[] = { - { -56, 0, }, - { -70, 14, }, - { -74, 6, }, - { 38, -14, }, - { 42, -6, }, - { 24, 0, }, +int CONST_DATA gUnknown_0859E7D4[] = { + -56, 0, + -70, 14, + -74, 6, + 38, -14, + 42, -6, + 24, 0, }; -void sub_803901C(struct BMDifficultyProc* proc) { +void sub_803901C(struct BMDifficultyProc * proc) +{ int r7; int r8; - u16* iter1; - struct Struct0859E7D4* iter2; + u16 * iter1; + int * iter2; sub_8038F78(&gUnknown_020038C8[0].text[proc->labelIndex][0]); @@ -1163,11 +1164,12 @@ void sub_803901C(struct BMDifficultyProc* proc) { gUnknown_02003BE8.unk_02 = r8 = 6; - for (r7 = 0; r7 < r8; r7++) { + for (r7 = 0; r7 < r8; r7++) + { gUnknown_02003B88[r7] = DivArm(4096, iter1[r7] * 45); - gUnknown_02003BA8[r7].x = iter2[r7].x << 4; - gUnknown_02003BA8[r7].y = iter2[r7].y << 4; + gUnknown_02003BA8[r7 * 2 + 0] = iter2[r7 * 2 + 0] << 4; + gUnknown_02003BA8[r7 * 2 + 1] = iter2[r7 * 2 + 1] << 4; } proc->unk_34 = 0; @@ -1362,12 +1364,13 @@ u16 CONST_DATA gUnknown_0859E82C[] = { 0x16, 0x1E, 0x00, }; -struct Struct0859E7D4 CONST_DATA gUnknown_0859E838[] = { - { 0x980, 0x380, }, - { 0x8D0, 0x430, }, - { 0x960, 0x320, }, - { 0xA30, 0x2D0, }, - { 0x980, 0x380, }, +int CONST_DATA gUnknown_0859E838[] = +{ + 0x980, 0x380, + 0x8D0, 0x430, + 0x960, 0x320, + 0xA30, 0x2D0, + 0x980, 0x380, }; void sub_803943C(struct BMDifficultyProc* proc) { diff --git a/src/spline.c b/src/spline.c index 2a36aee5..ca494037 100644 --- a/src/spline.c +++ b/src/spline.c @@ -2,37 +2,6 @@ #include "spline.h" -struct UnkSplineStruct1 -{ - /* 00 */ s16 unk_00; - /* 02 */ s16 unk_02; - /* 04 */ u32 * unk_04; - /* 08 */ s16 * unk_08; -}; - -struct UnkSplineStruct2 -{ - /* 00 */ s16 unk_00; - /* 02 */ s16 unk_02; - /* 04 */ s16 unk_04; - /* 06 */ s16 unk_06; - /* 08 */ u32 * unk_08; - /* 0C */ u32 * unk_0c; - /* 10 */ u32 * unk_10; - /* 14 */ s16 * unk_14; - /* 18 */ s16 * unk_18; - /* 1C */ s16 * unk_1c; - /* 20 */ s16 * unk_20; -}; - -struct UnkSplineStruct3 -{ - /* 00 */ int unk_00; - /* 04 */ int unk_04; - /* 08 */ int unk_08; - /* 0C */ int unk_0c; -}; - //! FE8U = 0x0800A42C int sub_800A42C(int val, int start, int end) { diff --git a/src/spline_.c b/src/spline_.c deleted file mode 100644 index 52b2283a..00000000 --- a/src/spline_.c +++ /dev/null @@ -1,98 +0,0 @@ -#include "global.h" - -#include "spline.h" - -//! FE8U = 0x0800B7E0 -int _DivArm1(int arg_0, int arg_1, int arg_2) -{ - int r1; - int r4; - int r5; - int i; - - if (arg_2 == 0) - { - return DivArm(arg_1, arg_0 << 12); - } - - r4 = arg_0 * 0x1000; - - if (0x1000 - DivArm(arg_1, r4) < 0) - { - r1 = DivArm(arg_1, r4) - 0x1000; - } - else - { - r1 = 0x1000 - DivArm(arg_1, r4); - } - - r5 = r1; - - for (i = 0; i < arg_2; i++) - { - r1 = DivArm(0x1000, r1 * r5); - } - - return 0x1000 - r1; -} - -//! FE8U = 0x0800B84C -int _DivArm2(int arg_0, int arg_1, int arg_2) -{ - int r1; -#if NONMATCHING - int r5; -#else - register int r5 asm("r5"); -#endif - int r6; - int i; - - if (arg_2 == 0) - { - return DivArm(arg_1, arg_0 << 12); - } - - r6 = arg_1 / 2; - - if (arg_0 < r6) - { - if (DivArm(r6, arg_0 * 0x1000) < 0) - { - r1 = -DivArm(r6, arg_0 * 0x1000); - } - else - { - r1 = DivArm(r6, arg_0 * 0x1000); - } - } - else - { - if (0x1000 - DivArm(r6, (arg_0 - r6) * 0x1000) < 0) - { - r1 = DivArm(r6, (arg_0 - r6) * 0x1000) - 0x1000; - } - else - { - r1 = 0x1000 - DivArm(r6, (arg_0 - r6) * 0x1000); - } - } - - r5 = r1; - - for (i = 0; i < arg_2; i++) - { - r1 = DivArm(0x1000, r1 * r5); - } - - if (arg_0 < r6) - { - r1 = r1 / 2; - } - else - { - r1 = (0x1000 - r1) / 2 + 0x800; - } - - return r1; -} diff --git a/src/spline_800AB58.c b/src/spline_800AB58.c new file mode 100644 index 00000000..949a5107 --- /dev/null +++ b/src/spline_800AB58.c @@ -0,0 +1,251 @@ +#include "global.h" + +#include "spline.h" + +//! FE8U = 0x0800AB58 +void sub_800AB58(struct UnkSplineStruct3 * arg_0, int * arg_1) +{ + int r4; + int r5; + int r7; + int r8; + + int pa; + int pb; + int pc; + int pd; + + int var_1; + int var_2; + int var_3; + int var_4; + int var_5; + int var_6; + int var_7; + int var_8; + int var_9; + + int sp_00; + int sp_04; + int sp_08; + int sp_0c; + + pa = arg_0->unk_00; + pb = arg_0->unk_04; + pc = arg_0->unk_08; + pd = arg_0->unk_0c; + + r4 = DivArm( + DivArm(0x1000, pa * pa) + DivArm(0x1000, pb * pb) + DivArm(0x1000, pc * pc) + DivArm(0x1000, pd * pd), + 0x2000000); + + r8 = DivArm(0x1000, pa * r4); + r5 = DivArm(0x1000, pb * r4); + r7 = DivArm(0x1000, pc * r4); + + var_1 = DivArm(0x1000, pd * r8); + var_2 = DivArm(0x1000, pd * r5); + var_3 = DivArm(0x1000, pd * r7); + + var_5 = DivArm(0x1000, pa * r8); + var_7 = DivArm(0x1000, pa * r5); + var_8 = DivArm(0x1000, pa * r7); + + var_6 = DivArm(0x1000, pb * r5); + var_9 = DivArm(0x1000, pb * r7); + var_4 = DivArm(0x1000, pc * r7); + + arg_1[0] = 0x1000 - (var_6 + var_4); + arg_1[1] = var_7 + var_3; + arg_1[2] = var_8 - var_2; + + arg_1[4] = var_7 - var_3; + arg_1[5] = 0x1000 - (var_4 + var_5); + arg_1[6] = var_9 + var_1; + + arg_1[8] = var_8 + var_2; + arg_1[9] = var_9 - var_1; + arg_1[10] = 0x1000 - (var_5 + var_6); + + arg_1[14] = 0; + arg_1[13] = 0; + arg_1[12] = 0; + + arg_1[11] = 0; + arg_1[7] = 0; + arg_1[3] = 0; + + arg_1[15] = 0x1000; + + return; +} + +//! FE8U = 0x0800ACEC +void sub_800ACEC(struct UnkSplineStruct3 * arg_0, int * arg_1) +{ + int r4; + int r5; + int r7; + int r8; + + int p_a; + int p_b; + int p_c; + int p_d; + + int var_1; + int var_2; + int var_3; + int var_4; + int var_5; + int var_6; + int var_7; + int var_8; + int var_9; + + int sp_00; + int sp_04; + int sp_08; + int sp_0c; + + p_a = arg_0->unk_00; + p_b = arg_0->unk_04; + p_c = arg_0->unk_08; + p_d = arg_0->unk_0c; + + r4 = DivArm( + DivArm(0x1000, p_a * p_a) + DivArm(0x1000, p_b * p_b) + DivArm(0x1000, p_c * p_c) + DivArm(0x1000, p_d * p_d), + 0x2000000); + + r8 = DivArm(0x1000, p_a * r4); + r5 = DivArm(0x1000, p_b * r4); + r7 = DivArm(0x1000, p_c * r4); + + var_1 = DivArm(0x1000, p_d * r8); + var_2 = DivArm(0x1000, p_d * r5); + var_3 = DivArm(0x1000, p_d * r7); + + var_5 = DivArm(0x1000, p_a * r8); + var_7 = DivArm(0x1000, p_a * r5); + var_8 = DivArm(0x1000, p_a * r7); + + var_6 = DivArm(0x1000, p_b * r5); + var_9 = DivArm(0x1000, p_b * r7); + var_4 = DivArm(0x1000, p_c * r7); + + arg_1[0] = 0x1000 - (var_6 + var_4); + arg_1[1] = var_7 + var_3; + arg_1[2] = var_8 - var_2; + arg_1[3] = var_7 - var_3; + arg_1[4] = 0x1000 - (var_4 + var_5); + arg_1[5] = var_9 + var_1; + arg_1[6] = var_8 + var_2; + arg_1[7] = var_9 - var_1; + arg_1[8] = 0x1000 - (var_5 + var_6); + + arg_1[11] = 0x1000; + arg_1[10] = 0x1000; + arg_1[9] = 0x1000; + + return; +} + +struct UnkSplineSub800AE7C +{ + /* 00 */ int unk_00; + /* 04 */ int unk_04; + /* 08 */ u16 unk_08; + /* 0C */ s16 * unk_0c; + /* 10 */ int * unk_10; + /* 14 */ int * unk_14; + /* 18 */ int * unk_18; + /* 1C */ u16 unk_1c; + /* 20 */ s16 * unk_20; + /* 24 */ int * unk_24; + /* 28 */ int * unk_28; + /* 2C */ int * unk_2c; + /* 30 */ u16 unk_30; + /* 34 */ s16 * unk_34; + /* 38 */ int * unk_38; + /* 3C */ int * unk_3c; + /* 40 */ int * unk_40; +}; + +struct Struct02003BE8_B +{ + /* 00 */ u16 unk_00; + /* 02 */ u16 unk_02; + /* 04 */ u16 * unk_04; + /* 08 */ void * unk_08; + /* 0C */ int * unk_0c; + /* 10 */ int * unk_10; +}; + +//! FE8U = 0x0800AE7C +int sub_800AE7C(struct UnkSplineSub800AE7C * arg_0, int arg_1, int * arg_2, int * arg_3, int * arg_4) +{ + int ret; + struct Struct02003BE8_B local; + + int flags = arg_0->unk_00; + + if ((flags & 4) != 0) + { + local.unk_02 = arg_0->unk_08; + local.unk_00 = 3; + local.unk_04 = arg_0->unk_0c; + local.unk_08 = arg_0->unk_10; + local.unk_0c = arg_0->unk_14; + local.unk_10 = arg_0->unk_18; + + ret = sub_800A950(&local, arg_1, arg_2); + + if (ret < 0) + { + arg_2[2] = 0; + arg_2[1] = 0; + arg_2[0] = 0; + } + } + + if ((flags & 8) != 0) + { + local.unk_02 = arg_0->unk_1c; + local.unk_00 = 4; + local.unk_04 = arg_0->unk_20; + local.unk_08 = arg_0->unk_24; + local.unk_0c = arg_0->unk_28; + local.unk_10 = arg_0->unk_2c; + + ret = sub_800A950(&local, arg_1, arg_3); + + if (ret < 0) + { + arg_3[2] = 0; + arg_3[1] = 0; + arg_3[0] = 0; + arg_3[3] = 1; + } + } + + if ((flags & 0x10) != 0) + { + local.unk_02 = arg_0->unk_30; + local.unk_00 = 3; + local.unk_04 = arg_0->unk_34; + local.unk_08 = arg_0->unk_38; + local.unk_0c = arg_0->unk_3c; + local.unk_10 = arg_0->unk_40; + + ret = sub_800A950(&local, arg_1, arg_4); + + if (ret < 0) + { + arg_4[2] = 0; + arg_4[1] = 0; + arg_4[0] = 0; + } + } + + return ret; +} diff --git a/src/spline_800B16C.c b/src/spline_800B16C.c new file mode 100644 index 00000000..ce680496 --- /dev/null +++ b/src/spline_800B16C.c @@ -0,0 +1,415 @@ +#include "global.h" + +#include "spline.h" + +struct InputStructA +{ + /* 00 */ s16 unk_00; + /* 04 */ s16 * unk_04; + /* 08 */ void * unk_08; + /* 0C */ s16 * unk_0c; + /* 10 */ void * unk_10; +}; + +struct InputStructB +{ + /* 00 */ int unk_00; + /* 04 */ s16 * unk_04; + /* 08 */ void ** unk_08; + /* 0C */ int unk_0c; + /* 10 */ void ** unk_10; +}; + +struct astruct_13 +{ + /* 00 */ int unk_00; + /* 04 */ struct InputStructB * unk_04; + /* 08 */ struct InputStructB * unk_08; + /* 0C */ int unk_0c; + /* 10 */ int * unk_10; + /* 14 */ int * unk_14; +}; + +struct astruct_12 +{ + /* 00 */ int unk_00; + /* 04 */ int unk_04; + /* 08 */ struct InputStructA unk_08; + /* 1C */ struct InputStructA unk_1c; +}; + +struct Struct02003BE8_B +{ + /* 00 */ u16 unk_00; + /* 02 */ u16 unk_02; + /* 04 */ u16 * unk_04; + /* 08 */ void * unk_08; + /* 0C */ int * unk_0c; + /* 10 */ int * unk_10; +}; + +int sub_800A8D8(s16 *, s16, int *, int *); + +struct Params +{ + s16 count; + s16 index; + s16 * data; + int * coefficients; + u32 * intermediateResults; + u32 * unk_10; +}; + +int sub_800AF64(struct Params *, int, int *); + +struct astruct_16 +{ + int unk_00; + struct Params * unk_04; + struct Params * unk_08; + int unk_0c; + int * unk_10; + int * unk_14; +}; + +//! FE8U = 0x0800B16C +int sub_800B16C(struct astruct_16 * arg_0) +{ + int ret; + + if (arg_0->unk_04 != 0) + { + ret = sub_800AF64(arg_0->unk_04, arg_0->unk_00, arg_0->unk_10); + } + + if (arg_0->unk_08 != 0) + { + ret = sub_800AF64(arg_0->unk_08, arg_0->unk_00, arg_0->unk_14); + } + + return ret; +} + +//! FE8U = 0x0800B198 +int sub_800B198(struct InputStructA * arg_0, struct InputStructB * arg_1, int * arg_2, int arg_3, s16 arg_4) +{ + s16 * r8; + struct Struct02003BE8_B local; + int r9; + int sp_18; + + sub_800A8D8(r8 = arg_0->unk_04, r9 = arg_0->unk_00, &arg_3, &sp_18); + + arg_1->unk_04[1] = arg_4; + + if ((sp_18 < r9 - 1) && (r8[sp_18 + 1] == (s16)DivArm(0x1000, arg_3))) + { + arg_1->unk_08[1] = &((int *)(arg_0->unk_08))[sp_18 * 3] + 3; + arg_1->unk_10[1] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 1] * 3]; + + if (sp_18 < r9 - 2) + { + arg_1->unk_04[2] = (arg_4 + arg_0->unk_04[sp_18 + 2]) - DivArm(0x1000, arg_3); + arg_1->unk_08[2] = &((int *)(arg_0->unk_08))[sp_18 * 3] + 6; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 2] * 3]; + } + else + { + arg_1->unk_04[2] = (arg_4 + arg_0->unk_04[sp_18 + 1]) - DivArm(0x1000, arg_3); + arg_1->unk_08[2] = &((int *)(arg_0->unk_08))[sp_18 * 3] + 3; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 1] * 3]; + } + } + else + { + local.unk_02 = arg_0->unk_00; + local.unk_00 = 3; + local.unk_04 = arg_0->unk_04; + local.unk_08 = (void *)arg_0->unk_08; + local.unk_0c = (void *)arg_0->unk_0c; + local.unk_10 = (void *)arg_0->unk_10; + + if (sub_800A950(&local, arg_3, arg_2) < 0) + { + arg_2[2] = 0; + arg_2[1] = 0; + arg_2[0] = 0; + } + + arg_1->unk_08[1] = arg_2; + arg_1->unk_10[1] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18] * 3]; + + if (sp_18 >= r9 - 1) + { + arg_1->unk_04[2] = arg_4 + 1; + arg_1->unk_08[2] = arg_2; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18] * 3]; + } + else + { + arg_1->unk_04[2] = (arg_4 + arg_0->unk_04[sp_18 + 1]) - DivArm(0x1000, arg_3); + arg_1->unk_08[2] = &((int *)(arg_0->unk_08))[sp_18 * 3] + 3; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 1] * 3]; + } + + return 1; + } + + return 0; +} + +//! FE8U = 0x0800B388 +int sub_800B388(struct InputStructA * arg_0, struct InputStructB * arg_1, int * arg_2, int arg_3, s16 arg_4) +{ + s16 * r8; + struct Struct02003BE8_B local; + int r9; + int sp_18; + + sub_800A8D8(r8 = arg_0->unk_04, r9 = arg_0->unk_00, &arg_3, &sp_18); + + arg_1->unk_04[1] = arg_4; + + if ((sp_18 < r9 - 1) && (r8[sp_18 + 1] == (s16)DivArm(0x1000, arg_3))) + { + arg_1->unk_08[1] = &((int *)(arg_0->unk_08))[sp_18 * 4] + 4; + arg_1->unk_10[1] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 1] * 3]; + + if (sp_18 < r9 - 2) + { + arg_1->unk_04[2] = (arg_4 + arg_0->unk_04[sp_18 + 2]) - DivArm(0x1000, arg_3); + arg_1->unk_08[2] = &((int *)(arg_0->unk_08))[sp_18 * 4] + 8; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 2] * 3]; + } + else + { + arg_1->unk_04[2] = (arg_4 + arg_0->unk_04[sp_18 + 1]) - DivArm(0x1000, arg_3); + arg_1->unk_08[2] = &((int *)(arg_0->unk_08))[sp_18 * 4] + 4; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 1] * 3]; + } + } + else + { + local.unk_02 = arg_0->unk_00; + local.unk_00 = 4; + local.unk_04 = arg_0->unk_04; + local.unk_08 = (void *)arg_0->unk_08; + local.unk_0c = (void *)arg_0->unk_0c; + local.unk_10 = (void *)arg_0->unk_10; + + if (sub_800A950(&local, arg_3, arg_2) < 0) + { + arg_2[2] = 0; + arg_2[1] = 0; + arg_2[0] = 0; + arg_2[3] = 1; + } + + arg_1->unk_08[1] = arg_2; + arg_1->unk_10[1] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18] * 3]; + + if (sp_18 >= r9 - 1) + { + arg_1->unk_04[2] = arg_4 + 1; + arg_1->unk_08[2] = arg_2; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18] * 3]; + } + else + { + arg_1->unk_04[2] = (arg_4 + arg_0->unk_04[sp_18 + 1]) - DivArm(0x1000, arg_3); + arg_1->unk_08[2] = &((int *)(arg_0->unk_08))[sp_18 * 4] + 4; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 1] * 3]; + } + + return 1; + } + + return 0; +} + +//! FE8U = 0x0800B574 +int sub_800B574(struct InputStructA * arg_0, struct InputStructB * arg_1, int * arg_2, int arg_3, s16 arg_4) +{ + s16 * r8; + struct Struct02003BE8_B local; + int r9; + int sp_18; + + sub_800A8D8(r8 = arg_0->unk_04, r9 = arg_0->unk_00, &arg_3, &sp_18); + + arg_1->unk_04[1] = arg_4; + + if ((sp_18 < r9 - 1) && (r8[sp_18 + 1] == (s16)DivArm(0x1000, arg_3))) + { + arg_1->unk_08[1] = &((int *)(arg_0->unk_08))[sp_18 * 3] + 3; + arg_1->unk_10[1] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 1] * 3]; + + if (sp_18 < r9 - 2) + { + arg_1->unk_04[2] = (arg_4 + arg_0->unk_04[sp_18 + 2]) - DivArm(0x1000, arg_3); + arg_1->unk_08[2] = &((int *)(arg_0->unk_08))[sp_18 * 3] + 6; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 2] * 3]; + } + else + { + arg_1->unk_04[2] = (arg_4 + arg_0->unk_04[sp_18 + 1]) - DivArm(0x1000, arg_3); + arg_1->unk_08[2] = &((int *)(arg_0->unk_08))[sp_18 * 3] + 3; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 1] * 3]; + } + } + else + { + local.unk_02 = arg_0->unk_00; + local.unk_00 = 3; + local.unk_04 = arg_0->unk_04; + local.unk_08 = (void *)arg_0->unk_08; + local.unk_0c = (void *)arg_0->unk_0c; + local.unk_10 = (void *)arg_0->unk_10; + + if (sub_800A950(&local, arg_3, arg_2) < 0) + { + arg_2[2] = 0; + arg_2[1] = 0; + arg_2[0] = 0; + } + + arg_1->unk_08[1] = arg_2; + arg_1->unk_10[1] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18] * 3]; + + if (sp_18 >= r9 - 1) + { + arg_1->unk_04[2] = arg_4 + 1; + arg_1->unk_08[2] = arg_2; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18] * 3]; + } + else + { + arg_1->unk_04[2] = (arg_4 + arg_0->unk_04[sp_18 + 1]) - DivArm(0x1000, arg_3); + arg_1->unk_08[2] = &((int *)(arg_0->unk_08))[sp_18 * 3] + 3; + arg_1->unk_10[2] = &((int *)(arg_0->unk_10))[arg_0->unk_0c[sp_18 + 1] * 3]; + } + + return 1; + } + + return 0; +} + +//! FE8U = 0x0800B764 +int sub_800B764(struct astruct_12 * arg_0, struct astruct_13 * arg_1, s16 arg_2) +{ + int ret; + int flags = arg_0->unk_00; + + struct InputStructB * ip = arg_1->unk_04; + struct InputStructB * r8 = arg_1->unk_08; + + if ((flags & 4) != 0) + { + ip->unk_04[0] = 0; + ret = sub_800B198(&arg_0->unk_08, ip, arg_1->unk_10, arg_1->unk_00, arg_2); + } + + if ((flags & 8) != 0) + { + r8->unk_04[0] = 0; + ret = sub_800B388(&arg_0->unk_1c, r8, arg_1->unk_14, arg_1->unk_00, arg_2); + } + + return ret; +} + +//! FE8U = 0x0800B7E0 +int _DivArm1(int arg_0, int arg_1, int arg_2) +{ + int r1; + int r4; + int r5; + int i; + + if (arg_2 == 0) + { + return DivArm(arg_1, arg_0 << 12); + } + + r4 = arg_0 * 0x1000; + + if (0x1000 - DivArm(arg_1, r4) < 0) + { + r1 = DivArm(arg_1, r4) - 0x1000; + } + else + { + r1 = 0x1000 - DivArm(arg_1, r4); + } + + r5 = r1; + + for (i = 0; i < arg_2; i++) + { + r1 = DivArm(0x1000, r1 * r5); + } + + return 0x1000 - r1; +} + +//! FE8U = 0x0800B84C +int _DivArm2(int arg_0, int arg_1, int arg_2) +{ + int r1; +#if NONMATCHING + int r5; +#else + register int r5 asm("r5"); +#endif + int r6; + int i; + + if (arg_2 == 0) + { + return DivArm(arg_1, arg_0 << 12); + } + + r6 = arg_1 / 2; + + if (arg_0 < r6) + { + if (DivArm(r6, arg_0 * 0x1000) < 0) + { + r1 = -DivArm(r6, arg_0 * 0x1000); + } + else + { + r1 = DivArm(r6, arg_0 * 0x1000); + } + } + else + { + if (0x1000 - DivArm(r6, (arg_0 - r6) * 0x1000) < 0) + { + r1 = DivArm(r6, (arg_0 - r6) * 0x1000) - 0x1000; + } + else + { + r1 = 0x1000 - DivArm(r6, (arg_0 - r6) * 0x1000); + } + } + + r5 = r1; + + for (i = 0; i < arg_2; i++) + { + r1 = DivArm(0x1000, r1 * r5); + } + + if (arg_0 < r6) + { + r1 = r1 / 2; + } + else + { + r1 = (0x1000 - r1) / 2 + 0x800; + } + + return r1; +} diff --git a/src/worldmap_mapmu.c b/src/worldmap_mapmu.c index 400f7b0f..02fd68fa 100644 --- a/src/worldmap_mapmu.c +++ b/src/worldmap_mapmu.c @@ -22,7 +22,7 @@ extern u16 gUnknown_08A3E2F8[]; extern struct Struct02003BE8 gUnknown_0201B3A4[]; extern u16 gUnknown_0201B104[]; -extern struct Struct0859E7D4 gUnknown_0201B1E4[]; +extern int gUnknown_0201B1E4[]; int CONST_DATA gUnknown_08A3E22C[] = { @@ -159,7 +159,7 @@ void GmMuPrim_80BD444(struct GMapMuPrimProc * proc) unkSplineStruct->unk_00 = 0; unkSplineStruct->unk_00 = 2; unkSplineStruct->unk_04 = gUnknown_0201B104 + proc->unk_2a * 0x10; - unkSplineStruct->unk_08 = gUnknown_0201B1E4 + proc->unk_2a * 8; + unkSplineStruct->unk_08 = gUnknown_0201B1E4 + proc->unk_2a * 0x10; unkSplineStruct->unk_0C = gUnknown_08A3E22C; unkSplineStruct->unk_10 = gUnknown_08A3E23C; unkSplineStruct->unk_02 = sub_80BCE34(proc->unk_2d, proc->unk_2e, proc->unk_50, unkSplineStruct->unk_04, unkSplineStruct->unk_08, 4); diff --git a/src/worldmap_path.c b/src/worldmap_path.c index f9c7ce74..d4cb091f 100644 --- a/src/worldmap_path.c +++ b/src/worldmap_path.c @@ -1786,7 +1786,7 @@ int sub_80BCDE4(int nodeA, int nodeB, int * startingNode) } //! FE8U = 0x080BCE34 -int sub_80BCE34(int nodeA, int nodeB, s16 c, u16 * d, struct Struct0859E7D4 * e, int f) +int sub_80BCE34(int nodeA, int nodeB, s16 c, u16 * d, int * e, int f) { int nodeId; int pathId; @@ -1805,11 +1805,11 @@ int sub_80BCE34(int nodeA, int nodeB, s16 c, u16 * d, struct Struct0859E7D4 * e, nodeId = pathId[gWMPathData].node[startingNodeIdx]; - e->x = nodeId[gWMNodeData].x << (f); - e->y = nodeId[gWMNodeData].y << (f); + e[0] = nodeId[gWMNodeData].x << (f); + e[1] = nodeId[gWMNodeData].y << (f); d++; - e++; + e += 2; local_24 = sub_80BC3D4(pathId); @@ -1819,11 +1819,11 @@ int sub_80BCE34(int nodeA, int nodeB, s16 c, u16 * d, struct Struct0859E7D4 * e, { *d = DivArm(0x1000, pathId[gWMPathData].movementPath[i].elapsedTime * c); - e->x = pathId[gWMPathData].movementPath[i].x << (f); - e->y = pathId[gWMPathData].movementPath[i].y << (f); + e[0] = pathId[gWMPathData].movementPath[i].x << (f); + e[1] = pathId[gWMPathData].movementPath[i].y << (f); d++; - e++; + e += 2; } } else @@ -1832,19 +1832,19 @@ int sub_80BCE34(int nodeA, int nodeB, s16 c, u16 * d, struct Struct0859E7D4 * e, { *d = DivArm(0x1000, c * (0x1000 - (pathId[gWMPathData].movementPath[i].elapsedTime))); - e->x = pathId[gWMPathData].movementPath[i].x << (f); - e->y = pathId[gWMPathData].movementPath[i].y << (f); + e[0] = pathId[gWMPathData].movementPath[i].x << (f); + e[1] = pathId[gWMPathData].movementPath[i].y << (f); d++; - e++; + e += 2; } } *d = c; nodeId = pathId[gWMPathData].node[1 - startingNodeIdx]; - e->x = nodeId[gWMNodeData].x << (f); - e->y = nodeId[gWMNodeData].y << (f); + e[0] = nodeId[gWMNodeData].x << (f); + e[1] = nodeId[gWMNodeData].y << (f); return local_24 + 2; }