diff --git a/include/kernel-5.19 b/include/kernel-5.19 index 64d6af5b805fe9..54d34cae0651f1 100644 --- a/include/kernel-5.19 +++ b/include/kernel-5.19 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.19 = -LINUX_KERNEL_HASH-5.19 = ff240c579b9ee1affc318917de07394fc1c3bb49dac25ec1287370c2e15005a8 +LINUX_VERSION-5.19 = .1 +LINUX_KERNEL_HASH-5.19.1 = f4e27b926ea2c66b808db1f5706254cf92a8899e2108eedb0c3a7d12499aea55 diff --git a/package/boot/arm-trusted-firmware-rockchip-vendor/pack-firmware.sh b/package/boot/arm-trusted-firmware-rockchip-vendor/pack-firmware.sh index 2689a36e08c8aa..6dfb89172bfcaa 100755 --- a/package/boot/arm-trusted-firmware-rockchip-vendor/pack-firmware.sh +++ b/package/boot/arm-trusted-firmware-rockchip-vendor/pack-firmware.sh @@ -18,7 +18,7 @@ case "$VARIANT" in LOADER="rk33/rk3399_miniloader_v1.26.bin" ;; "rk3568") - ATF="rk35/rk3568_bl31_v1.34.elf" + ATF="rk35/rk3568_bl31_v1.28.elf" DDR="rk35/rk3568_ddr_1560MHz_v1.13.bin" ;; "rk3588") diff --git a/package/boot/arm-trusted-firmware-rockchip-vendor/src/bin/rk35/rk3568_bl31_v1.28.elf b/package/boot/arm-trusted-firmware-rockchip-vendor/src/bin/rk35/rk3568_bl31_v1.28.elf new file mode 100644 index 00000000000000..459d0662702e4c Binary files /dev/null and b/package/boot/arm-trusted-firmware-rockchip-vendor/src/bin/rk35/rk3568_bl31_v1.28.elf differ diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index 56daf22c526d62..f5564c0a397a76 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -133,7 +133,7 @@ define U-Boot/fastrhino-r66s-rk3568 fastrhino_r66s DEPENDS:=+PACKAGE_u-boot-fastrhino-r66s-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.34.elf + ATF:=rk3568_bl31_v1.28.elf DDR:=rk3568_ddr_1560MHz_v1.13.bin endef @@ -144,7 +144,7 @@ define U-Boot/nanopi-r5s-rk3568 friendlyelec_nanopi-r5s DEPENDS:=+PACKAGE_u-boot-nanopi-r5s-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.34.elf + ATF:=rk3568_bl31_v1.28.elf DDR:=rk3568_ddr_1560MHz_v1.13.bin endef @@ -168,6 +168,17 @@ define U-Boot/rockpro64-rk3399 ATF:=rk3399_bl31.elf endef +define U-Boot/station-p2-rk3568 + BUILD_SUBTARGET:=armv8 + NAME:=StationP2 + BUILD_DEVICES:= \ + firefly_station-p2 + DEPENDS:=+PACKAGE_u-boot-station-p2-rk3568:arm-trusted-firmware-rk3568 + PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor + ATF:=rk3568_bl31_v1.28.elf + DDR:=rk3568_ddr_1560MHz_v1.13.bin +endef + UBOOT_TARGETS := \ doornet2-rk3399 \ fastrhino-r66s-rk3568 \ @@ -181,7 +192,8 @@ UBOOT_TARGETS := \ nanopi-r2c-rk3328 \ nanopi-r2s-rk3328 \ orangepi-r1-plus-rk3328 \ - orangepi-r1-plus-lts-rk3328 + orangepi-r1-plus-lts-rk3328 \ + station-p2-rk3568 UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes diff --git a/package/boot/uboot-rockchip/patches/017-rockchip-rk3568-Add-support-for-Station-P2.patch b/package/boot/uboot-rockchip/patches/017-rockchip-rk3568-Add-support-for-Station-P2.patch new file mode 100644 index 00000000000000..da1070da4e1824 --- /dev/null +++ b/package/boot/uboot-rockchip/patches/017-rockchip-rk3568-Add-support-for-Station-P2.patch @@ -0,0 +1,78 @@ +From 18e3719c5d5b1573c29d137c1244ca23277750b2 Mon Sep 17 00:00:00 2001 +From: huangjf +Date: Thu, 7 Apr 2022 16:22:56 +0800 +Subject: [PATCH] rockchip: rk3568: Add support for Station P2 + +--- + configs/station-p2-rk3568_defconfig | 59 +++++++++++++++++++++++++++++ + 1 file changed, 59 insertions(+) + create mode 100644 configs/station-p2-rk3568_defconfig + +diff --git a/configs/station-p2-rk3568_defconfig b/configs/station-p2-rk3568_defconfig +new file mode 100644 +index 0000000000..435be99edf +--- /dev/null ++++ b/configs/station-p2-rk3568_defconfig +@@ -0,0 +1,59 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00a00000 ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" ++CONFIG_ROCKCHIP_RK3568=y ++CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y ++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y ++CONFIG_SPL_MMC=y ++CONFIG_SPL_SERIAL=y ++CONFIG_SPL_STACK_R_ADDR=0x600000 ++CONFIG_TARGET_EVB_RK3568=y ++CONFIG_DEBUG_UART_BASE=0xFE660000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART=y ++CONFIG_SYS_LOAD_ADDR=0xc00800 ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SPL_ATF=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++# CONFIG_CMD_SETEXPR is not set ++# CONFIG_SPL_DOS_PARTITION is not set ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SPL_SYSCON=y ++CONFIG_SPL_CLK=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MISC=y ++CONFIG_SUPPORT_EMMC_RPMB=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_SPL_RAM=y ++CONFIG_DM_RESET=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYSRESET=y ++CONFIG_ERRNO_STR=y +-- +2.20.1 + diff --git a/package/firmware/linux-firmware/brcm_firmware/ap6275s/BCM4362A2.hcd b/package/firmware/linux-firmware/brcm_firmware/ap6275s/BCM4362A2.hcd new file mode 100644 index 00000000000000..bc6dd606c4a162 Binary files /dev/null and b/package/firmware/linux-firmware/brcm_firmware/ap6275s/BCM4362A2.hcd differ diff --git a/package/firmware/linux-firmware/brcm_firmware/ap6275s/clm_bcm43752a2_ag.blob b/package/firmware/linux-firmware/brcm_firmware/ap6275s/clm_bcm43752a2_ag.blob new file mode 100644 index 00000000000000..9fabd6346c5231 Binary files /dev/null and b/package/firmware/linux-firmware/brcm_firmware/ap6275s/clm_bcm43752a2_ag.blob differ diff --git a/package/firmware/linux-firmware/brcm_firmware/ap6275s/fw_bcm43752a2_ag_apsta.bin b/package/firmware/linux-firmware/brcm_firmware/ap6275s/fw_bcm43752a2_ag_apsta.bin new file mode 100644 index 00000000000000..62be0fc3d46efc Binary files /dev/null and b/package/firmware/linux-firmware/brcm_firmware/ap6275s/fw_bcm43752a2_ag_apsta.bin differ diff --git a/package/firmware/linux-firmware/brcm_firmware/ap6275s/nvram_ap6275s.txt b/package/firmware/linux-firmware/brcm_firmware/ap6275s/nvram_ap6275s.txt new file mode 100644 index 00000000000000..4f4f81b79b8834 --- /dev/null +++ b/package/firmware/linux-firmware/brcm_firmware/ap6275s/nvram_ap6275s.txt @@ -0,0 +1,354 @@ +# AP6275S_NVRAM_V1.8_20210824 +# AP6275S v00 WLBGA reference board, iPA version. + +# SSID generated using Alberto's boardssid.py script: +# ********************SUMMARY******************** +# Board Name: AP6275S_V00 +#SSID: 0x086d +#macmid: 0x02df +# Successfully made SSID entry in sromdefs.tcl. +# Successfully made macmid entry in sromdefs.tcl. +# Successfully made SSID entry in tblssid.py. +# ************************************************* +# $ Copyright Broadcom $ +# +# +# <> +NVRAMRev=$Rev: 844050 $ +sromrev=11 +boardrev=0x1213 +boardtype=0x08ed +boardflags=0x00400201 +boardflags2=0xc0800000 +boardflags3=0x40002180 +#boardnum=57410 +macaddr=00:90:4c:12:d0:01 +jtag_irw=38 + +#Regulatory specific +ccode=0 +regrev=0 + +# Board specific +vendid=0x14e4 +devid=0x449d +manfid=0x2d0 +antswitch=0 +pdgain5g=0 +pdgain2g=0 +aa2g=3 +aa5g=3 +agbg0=2 +agbg1=2 +aga0=2 +aga1=2 +extpagain2g=2 +extpagain5g=2 +rxgains2gelnagaina0=0 +rxgains2gtrisoa0=0 +rxgains2gtrelnabypa0=0 +rxgains5gelnagaina0=0 +rxgains5gtrisoa0=0 +rxgains5gtrelnabypa0=0 +rxgains5gmelnagaina0=0 +rxgains5gmtrisoa0=0 +rxgains5gmtrelnabypa0=0 +rxgains5ghelnagaina0=0 +rxgains5ghtrisoa0=0 +rxgains5ghtrelnabypa0=0 +rxgains2gelnagaina1=0 +rxgains2gtrisoa1=0 +rxgains2gtrelnabypa1=0 +rxgains5gelnagaina1=0 +rxgains5gtrisoa1=0 +rxgains5gtrelnabypa1=0 +rxgains5gmelnagaina1=0 +rxgains5gmtrisoa1=0 +rxgains5gmtrelnabypa1=0 +rxgains5ghelnagaina1=0 +rxgains5ghtrisoa1=0 +rxgains5ghtrelnabypa1=0 + +#RSSI related +# 2G +rssicorrnorm_c0=4,4 +rssicorrnorm_c1=4,4 +# 5G +rssicorrnorm5g_c0=5,5,5,5,5,5,5,5,5,5,5,5 +rssicorrnorm5g_c1=4,4,4,4,4,4,4,4,4,4,4,4 + + +#Two range TSSI +tworangetssi2g=0 +tworangetssi5g=0 +lowpowerrange2g=0 +lowpowerrange5g=0 +low_adc_rate_en=1 +# NOTE :================================================================================ +# To run TPC with Two Range TSSI ,set tworangetssi2g = 1 and lowpowerrange2g = 0 +# To run TPC with Single Range TSSI, set tworangetssi2g = 0 +# To run TPC please READ instructions near pa2ga0 and pa2ga1 as well +# To generate PA params for Low Range set tworangetssi2g = 0 and lowpowerrange2g to 1 +# To generate PA params for High Range set tworangetssi2g = 1 and lowpowerrange2g to 1 +# ====================================================================================== + +#Related to FW Download. Host may use this +nocrc=1 + +otpimagesize=502 + +xtalfreq=37400 + +txchain=3 +rxchain=3 + +cckdigfilttype=2 + +#bit mask for slice capability bit 0:2G bit 1:5G +bandcap=3 + +#TXBF Related +rpcal2g=0 +rpcal5gb0=0 +rpcal5gb1=0 +rpcal5gb2=0 +rpcal5gb3=0 + + +#FDSS Related +fdss_level_2g=4,4 +fdss_interp_en=1 +fdss_level_5g=4,4 +fdss_level_11ax_2g=3,3 +fdss_level_11ax_2g_ch1=3,3 +fdss_level_11ax_2g_ch11=3,3 +fdss_level_11ax_5g=3,3 + +#Tempsense Related +tempthresh=255 +tempoffset=40 +rawtempsense=0x1ff +phycal_tempdelta=15 +temps_period=15 +temps_hysteresis=15 + +#------------- TSSI Related ------------- + +tssipos2g=1 +tssipos5g=1 +AvVmid_c0=2,127,4,92,4,91,4,91,4,94 +AvVmid_c1=2,127,4,93,4,93,4,95,3,110 +# CCK in case of multi mode 2 +pa2gccka0=-107,8241,-929 +pa2gccka1=-86,8682,-961 +# OFDM in case of multi_mode 2 +pa2ga0=-92,7647,-831 +pa2ga1=-115,7023,-766 +pa5ga0=-175,5735,-699,-194,5574,-689,-160,6066,-727,-176,5834,-714 +pa5ga1=-163,5928,-712,-193,5622,-695,-188,5523,-688,-170,6097,-749 + +# Max power and offsets +maxp2ga0=94 +maxp2ga1=86 +maxp5ga0=69,68,68,69 +maxp5ga1=69,68,68,69 +subband5gver=0x4 +paparambwver=3 +cckpwroffset0=0 +cckpwroffset1=0 +pdoffset40ma0=0x0000 +pdoffset80ma0=0x0100 +pdoffset40ma1=0x1111 +pdoffset80ma1=0x1010 +cckbw202gpo=0x1111 +cckbw20ul2gpo=0x0000 +mcsbw202gpo=0x77544331 +mcsbw402gpo=0x00000000 +dot11agofdmhrbw202gpo=0x4433 +ofdmlrbw202gpo=0x1111 +mcsbw205glpo=0x66200000 +mcsbw405glpo=0x94100000 +mcsbw805glpo=0x99221111 +mcsbw1605glpo=0 +mcsbw205gmpo=0x66200000 +mcsbw405gmpo=0x94100000 +mcsbw805gmpo=0x99221111 +mcsbw1605gmpo=0 +mcsbw205ghpo=0x66200000 +mcsbw405ghpo=0xA5211111 +mcsbw805ghpo=0xBB221111 +powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0 +powoffs2gtna1=-1,-1,-1,0,0,0,0,0,0,0,0,0,0,0 +mcs1024qam2gpo=0xCCAA +mcs1024qam5glpo=0xDDDDAA +mcs1024qam5gmpo=0xDDDDAA +mcs1024qam5ghpo=0xDDFFCC +mcs1024qam5gx1po=0xEECCCC +mcs1024qam5gx2po=0xEECCCC +mcs8poexp=0 +mcs9poexp=0 +mcs10poexp=0 + +# 5G power offset per channel for band edge channel +powoffs5g20mtna0=0,0,0,0,0,0,0 +powoffs5g20mtna1=0,0,0,0,0,0,0 +powoffs5g40mtna0=0,0,0,0,0 +powoffs5g40mtna1=0,0,0,0,0 +powoffs5g80mtna0=0,0,0,0,0 +powoffs5g80mtna1=0,0,0,0,0 +mcs11poexp=0 + +#LTE Coex Related +ltecxmux=0 +ltecxpadnum=0x0504 +ltecxfnsel=0x44 +ltecxgcigpio=0x04 +#OOB params +#device_wake_opt=1 +host_wake_opt=0 + +# SWCTRL Related + +swctrlmap_2g=0x10101010,0x06030401,0x04011010,0x000000,0x3FF +swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +swctrlmap_5g=0x80408040,0x21240120,0x01208040,0x000000,0x3FF +swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +clb2gslice0core0=0x01b +clb2gslice1core0=0x000 +clb5gslice0core0=0x064 +clb5gslice1core0=0x000 +clb2gslice0core1=0x056 +clb2gslice1core1=0x000 +clb5gslice0core1=0x0a1 +clb5gslice1core1=0x000 +btc_prisel_ant_mask=0x2 +clb_swctrl_smask_ant0=0x27f +clb_swctrl_smask_ant1=0x2f7 + + +#BT Coex 1:TDM +btc_mode=1 + +# --- PAPD Cal related params ---- +txwbpapden=0 # 0:NBPAPD 1:WBPAPD +# NB PAPD Cal params +nb_eps_offset=470,470 +nb_bbmult=66,66 +nb_papdcalidx=6,6 +nb_txattn=2,2 +nb_rxattn=1,1 +nb_eps_stopidx=63 +epsilonoff_5g20_c0=2,2,2,0 +epsilonoff_5g40_c0=2,2,2,0 +epsilonoff_5g80_c0=2,2,2,0 +epsilonoff_5g20_c1=0,0,-2,-2 +epsilonoff_5g40_c1=0,0,0,-2 +epsilonoff_5g80_c1=0,0,-2,-2 +epsilonoff_2g20_c0=0 +epsilonoff_2g20_c1=0 + +# energy detect threshold +ed_thresh2g=-67 +ed_thresh5g=-67 +# energy detect threshold for EU +eu_edthresh2g=-67 +eu_edthresh5g=-67 + +#rpcal coef for imptxbf +rpcal5gb0=238 +rpcal5gb1=228 +rpcal5gb2=222 +rpcal5gb3=229 +rpcal2g=15 +ocl=0 +bt_coex_chdep_div=1 + +# OLPC Related +disable_olpc=0 +olpc_thresh5g=32 +olpc_anchor5g=40 +olpc_thresh2g=32 +olpc_anchor2g=40 + +#PAPR related +paprdis=0 +paprrmcsgamma2g=500,550,550,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain2g=128,128,128,0,0,0,0,0,0,0,0,0 +paprrmcsgamma2g_ch13=500,550,550,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain2g_ch13=128,128,128,0,0,0,0,0,0,0,0,0 +paprrmcsgamma2g_ch1=500,550,550,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain2g_ch1=128,128,128,0,0,0,0,0,0,0,0,0 +paprrmcsgamma5g20=500,500,500,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain5g20=128,128,128,0,0,0,0,0,0,0,0,0 +paprrmcsgamma5g40=600,600,600,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain5g40=128,128,128,0,0,0,0,0,0,0,0,0 +paprrmcsgamma5g80=-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1 +paprrmcsgain5g80=0,0,0,0,0,0,0,0,0,0,0,0 + +# Enable papd for cck when target pwr ge 16dBm +cckpapd_pwrthresh=64 + +## ULOFDMA Board limit PPRs for 2G20 ## +ruppr2g20bpska0=0x8421 +ruppr2g20bpska1=0x8421 +ruppr2g20qpska0=0x8421 +ruppr2g20qpska1=0x8421 +ruppr2g20qam16a0=0x10842 +ruppr2g20qam16a1=0x10842 +ruppr2g20qam64a0=0x18C63 +ruppr2g20qam64a1=0x18C63 +ruppr2g20qam256a0=0x21084 +ruppr2g20qam256a1=0x21084 +ruppr2g20qam1024a0=0x5294A +ruppr2g20qam1024a1=0x5294A +## ULOFDMA Board limit PPRs for 5G20 ## +ruppr5g20bpska0=0x18000 +ruppr5g20bpska1=0x18000 +ruppr5g20qpska0=0x18000 +ruppr5g20qpska1=0x18000 +ruppr5g20qam16a0=0x18000 +ruppr5g20qam16a1=0x18000 +ruppr5g20qam64a0=0x18842 +ruppr5g20qam64a1=0x18842 +ruppr5g20qam256a0=0x318C6 +ruppr5g20qam256a1=0x318C6 +ruppr5g20qam1024a0=0x6318C +ruppr5g20qam1024a1=0x6318C +## ULOFDMA Board limit PPRs for 5G40 ## +ruppr5g40bpska0=0x308421 +ruppr5g40bpska1=0x308421 +ruppr5g40qpska0=0x308421 +ruppr5g40qpska1=0x308421 +ruppr5g40qam16a0=0x308421 +ruppr5g40qam16a1=0x308421 +ruppr5g40qam64a0=0x308421 +ruppr5g40qam64a1=0x308421 +ruppr5g40qam256a0=0x739CE7 +ruppr5g40qam256a1=0x739CE7 +ruppr5g40qam1024a0=0xD6B5AD +ruppr5g40qam1024a1=0xD6B5AD +## ULOFDMA Board limit PPRs for 5G80 ## +ruppr5g80bpska0=0x4108421 +ruppr5g80bpska1=0x4108421 +ruppr5g80qpska0=0x4108421 +ruppr5g80qpska1=0x4108421 +ruppr5g80qam16a0=0x4108421 +ruppr5g80qam16a1=0x4108421 +ruppr5g80qam64a0=0x8108421 +ruppr5g80qam64a1=0x8108421 +ruppr5g80qam256a0=0x1C7398C6 +ruppr5g80qam256a1=0x1C7398C6 +ruppr5g80qam1024a0=0x38C6318C +ruppr5g80qam1024a1=0x38C6318C + +muxenab=0x10 + +# ########### BTC Dynctl profile params ############ +# flags:bit0 - dynctl enabled, bit1 dynamic desense, bit2 dynamic mode, bit 3 TX power control +#btcdyn_flags=1 + +#btcdyn_default_btc_mode=5 +#btcdyn_msw_rows=0 +#btcdyn_dsns_rows=0 +#btc_params1007=100 +#btc_params1017=4 diff --git a/package/firmware/linux-firmware/broadcom.mk b/package/firmware/linux-firmware/broadcom.mk index 26f65346323448..571cb02555e952 100644 --- a/package/firmware/linux-firmware/broadcom.mk +++ b/package/firmware/linux-firmware/broadcom.mk @@ -118,3 +118,13 @@ define Package/bnx2x-firmware/install $(1)/lib/firmware/bnx2x/ endef $(eval $(call BuildPackage,bnx2x-firmware)) + +Package/station-p2-firmware = $(call Package/firmware-default,Broadcom FullMac SDIO firmware) +define Package/station-p2-firmware/install + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DATA) ./brcm_firmware/ap6275s/BCM4362A2.hcd $(1)/lib/firmware/brcm/BCM4362A2.hcd + $(INSTALL_DATA) ./brcm_firmware/ap6275s/clm_bcm43752a2_ag.blob $(1)/lib/firmware/brcm/brcmfmac43752-sdio.clm_blob + $(INSTALL_DATA) ./brcm_firmware/ap6275s/fw_bcm43752a2_ag_apsta.bin $(1)/lib/firmware/brcm/brcmfmac43752-sdio.firefly,rk3568-roc-pc.bin + $(INSTALL_DATA) ./brcm_firmware/ap6275s/nvram_ap6275s.txt $(1)/lib/firmware/brcm/brcmfmac43752-sdio.firefly,rk3568-roc-pc.txt +endef +$(eval $(call BuildPackage,station-p2-firmware)) diff --git a/package/kernel/mac80211/broadcom.mk b/package/kernel/mac80211/broadcom.mk index 473bbf597c389c..b01e0ee01db66e 100644 --- a/package/kernel/mac80211/broadcom.mk +++ b/package/kernel/mac80211/broadcom.mk @@ -433,7 +433,7 @@ define KernelPackage/brcmfmac $(call KernelPackage/mac80211/Default) TITLE:=Broadcom IEEE802.11n USB FullMAC WLAN driver URL:=https://wireless.wiki.kernel.org/en/users/drivers/brcm80211 - DEPENDS+= @USB_SUPPORT +kmod-cfg80211 +@DRIVER_11N_SUPPORT +@DRIVER_11AC_SUPPORT \ + DEPENDS+= @USB_SUPPORT +kmod-mac80211 +kmod-cfg80211 +@DRIVER_11N_SUPPORT +@DRIVER_11AC_SUPPORT \ +kmod-brcmutil +BRCMFMAC_SDIO:kmod-mmc @!TARGET_uml \ +BRCMFMAC_USB:kmod-usb-core +BRCMFMAC_USB:brcmfmac-firmware-usb FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/brcm80211/brcmfmac/brcmfmac.ko @@ -451,6 +451,7 @@ define KernelPackage/brcmfmac/config bool "Enable SDIO bus interface support" default y if TARGET_bcm27xx default y if TARGET_sunxi + default y if TARGET_rockchip default n help Enable support for cards attached to an SDIO bus. diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh index 0263a67aa4d4c5..d35b4e3b588144 100644 --- a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh +++ b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh @@ -739,7 +739,8 @@ mac80211_prepare_vif() { ;; esac - if [ "$mode" != "ap" ]; then + # We do not set hostpad macaddr if it is 00:00:00:00:00:00 + if [ "$mode" != "ap" ] && [ "$macaddr" != "00:00:00:00:00:00" ]; then # ALL ap functionality will be passed to hostapd # All interfaces must have unique mac addresses # which can either be explicitly set in the device diff --git a/package/kernel/mac80211/patches/brcm/999-backport-to-linux-5.18.patch b/package/kernel/mac80211/patches/brcm/999-backport-to-linux-5.18.patch new file mode 100644 index 00000000000000..4187db38f32baa --- /dev/null +++ b/package/kernel/mac80211/patches/brcm/999-backport-to-linux-5.18.patch @@ -0,0 +1,142 @@ +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c +index 44a11b0..178e692 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c +@@ -245,7 +245,11 @@ + } else { + brcmf_dbg(TRACE, "updated to %pM\n", sa->sa_data); + memcpy(ifp->mac_addr, sa->sa_data, ETH_ALEN); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0) + memcpy(ifp->ndev->dev_addr, ifp->mac_addr, ETH_ALEN); ++#else ++ eth_hw_addr_set(ifp->ndev, ifp->mac_addr); ++#endif + } + return err; + } +@@ -424,6 +428,7 @@ + ifp->ndev->stats.rx_packets++; + + brcmf_dbg(DATA, "rx proto=0x%X\n", ntohs(skb->protocol)); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0) + if (inirq) { + netif_rx(skb); + } else { +@@ -433,6 +438,9 @@ + */ + netif_rx_ni(skb); + } ++#else ++ netif_rx(skb); ++#endif + } + + void brcmf_netif_mon_rx(struct brcmf_if *ifp, struct sk_buff *skb) +@@ -673,7 +681,11 @@ + ndev->ethtool_ops = &brcmf_ethtool_ops; + + /* set the mac address & netns */ +++#if LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0) + memcpy(ndev->dev_addr, ifp->mac_addr, ETH_ALEN); ++#else ++ eth_hw_addr_set(ifp->ndev, ifp->mac_addr); ++#endif + dev_net_set(ndev, wiphy_net(cfg_to_wiphy(drvr->config))); + + INIT_WORK(&ifp->multicast_work, _brcmf_set_multicast_list); +@@ -848,7 +860,11 @@ + ndev->netdev_ops = &brcmf_netdev_ops_p2p; + + /* set the mac address */ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0) + memcpy(ndev->dev_addr, ifp->mac_addr, ETH_ALEN); ++#else ++ eth_hw_addr_set(ndev, ifp->mac_addr); ++#endif + + if (register_netdev(ndev) != 0) { + bphy_err(drvr, "couldn't register the p2p net device\n"); +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c +index 9ac0d8c..4735063 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c +@@ -2125,7 +2125,7 @@ static int brcmf_p2p_disable_p2p_if(struct brcmf_cfg80211_vif *vif) + struct brcmf_cfg80211_info *cfg = wdev_to_cfg(&vif->wdev); + struct net_device *pri_ndev = cfg_to_ndev(cfg); + struct brcmf_if *ifp = netdev_priv(pri_ndev); +- u8 *addr = vif->wdev.netdev->dev_addr; ++ const u8 *addr = vif->wdev.netdev->dev_addr; + + return brcmf_fil_iovar_data_set(ifp, "p2p_ifdis", addr, ETH_ALEN); + } +@@ -2135,7 +2135,7 @@ static int brcmf_p2p_release_p2p_if(struct brcmf_cfg80211_vif *vif) + struct brcmf_cfg80211_info *cfg = wdev_to_cfg(&vif->wdev); + struct net_device *pri_ndev = cfg_to_ndev(cfg); + struct brcmf_if *ifp = netdev_priv(pri_ndev); +- u8 *addr = vif->wdev.netdev->dev_addr; ++ const u8 *addr = vif->wdev.netdev->dev_addr; + + return brcmf_fil_iovar_data_set(ifp, "p2p_ifdel", addr, ETH_ALEN); + } +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +index 8effeb7..04362e2 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +@@ -4165,7 +4165,7 @@ static int brcmf_sdio_bus_reset(struct device *dev) + + /* reset the adapter */ + sdio_claim_host(sdiodev->func1); +- mmc_hw_reset(sdiodev->func1->card->host); ++ mmc_hw_reset(sdiodev->func1->card); + sdio_release_host(sdiodev->func1); + + brcmf_bus_change_state(sdiodev->bus_if, BRCMF_BUS_DOWN); +diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h +index ab83553..7941d28 100644 +--- a/include/net/cfg80211.h ++++ b/include/net/cfg80211.h +@@ -5555,7 +5555,7 @@ struct wireless_dev { + unsigned long unprot_beacon_reported; + }; + +-static inline u8 *wdev_address(struct wireless_dev *wdev) ++static inline const u8 *wdev_address(struct wireless_dev *wdev) + { + if (wdev->netdev) + return wdev->netdev->dev_addr; +diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c +index 57aa863..f5ebb5a 100644 +--- a/net/mac80211/iface.c ++++ b/net/mac80211/iface.c +@@ -1274,9 +1274,13 @@ + * this interface, if it has the special null one. + */ + if (dev && is_zero_ether_addr(dev->dev_addr)) { ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0) + memcpy(dev->dev_addr, + local->hw.wiphy->perm_addr, + ETH_ALEN); ++#else ++ eth_hw_addr_set(ndev, params->macaddr); ++#endif + memcpy(dev->perm_addr, dev->dev_addr, ETH_ALEN); + + if (!is_valid_ether_addr(dev->dev_addr)) { +@@ -2136,9 +2140,17 @@ + + ieee80211_assign_perm_addr(local, ndev->perm_addr, type); + if (is_valid_ether_addr(params->macaddr)) ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0) + memcpy(ndev->dev_addr, params->macaddr, ETH_ALEN); ++#else ++ eth_hw_addr_set(ndev, params->macaddr); ++#endif + else ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0) + memcpy(ndev->dev_addr, ndev->perm_addr, ETH_ALEN); ++#else ++ eth_hw_addr_set(ndev, ndev->perm_addr); ++#endif + SET_NETDEV_DEV(ndev, wiphy_dev(local->hw.wiphy)); + + /* don't use IEEE80211_DEV_TO_SUB_IF -- it checks too much */ diff --git a/target/linux/meson/Makefile b/target/linux/meson/Makefile new file mode 100644 index 00000000000000..a8bf6842fcb90b --- /dev/null +++ b/target/linux/meson/Makefile @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# Copyright (C) 2017-2021 Stijn Tintel + +include $(TOPDIR)/rules.mk + +ARCH:=arm +BOARD:=meson +BOARDNAME:=Amlogic Meson family +FEATURES:=audio boot-part ext4 fpu legacy-sdcard squashfs usbgadget +MAINTAINER:=Stijn Tintel +SUBTARGETS:=meson8b mesongx + +KERNEL_PATCHVER:=5.10 + +define Target/Description + Build firmware image for Amlogic Meson SoC devices. + Currently produces SD Card/USB disk image. +endef + +include $(INCLUDE_DIR)/target.mk + +DEFAULT_PACKAGES += \ + e2fsprogs \ + kmod-sound-core \ + kmod-usb-hid \ + mkf2fs \ + partx-utils + +KERNELNAME:=Image dtbs + +$(eval $(call BuildTarget)) diff --git a/target/linux/meson/base-files/etc/inittab b/target/linux/meson/base-files/etc/inittab new file mode 100644 index 00000000000000..a5100a70503bac --- /dev/null +++ b/target/linux/meson/base-files/etc/inittab @@ -0,0 +1,5 @@ +::sysinit:/etc/init.d/rcS S boot +::shutdown:/etc/init.d/rcS K shutdown +::askconsole:/usr/libexec/login.sh +tty1::askfirst:/usr/libexec/login.sh +ttyAML0::askfirst:/usr/libexec/login.sh diff --git a/target/linux/meson/base-files/lib/preinit/79_move_config b/target/linux/meson/base-files/lib/preinit/79_move_config new file mode 100644 index 00000000000000..6ac1b3be6965b7 --- /dev/null +++ b/target/linux/meson/base-files/lib/preinit/79_move_config @@ -0,0 +1,22 @@ +#!/bin/sh +# Copyright (C) 2012-2015 OpenWrt.org + +move_config() { + local partdev + + . /lib/upgrade/common.sh + + if export_bootdevice && export_partdevice partdev 1; then + mkdir -p /boot + if mount -t ext4 -o ro,noatime "/dev/$partdev" /boot; then + if [ -f /boot/sysupgrade.tgz ]; then + mount /boot -o remount,rw,noatime + mv -f /boot/sysupgrade.tgz / + mount /boot -o remount,ro,noatime + fi + fi + fi +} + +boot_hook_add preinit_mount_root move_config + diff --git a/target/linux/meson/base-files/lib/upgrade/platform.sh b/target/linux/meson/base-files/lib/upgrade/platform.sh new file mode 100644 index 00000000000000..ee20683cb82fc0 --- /dev/null +++ b/target/linux/meson/base-files/lib/upgrade/platform.sh @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +RAMFS_COPY_BIN='fw_printenv fw_setenv' +RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock' +REQUIRE_IMAGE_METADATA=1 + +platform_check_image() { + case "$(board_name)" in + hardkernel,odroid-c2) + legacy_sdcard_check_image "$1" + ;; + *) + return 0 + ;; + esac +} + +platform_do_upgrade() { + case "$(board_name)" in + hardkernel,odroid-c2) + legacy_sdcard_do_upgrade "$1" + ;; + *) + default_do_upgrade "$1" + ;; + esac +} +platform_copy_config() { + case "$(board_name)" in + hardkernel,odroid-c2) + legacy_sdcard_copy_config + ;; + esac +} diff --git a/target/linux/meson/image/Makefile b/target/linux/meson/image/Makefile new file mode 100644 index 00000000000000..f407a176d6ad56 --- /dev/null +++ b/target/linux/meson/image/Makefile @@ -0,0 +1,113 @@ +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/image.mk + +FAT32_BLOCK_SIZE=1024 +FAT32_BLOCKS=$(shell echo $$(($(CONFIG_TARGET_KERNEL_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE)))) + +define Build/sdcard-img + $(RM) -f $@.boot + mkfs.fat -C $@.boot $(FAT32_BLOCKS) + mkdir -p $(KDIR)/boot.fat +#For S805 + mcopy -i $@.boot $(KDIR)/uInitrd :: + mcopy -i $@.boot $(KDIR)/s805_autoscript :: + mcopy -i $@.boot $(KDIR)/s805_autoscript.txt :: +#For S905 + mcopy -i $@.boot $(KDIR)/uEnv.ini :: + mcopy -i $@.boot $(KDIR)/s905_autoscript :: + mcopy -i $@.boot $(KDIR)/s905_autoscript.txt :: + + $(CP) $(IMAGE_KERNEL) $(KDIR)/boot.fat/uImage + mcopy -i $@.boot $(KDIR)/boot.fat/uImage :: + + $(foreach dts,$(shell echo $(DEVICE_DTS)),$(CP) $(DTS_DIR)/$(dts).dtb $(KDIR)/boot.fat/dtb;) + mcopy -i $@.boot $(KDIR)/boot.fat/dtb :: + + $(RM) -rf $(KDIR)/boot.fat + + ./gen_aml_sdcard_img.sh $@ $@.boot $(IMAGE_ROOTFS) \ + $(CONFIG_TARGET_KERNEL_PARTSIZE) $(CONFIG_TARGET_ROOTFS_PARTSIZE) + +endef + +define Build/uImage-meson +#For S805 autoscript + $(RM) -rf $(KDIR)/uInitrd + $(RM) -rf $(KDIR)/s805_autoscript + $(RM) -rf $(KDIR)/s805_autoscript.txt + +#For S905 autoscript + $(RM) -rf $(KDIR)/s905_autoscript + $(RM) -rf $(KDIR)/s905_autoscript.txt + $(RM) -rf $(KDIR)/uEnv.ini + + $(call Build/uImage,none) + +#For S805 autoscript + touch $(KDIR)/uInitrd + $(CP) s805_autoscript.txt $(KDIR)/s805_autoscript.txt + mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "s805_autoscript" -d s805_autoscript.txt $(KDIR)/s805_autoscript + +#For S905 autoscript + $(CP) uEnv.ini $(KDIR)/uEnv.ini + $(CP) s905_autoscript.txt $(KDIR)/s905_autoscript.txt + mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "s905_autoscript" -d s905_autoscript.txt $(KDIR)/s905_autoscript + +endef + +### Devices ### +define Device/Default + FILESYSTEMS := ext4 + IMAGES := sdcard.img + IMAGE/sdcard.img := sdcard-img $$(DEVICE_NAME) + KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts) + KERNEL_LOADADDR := 0x01080000 + KERNEL_NAME := Image + KERNEL := kernel-bin | uImage-meson none + PROFILES = Default $$(DEVICE_NAME) +endef + +define Device/odroid-c1 + DEVICE_DTS := meson8b-odroidc1 + DEVICE_PACKAGES += + DEVICE_TITLE := ODROID C1 + KERNEL_LOADADDR := 0x00208000 +endef +ifeq ($(SUBTARGET),meson8b) + TARGET_DEVICES += odroid-c1 +endif + +define Device/odroid-c2 + DEVICE_DTS := amlogic/meson-gxbb-odroidc2 + DEVICE_PACKAGES += + DEVICE_TITLE := ODROID C2 +endef +ifeq ($(SUBTARGET),mesongx) + TARGET_DEVICES += odroid-c2 +endif + +define Device/gxl-s905x-p212 + DEVICE_DTS := amlogic/meson-gxl-s905x-p212 + DEVICE_PACKAGES += + DEVICE_TITLE := S905X Design Reference Board +endef +ifeq ($(SUBTARGET),mesongx) + TARGET_DEVICES += gxl-s905x-p212 +endif + +define Device/khadas-vim1 + DEVICE_DTS := amlogic/meson-gxl-s905x-khadas-vim + DEVICE_PACKAGES += \ + cypress-firmware-43455-sdio \ + kmod-brcmfmac wpad-basic + DEVICE_TITLE := Khadas VIM1 Development Board +endef +ifeq ($(SUBTARGET),mesongx) + TARGET_DEVICES += khadas-vim1 +endif + +$(eval $(call BuildImage)) diff --git a/target/linux/meson/image/gen_aml_sdcard_img.sh b/target/linux/meson/image/gen_aml_sdcard_img.sh new file mode 100755 index 00000000000000..5e8fb2769c41ee --- /dev/null +++ b/target/linux/meson/image/gen_aml_sdcard_img.sh @@ -0,0 +1,29 @@ +#!/bin/sh + +set -x +[ $# -eq 5 ] || { + echo "SYNTAX: $0 " + exit 1 +} + +OUTPUT="$1" +BOOTFS="$2" +ROOTFS="$3" +BOOTFSSIZE="$4" +ROOTFSSIZE="$5" + +head=4 +sect=63 + +set $(ptgen -o $OUTPUT -h $head -s $sect -l 4096 -t c -p ${BOOTFSSIZE}M -t 83 -p ${ROOTFSSIZE}M) + +BOOTOFFSET="$(($1 / 512))" +BOOTSIZE="$(($2 / 512))" +ROOTFSOFFSET="$(($3 / 512))" +ROOTFSSIZE="$(($4 / 512))" + +dd bs=512 if="$BOOTFS" of="$OUTPUT" seek="$BOOTOFFSET" conv=notrunc +dd bs=512 if="$ROOTFS" of="$OUTPUT" seek="$ROOTFSOFFSET" conv=notrunc + + + diff --git a/target/linux/meson/image/s805_autoscript.txt b/target/linux/meson/image/s805_autoscript.txt new file mode 100644 index 00000000000000..663d36db807e16 --- /dev/null +++ b/target/linux/meson/image/s805_autoscript.txt @@ -0,0 +1,19 @@ + +setenv condev "console=ttyAML0,115200n8 no_console_suspend consoleblank=0" +setenv bootargs "root=/dev/sda2 rootwait ro ${condev} fsck.repair=yes net.ifnames=0 mac=${mac}" +setenv bootargs_sd "root=/dev/mmcblk0p2 rootwait ro ${condev} fsck.repair=yes net.ifnames=0 mac=${mac}" +setenv kernel_loadaddr "0x00208000" +setenv dtb_loadaddr "0x21800000" +setenv initrd_loadaddr "0x22000000" +setenv dtb_name "dtb" +#setenv boot_start bootm ${kernel_loadaddr} ${initrd_loadaddr} ${dtb_loadaddr} +setenv boot_start bootm ${kernel_loadaddr} - ${dtb_loadaddr} + +if fatload usb 0 ${initrd_loadaddr} uInitrd; then if fatload usb 0 ${kernel_loadaddr} uImage; then if fatload usb 0 ${dtb_loadaddr} ${dtb_name}; then run boot_start; else imgread dtb boot ${loadaddr} ${dtb_loadaddr}; run boot_start;fi;fi;fi; +if fatload usb 1 ${initrd_loadaddr} uInitrd; then if fatload usb 1 ${kernel_loadaddr} uImage; then if fatload usb 1 ${dtb_loadaddr} ${dtb_name}; then run boot_start; else imgread dtb boot ${loadaddr} ${dtb_loadaddr}; run boot_start;fi;fi;fi; +if fatload usb 2 ${initrd_loadaddr} uInitrd; then if fatload usb 2 ${kernel_loadaddr} uImage; then if fatload usb 2 ${dtb_loadaddr} ${dtb_name}; then run boot_start; else imgread dtb boot ${loadaddr} ${dtb_loadaddr}; run boot_start;fi;fi;fi; +if fatload usb 3 ${initrd_loadaddr} uInitrd; then if fatload usb 3 ${kernel_loadaddr} uImage; then if fatload usb 3 ${dtb_loadaddr} ${dtb_name}; then run boot_start; else imgread dtb boot ${loadaddr} ${dtb_loadaddr}; run boot_start;fi;fi;fi; +if fatload mmc 0 ${initrd_loadaddr} uInitrd; setenv bootargs ${bootargs_sd}; then if fatload mmc 0 ${kernel_loadaddr} uImage; then if fatload mmc 0 ${dtb_loadaddr} ${dtb_name}; then run boot_start; else imgread dtb boot ${loadaddr} ${dtb_loadaddr}; run boot_start;fi;fi;fi; + +#rebuild +#mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "s805_autoscript" -d s805_autoscript.txt ./s805_autoscript diff --git a/target/linux/meson/image/s905_autoscript.txt b/target/linux/meson/image/s905_autoscript.txt new file mode 100644 index 00000000000000..d1f589498d38b8 --- /dev/null +++ b/target/linux/meson/image/s905_autoscript.txt @@ -0,0 +1,16 @@ +setenv loadaddr "0x01080000" +setenv dtb_mem_addr "0x01000000" +setenv env_addr "0x1040000" +setenv boot_start 'bootm ${loadaddr} - ${dtb_mem_addr}' +setenv bootargs_ismmc 'if itest ${devtype} == mmc; then setenv bootargs ${bootargs_mmc}; fi' +setenv bootargs_isusb 'if itest ${devtype} == usb; then setenv bootargs ${bootargs_usb}; fi' +setenv try_boot_start 'if fatload ${devtype} ${devnum} ${loadaddr} uImage; then fatload ${devtype} ${devnum} ${env_addr} uEnv.ini && env import -t ${env_addr} ${filesize}; run bootargs_ismmc; run bootargs_isusb; printenv bootargs; fatload ${devtype} ${devnum} ${dtb_mem_addr} ${dtb_name} && run boot_start; fi' +setenv devtype mmc +setenv devnum 0 +run try_boot_start +setenv devtype usb +for devnum in 0 1 2 3 ; do run try_boot_start ; done + +#rebuild +#mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "s905_autoscript" -d s905_autoscript.txt ./s905_autoscript + diff --git a/target/linux/meson/image/uEnv.ini b/target/linux/meson/image/uEnv.ini new file mode 100644 index 00000000000000..d758991737f95a --- /dev/null +++ b/target/linux/meson/image/uEnv.ini @@ -0,0 +1,3 @@ +dtb_name=dtb +bootargs_mmc=root=/dev/mmcblk0p2 rootwait ro rootfstype=ext4,squashfs console=tty0, console=ttyAML0,115200 net.ifnames=0 +bootargs_usb=root=/dev/sda2 rootwait ro rootfstype=ext4,squashfs console=tty0 console=ttyAML0,115200 net.ifnames=0 diff --git a/target/linux/meson/meson8b/config-5.10 b/target/linux/meson/meson8b/config-5.10 new file mode 100644 index 00000000000000..b480a165de82db --- /dev/null +++ b/target/linux/meson/meson8b/config-5.10 @@ -0,0 +1,483 @@ +# CONFIG_AIO is not set +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MESON=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +# CONFIG_ARCH_MSTARV7 is not set +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GLOBAL_TIMER=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +# CONFIG_ARM_SCMI_PROTOCOL is not set +CONFIG_ARM_SCPI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_THUMB=y +CONFIG_ARM_THUMBEE=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +# CONFIG_AS73211 is not set +CONFIG_ASN1=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_PM=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_CACHE_L2X0=y +# CONFIG_CHARGER_BQ25980 is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLK_QORIQ=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CLZ_TAB=y +CONFIG_CMA=y +CONFIG_CMA_ALIGNMENT=8 +CONFIG_CMA_AREAS=7 +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_SIZE_MBYTES=16 +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_MESON8B=y +CONFIG_COMMON_CLK_MESON_MPLL=y +CONFIG_COMMON_CLK_MESON_PLL=y +CONFIG_COMMON_CLK_MESON_REGMAP=y +CONFIG_COMMON_CLK_PWM=y +CONFIG_COMMON_CLK_SCPI=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_CONTIG_ALLOC=y +CONFIG_COREDUMP=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +# CONFIG_HAVE_ARM_ARCH_TIMER is not set +CONFIG_CRC16=y +CONFIG_CRC7=y +CONFIG_CRC_ITU_T=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_SHA256=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DMA_CMA=y +CONFIG_DMA_OPS=y +# CONFIG_DMA_PERNUMA_CMA is not set +CONFIG_DMA_REMAP=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_DRM=y +# CONFIG_DRM_ANALOGIX_ANX6345 is not set +CONFIG_DRM_BRIDGE=y +# CONFIG_DRM_CDNS_MHDP8546 is not set +# CONFIG_DRM_CHRONTEL_CH7033 is not set +# CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set +# CONFIG_DRM_DISPLAY_CONNECTOR is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_KMS_HELPER=y +# CONFIG_DRM_LONTIUM_LT9611 is not set +# CONFIG_DRM_LVDS_CODEC is not set +CONFIG_DRM_MALI_DISPLAY=y +# CONFIG_DRM_MESON is not set +# CONFIG_DRM_NWL_MIPI_DSI is not set +CONFIG_DRM_PANEL=y +CONFIG_DRM_PANEL_BRIDGE=y +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set +# CONFIG_DRM_PARADE_PS8640 is not set +# CONFIG_DRM_SIMPLE_BRIDGE is not set +# CONFIG_DRM_TIDSS is not set +# CONFIG_DRM_TI_TPD12S015 is not set +# CONFIG_DRM_TOSHIBA_TC358762 is not set +# CONFIG_DRM_TOSHIBA_TC358768 is not set +# CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TVE200 is not set +CONFIG_DTC=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DWMAC_DWC_QOS_ETH=y +# CONFIG_DWMAC_GENERIC is not set +# CONFIG_DWMAC_INTEL_PLAT is not set +CONFIG_DWMAC_MESON=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ELF_CORE=y +# CONFIG_ENABLE_DEFAULT_TRACERS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXTCON=y +CONFIG_F2FS_FS=y +CONFIG_F2FS_FS_POSIX_ACL=y +CONFIG_FB=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_CMDLINE=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYS_IMAGEBLIT=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FONT_8x16=y +CONFIG_FONT_8x8=y +CONFIG_FONT_SUPPORT=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FTRACE=y +# CONFIG_FTRACE_SYSCALLS is not set +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +CONFIG_GLOB=y +CONFIG_GPIOLIB=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +# CONFIG_HDC2010 is not set +CONFIG_HDMI=y +# CONFIG_HISI_HIKEY_USB is not set +CONFIG_HWMON=y +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MESON=y +# CONFIG_HW_RANDOM_XIPHERA is not set +CONFIG_HZ=100 +CONFIG_HZ_100=y +CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_MESON is not set +CONFIG_ICPLUS_PHY=y +CONFIG_IIO=y +CONFIG_INPUT=y +CONFIG_IPV6=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_PIMSM_V2 is not set +CONFIG_IPV6_SUBTREES=y +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +# CONFIG_IR_IMON_RAW is not set +# CONFIG_IR_MESON is not set +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +# CONFIG_IR_TOY is not set +CONFIG_JBD2=y +CONFIG_KEYS=y +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set +CONFIG_LEDS_GPIO=y +CONFIG_LIBFDT=y +# CONFIG_LIRC is not set +CONFIG_LLD_VERSION=0 +CONFIG_LOCK_DEBUGGING_SUPPORT=y +# CONFIG_MACH_MESON6 is not set +CONFIG_MACH_MESON8=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_MESON_G12A is not set +CONFIG_MDIO_BUS_MUX_MMIOREG=y +CONFIG_MDIO_DEVICE=y +# CONFIG_MDIO_GPIO is not set +CONFIG_MEMFD_CREATE=y +CONFIG_MEMORY=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_MESON6_TIMER=y +# CONFIG_MESON_CANVAS is not set +CONFIG_MESON_CLK_MEASURE=y +CONFIG_MESON_EE_PM_DOMAINS=y +# CONFIG_MESON_GXBB_WATCHDOG is not set +# CONFIG_MESON_GXL_PHY is not set +CONFIG_MESON_GX_PM_DOMAINS=y +# CONFIG_MESON_GX_SOCINFO is not set +CONFIG_MESON_IRQ_GPIO=y +CONFIG_MESON_MX_EFUSE=y +CONFIG_MESON_MX_SOCINFO=y +CONFIG_MESON_SARADC=y +CONFIG_MESON_WATCHDOG=y +# CONFIG_MFD_KHADAS_MCU is not set +# CONFIG_MFD_ROHM_BD71828 is not set +CONFIG_MFD_SYSCON=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_CQHCI=y +CONFIG_MMC_DW=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +CONFIG_MMC_DW_K3=y +CONFIG_MMC_DW_PLTFM=y +# CONFIG_MMC_MESON_GX is not set +CONFIG_MMC_MESON_MX_SDHC=y +CONFIG_MMC_MESON_MX_SDIO=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SPI=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MPILIB=y +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NEON=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_EMATCH=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NLS=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OID_REGISTRY=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PAGE_POOL=y +CONFIG_PCS_XPCS=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHY_MESON8B_USB2=y +# CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG is not set +# CONFIG_PHY_MESON_AXG_PCIE is not set +# CONFIG_PHY_MESON_G12A_USB2 is not set +# CONFIG_PHY_MESON_G12A_USB3_PCIE is not set +# CONFIG_PHY_MESON_GXL_USB2 is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON=y +CONFIG_PINCTRL_MESON8=y +CONFIG_PINCTRL_MESON8B=y +CONFIG_PINCTRL_MESON8_PMX=y +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PLATFORM_MHU=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_SUPPLY=y +CONFIG_POWER_SUPPLY_HWMON=y +CONFIG_PPS=y +CONFIG_PRINTK_TIME=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PWM=y +CONFIG_PWM_MESON=y +CONFIG_PWM_SYSFS=y +CONFIG_RATIONAL=y +CONFIG_RC_CORE=y +CONFIG_RC_DEVICES=y +# CONFIG_RC_XBOX_DVD is not set +CONFIG_REALTEK_AUTOPM=y +CONFIG_REALTEK_PHY=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +# CONFIG_REGULATOR_RT4801 is not set +# CONFIG_REGULATOR_RTMV20 is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_MESON=y +# CONFIG_RESET_MESON_AUDIO_ARB is not set +CONFIG_SCSI=y +CONFIG_SDIO_UART=y +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SENSORS_MR75203 is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_MESON=y +CONFIG_SERIAL_MESON_CONSOLE=y +CONFIG_SG_POOL=y +CONFIG_SOC_BUS=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MESON_SPICC=y +CONFIG_SPI_MESON_SPIFC=y +CONFIG_SRCU=y +CONFIG_STACKTRACE=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_SWPHY=y +# CONFIG_SWP_EMULATE is not set +CONFIG_SYNC_FILE=y +# CONFIG_SYNTH_EVENTS is not set +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +# CONFIG_TINYDRM_ILI9486 is not set +CONFIG_TINY_SRCU=y +CONFIG_TUN=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC2_DUAL_ROLE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_DUAL_ROLE=y +# CONFIG_USB_DWC3_GADGET is not set +# CONFIG_USB_DWC3_HOST is not set +# CONFIG_USB_DWC3_MESON_G12A is not set +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_ETH is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_MAX3420_UDC is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=y +CONFIG_USB_PHY=y +# CONFIG_USB_RAW_GADGET is not set +CONFIG_USB_ROLE_SWITCH=y +CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE_REALTEK=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USE_OF=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_WATCHDOG_CORE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 diff --git a/target/linux/meson/meson8b/target.mk b/target/linux/meson/meson8b/target.mk new file mode 100644 index 00000000000000..9b8dba026ad025 --- /dev/null +++ b/target/linux/meson/meson8b/target.mk @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Copyright (C) 2020 ChalesYu <574249312@qq.com> +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +ARCH:=arm +SUBTARGET:=meson8b +BOARDNAME:=Amlogic S805 boards (32 bit) +CPU_TYPE:=cortex-a5 +CPU_SUBTYPE:=vfpv4 +MAINTAINER:=ChalesYu <574249312@qq.com> + +define Target/Description + Build firmware image for Amlogic S805 SoC devices. + This firmware features a 32 bit kernel. +endef + diff --git a/target/linux/meson/mesongx/config-5.10 b/target/linux/meson/mesongx/config-5.10 new file mode 100644 index 00000000000000..b1838a2c5e7fd0 --- /dev/null +++ b/target/linux/meson/mesongx/config-5.10 @@ -0,0 +1,510 @@ +CONFIG_64BIT=y +# CONFIG_AIO is not set +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MESON=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_CNP=y +CONFIG_ARM64_ERRATUM_1165522=y +CONFIG_ARM64_ERRATUM_1286807=y +CONFIG_ARM64_ERRATUM_819472=y +CONFIG_ARM64_ERRATUM_824069=y +CONFIG_ARM64_ERRATUM_826319=y +CONFIG_ARM64_ERRATUM_827319=y +CONFIG_ARM64_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_858921=y +CONFIG_ARM64_HW_AFDBM=y +CONFIG_ARM64_MODULE_PLTS=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PAN=y +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PMEM=y +CONFIG_ARM64_PTR_AUTH=y +CONFIG_ARM64_SVE=y +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_ARM64_UAO=y +CONFIG_ARM64_VA_BITS=48 +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VHE=y +CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y +CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_SCMI_PROTOCOL is not set +CONFIG_ARM_SCPI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ASN1=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_BLK_DEBUG_FS=y +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_PM=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_CAVIUM_TX2_ERRATUM_219=y +# CONFIG_CEC_CH7322 is not set +# CONFIG_CEC_MESON_AO is not set +# CONFIG_CEC_MESON_G12A_AO is not set +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLK_QORIQ=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CLZ_TAB=y +CONFIG_CMA=y +CONFIG_CMA_ALIGNMENT=8 +CONFIG_CMA_AREAS=7 +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_SIZE_MBYTES=16 +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_AXG=y +# CONFIG_COMMON_CLK_AXG_AUDIO is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_G12A=y +CONFIG_COMMON_CLK_GXBB=y +CONFIG_COMMON_CLK_MESON_AO_CLKC=y +CONFIG_COMMON_CLK_MESON_CPU_DYNDIV=y +CONFIG_COMMON_CLK_MESON_DUALDIV=y +CONFIG_COMMON_CLK_MESON_EE_CLKC=y +CONFIG_COMMON_CLK_MESON_MPLL=y +CONFIG_COMMON_CLK_MESON_PLL=y +CONFIG_COMMON_CLK_MESON_REGMAP=y +CONFIG_COMMON_CLK_MESON_VID_PLL_DIV=y +CONFIG_COMMON_CLK_PWM=y +CONFIG_COMMON_CLK_SCPI=y +CONFIG_COMMON_CLK_XGENE=y +# CONFIG_COMPAT_32BIT_TIME is not set +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_CONTIG_ALLOC=y +CONFIG_COREDUMP=y +CONFIG_CPU_RMAP=y +CONFIG_CRC16=y +CONFIG_CRC7=y +CONFIG_CRC_ITU_T=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_SHA256=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_CMA=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_DRM=y +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_DW_HDMI=y +# CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_CMA_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_MALI_DISPLAY=y +CONFIG_DRM_MESON=y +CONFIG_DRM_MESON_DW_HDMI=y +CONFIG_DRM_PANEL=y +CONFIG_DRM_PANEL_BRIDGE=y +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +CONFIG_DTC=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DVB_CORE=y +CONFIG_DWMAC_DWC_QOS_ETH=y +# CONFIG_DWMAC_GENERIC is not set +CONFIG_DWMAC_MESON=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ELF_CORE=y +# CONFIG_ENABLE_DEFAULT_TRACERS is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXTCON=y +CONFIG_F2FS_FS=y +CONFIG_F2FS_FS_POSIX_ACL=y +CONFIG_FB=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_CMDLINE=y +CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYS_IMAGEBLIT=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_FONT_8x16=y +CONFIG_FONT_8x8=y +CONFIG_FONT_SUPPORT=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FRAME_POINTER=y +CONFIG_FSL_ERRATUM_A008585=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FTRACE=y +# CONFIG_FTRACE_SYSCALLS is not set +CONFIG_FUJITSU_ERRATUM_010001=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HDMI=y +CONFIG_HISILICON_ERRATUM_161010101=y +# CONFIG_HIST_TRIGGERS is not set +CONFIG_HOLES_IN_ZONE=y +CONFIG_HWMON=y +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MESON=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_MESON=y +CONFIG_ICPLUS_PHY=y +CONFIG_IIO=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_INPUT=y +CONFIG_IPV6=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_PIMSM_V2 is not set +CONFIG_IPV6_SUBTREES=y +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +# CONFIG_IR_IMON_RAW is not set +CONFIG_IR_MESON=y +# CONFIG_IR_SERIAL is not set +# CONFIG_IR_SIR is not set +# CONFIG_IR_TOY is not set +CONFIG_JBD2=y +CONFIG_KCMP=y +CONFIG_KEYS=y +# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set +CONFIG_LEDS_GPIO=y +CONFIG_LIBFDT=y +# CONFIG_LIRC is not set +CONFIG_LLD_VERSION=0 +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +# CONFIG_MDIO_BUS_MUX_MESON_G12A is not set +CONFIG_MDIO_BUS_MUX_MMIOREG=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_GPIO is not set +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_ATTACH=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +CONFIG_MEDIA_TUNER=y +CONFIG_MEMFD_CREATE=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_MESON_CANVAS=y +CONFIG_MESON_CLK_MEASURE=y +CONFIG_MESON_EE_PM_DOMAINS=y +CONFIG_MESON_EFUSE=y +CONFIG_MESON_GXBB_WATCHDOG=y +CONFIG_MESON_GXL_PHY=y +CONFIG_MESON_GX_PM_DOMAINS=y +CONFIG_MESON_GX_SOCINFO=y +CONFIG_MESON_IRQ_GPIO=y +# CONFIG_MESON_MX_EFUSE is not set +CONFIG_MESON_MX_SOCINFO=y +CONFIG_MESON_SARADC=y +CONFIG_MESON_SECURE_PM_DOMAINS=y +CONFIG_MESON_SM=y +CONFIG_MESON_WATCHDOG=y +# CONFIG_MFD_KHADAS_MCU is not set +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_MMC_CQHCI=y +CONFIG_MMC_DW=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +CONFIG_MMC_DW_K3=y +CONFIG_MMC_DW_PLTFM=y +CONFIG_MMC_MESON_GX=y +# CONFIG_MMC_MESON_MX_SDIO is not set +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_OF_ARASAN=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SPI=y +CONFIG_MMC_STM32_SDMMC=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MPILIB=y +CONFIG_MQ_IOSCHED_DEADLINE=y +CONFIG_MQ_IOSCHED_KYBER=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_EMATCH=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NLS=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NO_IOPORT_MAP=y +CONFIG_NR_CPUS=8 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OID_REGISTRY=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PCS_XPCS=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_MESON8B_USB2=y +CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG=y +CONFIG_PHY_MESON_AXG_PCIE=y +# CONFIG_PHY_MESON_G12A_USB2 is not set +# CONFIG_PHY_MESON_G12A_USB3_PCIE is not set +CONFIG_PHY_MESON_GXL_USB2=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON=y +CONFIG_PINCTRL_MESON8_PMX=y +# CONFIG_PINCTRL_MESON_A1 is not set +# CONFIG_PINCTRL_MESON_AXG is not set +# CONFIG_PINCTRL_MESON_G12A is not set +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_PINCTRL_MESON_GXL=y +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PLATFORM_MHU=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_SUPPLY=y +CONFIG_POWER_SUPPLY_HWMON=y +CONFIG_PPS=y +CONFIG_PRINTK_TIME=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PWM=y +CONFIG_PWM_MESON=y +CONFIG_PWM_SYSFS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RATIONAL=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RC_CORE=y +CONFIG_RC_DEVICES=y +# CONFIG_RC_XBOX_DVD is not set +CONFIG_REALTEK_AUTOPM=y +CONFIG_REALTEK_PHY=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_MESON=y +# CONFIG_RESET_MESON_AUDIO_ARB is not set +CONFIG_RFS_ACCEL=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +CONFIG_RPS=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SCSI=y +CONFIG_SDIO_UART=y +# CONFIG_SECONDARY_TRUSTED_KEYRING is not set +CONFIG_SENSORS_ARM_SCPI=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_MESON=y +CONFIG_SERIAL_MESON_CONSOLE=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SOC_BUS=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MESON_SPICC=y +CONFIG_SPI_MESON_SPIFC=y +CONFIG_SRCU=y +CONFIG_STACKTRACE=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SYNC_FILE=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set +CONFIG_SYSTEM_TRUSTED_KEYRING=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_TUN=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC2_DUAL_ROLE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_DUAL_ROLE=y +# CONFIG_USB_DWC3_GADGET is not set +# CONFIG_USB_DWC3_HOST is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_ETH is not set +CONFIG_USB_GADGET=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=y +CONFIG_USB_PHY=y +# CONFIG_USB_PULSE8_CEC is not set +# CONFIG_USB_RAINSHADOW_CEC is not set +CONFIG_USB_ROLE_SWITCH=y +CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE_REALTEK=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_VMAP_STACK=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_WATCHDOG_CORE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_XPS=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/meson/mesongx/target.mk b/target/linux/meson/mesongx/target.mk new file mode 100644 index 00000000000000..aad4b8bc0db49d --- /dev/null +++ b/target/linux/meson/mesongx/target.mk @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +ARCH:=aarch64 +SUBTARGET:=mesongx +BOARDNAME:=Amlogic S9 SoC family (64 bit) +CPU_TYPE:=cortex-a53 +MAINTAINER:=Stijn Tintel + +define Target/Description + Build firmware image for Amlogic S9 SoC devices. + This firmware features a 64 bit kernel. +endef diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds index 20b504c968907b..f61b0899f00ab2 100755 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds @@ -24,6 +24,9 @@ sharevdi,guangmiao-g4c) ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0" ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth1" ;; +firefly,rk3568-roc-pc) + ucidef_set_led_timer "health" "health" "firefly:yellow:user" "200" "800" + ;; esac board_config_flush diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index bcc5a907c4c6af..ecf4348fe98f5c 100755 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -17,7 +17,8 @@ rockchip_setup_interfaces() friendlyarm,nanopi-r4se|\ sharevdi,guangmiao-g4c|\ xunlong,orangepi-r1-plus|\ - xunlong,orangepi-r1-plus-lts) + xunlong,orangepi-r1-plus-lts|\ + firefly,rk3568-roc-pc) ucidef_set_interfaces_lan_wan 'eth1' 'eth0' ;; friendlyelec,nanopi-r5s) @@ -49,7 +50,8 @@ rockchip_setup_macs() fastrhino,r66s|\ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2s|\ - sharevdi,guangmiao-g4c) + sharevdi,guangmiao-g4c|\ + firefly,rk3568-roc-pc) wan_mac=$(nanopi_r2s_generate_mac) lan_mac=$(macaddr_add "$wan_mac" +1) ;; diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index 2491dc8c3c47b3..e9a0687a807774 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -43,5 +43,9 @@ sharevdi,guangmiao-g4c) set_interface_core 10 "eth0" set_interface_core 20 "eth1" ;; +firefly,rk3568-roc-pc) + set_interface_core 2 "eth0" + set_interface_core 4 "eth1" + ;; esac diff --git a/target/linux/rockchip/armv8/base-files/lib/preinit/04_reorder_eth b/target/linux/rockchip/armv8/base-files/lib/preinit/04_reorder_eth new file mode 100644 index 00000000000000..e4576fd923b09c --- /dev/null +++ b/target/linux/rockchip/armv8/base-files/lib/preinit/04_reorder_eth @@ -0,0 +1,13 @@ +. /lib/functions.sh + +preinit_reorder_eth() { + case $(board_name) in + firefly,rk3568-roc-pc) + ip link set eth0 name ethtmp + ip link set eth1 name eth0 + ip link set ethtmp name eth1 + ;; + esac +} + +boot_hook_add preinit_main preinit_reorder_eth diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts index fffdeed7b7f825..64ec33a30bcb8d 100644 --- a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts +++ b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-r66s.dts @@ -472,7 +472,6 @@ cap-mmc-highspeed; cap-sd-highspeed; disable-wp; - sd-uhs-sdr104; vmmc-supply = <&vcc3v3_sd>; vqmmc-supply = <&vccio_sd>; pinctrl-names = "default"; diff --git a/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts new file mode 100644 index 00000000000000..3883c1827be67b --- /dev/null +++ b/target/linux/rockchip/files-5.19/arch/arm64/boot/dts/rockchip/rk3568-station-p2.dts @@ -0,0 +1,787 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include +#include +#include +#include "rk3568.dtsi" + +/ { + model = "Firefly Station P2"; + compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &sdmmc0; + mmc1 = &sdhci; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + gmac0_clkin: external-gmac0-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac0_clkin"; + #clock-cells = <0>; + }; + + gmac1_clkin: external-gmac1-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac1_clkin"; + #clock-cells = <0>; + }; + + leds { + compatible = "gpio-leds"; + + power_led: power { + label = "firefly:blue:power"; + linux,default-trigger = "ir-power-click"; + default-state = "on"; + gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&led_power>; + }; + + user_led: user { + label = "firefly:yellow:user"; + linux,default-trigger = "ir-user-click"; + default-state = "off"; + gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&led_user>; + }; + }; + + hdmi-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + status = "okay"; + compatible = "mmc-pwrseq-simple"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; + post-power-on-delay-ms = <100>; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb: vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + pcie30_avdd0v9: pcie30-avdd0v9 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc3v3_sys>; + }; + + pcie30_avdd1v8: pcie30-avdd1v8 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcc3v3_pcie: vcc3v3_pi6c: vcc3v3-pcie { + compatible = "regulator-fixed"; + regulator-always-on; + enable-active-high; + gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_enable_h>; + regulator-name = "vcc3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_host: vcc5v0-host { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + enable-active-high; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_otg: vcc5v0-otg { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_otg"; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_otg_en>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc_hub_reset: vcc-hub-reset { + compatible = "regulator-fixed"; + regulator-name = "vcc_hub_reset"; + enable-active-high; + gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_hub_reset_en>; + regulator-always-on; + }; + + pcie_pi6c_oe: pcie-pi6c-oe { + compatible = "regulator-fixed"; + regulator-name = "pcie_pi6c_oe_en"; + gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pi6c_oe_en>; + regulator-always-on; + }; + + vcc3v3_lcd0_n: vcc3v3-lcd0-n { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_lcd0_n"; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_lcd1_n: vcc3v3-lcd1-n { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_lcd1_n"; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + clock_in_out = "input"; + + snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus + &gmac0_clkinout>; + + tx_delay = <0x3c>; + rx_delay = <0x2f>; + + phy-handle = <&rgmii_phy0>; + status = "okay"; +}; + +&gmac1 { + phy-mode = "rgmii"; + clock_in_out = "input"; + + snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus + &gmac1m1_clkinout>; + + tx_delay = <0x4f>; + rx_delay = <0x26>; + + phy-handle = <&rgmii_phy1>; + status = "okay"; +}; + +&hdmi { + status = "okay"; + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + #sound-dai-cells = <0>; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&mdio0 { + rgmii_phy0: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&mdio1 { + rgmii_phy1: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&pinctrl { + leds { + led_power: led-power { + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_user: led-user { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc_hub_reset_en: vcc-hub-reset-en { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + fusb0_int { + fusb0_int: fusb0-int { + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + + pcie { + pcie_enable_h: pcie-enable-h { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_reset_h: pcie-reset-h { + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie_pi6c_oe_en: pcie-pi6c-oe-en { + rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdmmc2 { + max-frequency = <150000000>; + supports-sdio; + bus-width = <4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + sd-uhs-sdr104; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + status = "okay"; +}; + +&tsadc { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&vop { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; +}; + +&vop_mmu { + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint@0 { + reg = <0>; + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&combphy0 { + status = "okay"; +}; + +&combphy1 { + status = "okay"; +}; + +&combphy2 { + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x2{ + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_h>; + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb2phy1_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb2phy1_otg { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host0_xhci { + extcon = <&usb2phy0>; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index 348e9d73e6b5f9..61326040148270 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -131,3 +131,13 @@ define Device/xunlong_orangepi-r1-plus-lts DEVICE_PACKAGES := kmod-usb-net-rtl8152 endef TARGET_DEVICES += xunlong_orangepi-r1-plus-lts + +define Device/firefly_station-p2 + DEVICE_VENDOR := Firefly + DEVICE_MODEL := Station_P2 + SOC := rk3568 + UBOOT_DEVICE_NAME := station-p2-rk3568 + IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata + DEVICE_PACKAGES := kmod-brcmfmac kmod-ikconfig ata-ahci-platform station-p2-firmware wpad +endef +TARGET_DEVICES += firefly_station-p2 diff --git a/target/linux/rockchip/patches-5.19/0107-mmc-core-set-initial-signal-voltage-on-power-off.patch b/target/linux/rockchip/patches-5.19/0107-mmc-core-set-initial-signal-voltage-on-power-off.patch new file mode 100644 index 00000000000000..d6694b512ee835 --- /dev/null +++ b/target/linux/rockchip/patches-5.19/0107-mmc-core-set-initial-signal-voltage-on-power-off.patch @@ -0,0 +1,35 @@ +From 0d329112c709d6cfedf0fffb19f0cc6b19043f6b Mon Sep 17 00:00:00 2001 +From: Jonas Karlman +Date: Wed, 20 Feb 2019 07:38:34 +0000 +Subject: [PATCH] mmc: core: set initial signal voltage on power off + +Some boards have SD card connectors where the power rail cannot be switched +off by the driver. If the card has not been power cycled, it may still be +using 1.8V signaling after a warm re-boot. Bootroms expecting 3.3V signaling +will fail to boot from a UHS card that continue to use 1.8V signaling. + +Set initial signal voltage in mmc_power_off() to allow re-boot to function. + +This fixes re-boot with UHS cards on Asus Tinker Board (Rockchip RK3288), +same issue have been seen on some Rockchip RK3399 boards. + +I am sending this as a RFC because I have no insights into SD/MMC subsystem, +this change fix a re-boot issue on my boards and does not break emmc/sdio. +Is this an acceptable workaround? Any advice is appreciated. + +Signed-off-by: Jonas Karlman +--- + drivers/mmc/core/core.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/mmc/core/core.c ++++ b/drivers/mmc/core/core.c +@@ -1358,6 +1358,8 @@ void mmc_power_off(struct mmc_host *host + + mmc_pwrseq_power_off(host); + ++ mmc_set_initial_signal_voltage(host); ++ + host->ios.clock = 0; + host->ios.vdd = 0; + diff --git a/target/linux/rockchip/patches-5.19/0900-arm-boot-add-dts-files.patch b/target/linux/rockchip/patches-5.19/0900-arm-boot-add-dts-files.patch index 5b0c265a78f6c4..62d6b449f3de40 100644 --- a/target/linux/rockchip/patches-5.19/0900-arm-boot-add-dts-files.patch +++ b/target/linux/rockchip/patches-5.19/0900-arm-boot-add-dts-files.patch @@ -32,9 +32,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-pinebook-pro.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb -@@ -65,4 +65,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ro +@@ -65,4 +65,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-ro dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-station-p2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb diff --git a/target/linux/rockchip/patches-5.19/105-nanopi-r4s-sd-signalling.patch b/target/linux/rockchip/patches-5.19/105-nanopi-r4s-sd-signalling.patch new file mode 100644 index 00000000000000..3065687291983d --- /dev/null +++ b/target/linux/rockchip/patches-5.19/105-nanopi-r4s-sd-signalling.patch @@ -0,0 +1,26 @@ +From: David Bauer +Subject: arm64: dts: rockchip: disable UHS modes for NanoPi R4S + +The NanoPi R4S leaves the SD card in 1.8V signalling when rebooting +while U-Boot requires the card to be in 3.3V mode. + +Remove UHS support from the SD controller so the card remains in 3.3V +mode. This reduces transfer speeds but ensures a reboot whether from +userspace or following a kernel panic is always working. + +Signed-off-by: David Bauer + +--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts +@@ -137,6 +137,11 @@ + status = "disabled"; + }; + ++&sdmmc { ++ /delete-property/ sd-uhs-sdr104; ++ cap-sd-highspeed; ++}; ++ + &u2phy0_host { + phy-supply = <&vdd_5v>; + };