From 764159c539cbfe04463bf09fd6d761187032e5f8 Mon Sep 17 00:00:00 2001 From: Jeremiah <4462211+jeremiahpslewis@users.noreply.github.com> Date: Thu, 23 Sep 2021 13:32:07 +0200 Subject: [PATCH] [GMP] Patch for Apple Silicon (#42293) * [GMP] Patch for Apple Silicon --- deps/checksums/gmp | 62 +++- deps/gmp.mk | 23 +- deps/patches/gmp-HG-changeset.patch | 520 ++++++++++++++++++++++++++++ stdlib/GMP_jll/Project.toml | 4 +- 4 files changed, 602 insertions(+), 7 deletions(-) create mode 100644 deps/patches/gmp-HG-changeset.patch diff --git a/deps/checksums/gmp b/deps/checksums/gmp index da510e3dc2388..6b95ca883ddf8 100644 --- a/deps/checksums/gmp +++ b/deps/checksums/gmp @@ -1,5 +1,3 @@ -gmp-6.2.1.tar.bz2/md5/28971fc21cf028042d4897f02fd355ea -gmp-6.2.1.tar.bz2/sha512/8904334a3bcc5c896ececabc75cda9dec642e401fb5397c4992c4fabea5e962c9ce8bd44e8e4233c34e55c8010cc28db0545f5f750cbdbb5f00af538dc763be9 GMP.v6.2.1+0.aarch64-apple-darwin.tar.gz/md5/e805c580078e4d6bcaeb6781cb6d56fa GMP.v6.2.1+0.aarch64-apple-darwin.tar.gz/sha512/62435e80f5fa0b67e2788c8bfc3681426add7a9b2853131bbebe890d1a2d9b54cebaea0860f6ddd0e93e1ae302baba39851d5f58a65acf0b2a9ea1226bb4eea4 GMP.v6.2.1+0.aarch64-linux-gnu-cxx03.tar.gz/md5/5384d6ba6fd408bc71c2781b643cd59a @@ -58,3 +56,63 @@ GMP.v6.2.1+0.x86_64-w64-mingw32-cxx03.tar.gz/md5/1499a265b438cf5169286c1830eb573 GMP.v6.2.1+0.x86_64-w64-mingw32-cxx03.tar.gz/sha512/d2e6fe76abe0a0cb1a7445ea93cd5bd0bf9f729aec8df9c76d06a1f6f5e67cce442be69b66950eb33aa22cfda2e5a308f2bade64018a27bebfcb4b7a97e1d047 GMP.v6.2.1+0.x86_64-w64-mingw32-cxx11.tar.gz/md5/fdb4187f617511d8eb19f67f8499a8d0 GMP.v6.2.1+0.x86_64-w64-mingw32-cxx11.tar.gz/sha512/bb6d8ead1c20cffebc2271461d3787cfad794fee2b32e23583af6521c0667ed9107805268a996d23d6edcab9fe653e542a210cab07252f7713af0c23feb76fb3 +GMP.v6.2.1+1.aarch64-apple-darwin.tar.gz/md5/03cb14ac16daabb4a77fe1c78e8e48a9 +GMP.v6.2.1+1.aarch64-apple-darwin.tar.gz/sha512/5b8f974a07f579272981f5ebe44191385a4ce95f58d434a3565ffa827a6d65824cbe4173736b7328630bbccfe6af4242195aec24de3f0aa687e2e32a18a97a5c +GMP.v6.2.1+1.aarch64-linux-gnu-cxx03.tar.gz/md5/0ce7d419a49f2f90033618bdda2588e7 +GMP.v6.2.1+1.aarch64-linux-gnu-cxx03.tar.gz/sha512/16363dedaae116fa0d493182aeadb2ffa7f990f1813e4b47cae3cd61ca71f23b65267ea4e2c698d52bd78d61e12feaa73179d7b86ab6d6df01eeb7b6a9b27958 +GMP.v6.2.1+1.aarch64-linux-gnu-cxx11.tar.gz/md5/011f1cdc39b9e529b4b6ea80f4c33108 +GMP.v6.2.1+1.aarch64-linux-gnu-cxx11.tar.gz/sha512/1ed2139580c5c78578f350ee83dbf9cd0120d9d36e1951438d757f5734cda7931600b3f83bfe0d0d806926636d6aea8048c6b64aa42a22e59310282c2428f417 +GMP.v6.2.1+1.aarch64-linux-musl-cxx03.tar.gz/md5/34f17083a1f142c284b707cc82407b00 +GMP.v6.2.1+1.aarch64-linux-musl-cxx03.tar.gz/sha512/dd32912c31a8422734c2e5d5a37001ac18f0e9de151982583d9dc185e5cc3e45076d737729345cca8e8eaf42993d4102353261a2de245e26a8a9cd86960a2fbf +GMP.v6.2.1+1.aarch64-linux-musl-cxx11.tar.gz/md5/9ba1b822f20f88a1e4c6e81dc8c4fdc1 +GMP.v6.2.1+1.aarch64-linux-musl-cxx11.tar.gz/sha512/d8a4ecd5c35022b9c912c3b4fabe3a4c31258d6a1bd38e4fea13a3da53206a29bfd90f4d602f6e3ee3ee271d84289d1ecdf45534adfabf7e657daef5b5cb0b21 +GMP.v6.2.1+1.armv6l-linux-gnueabihf-cxx03.tar.gz/md5/23e28efa2579d636cb4c80036da5d4ea +GMP.v6.2.1+1.armv6l-linux-gnueabihf-cxx03.tar.gz/sha512/02c8023958fa616c1f944898e686510d449b743d053cfd42f526e9c4fe3ff3dd9de7309694b8537b4bb6dc978085339eb787983ec4ba32dc041448c912a8b982 +GMP.v6.2.1+1.armv6l-linux-gnueabihf-cxx11.tar.gz/md5/bf2a2c4f81f6d04746cc528438f62639 +GMP.v6.2.1+1.armv6l-linux-gnueabihf-cxx11.tar.gz/sha512/1c152abeed24761c775e78a64835f8e61b28b16cbc29a6fde88fa4fdbf2a5782cd62697bd03a552d873995bda58b7bdc081c11ecd5e4badde2dea426e5218116 +GMP.v6.2.1+1.armv6l-linux-musleabihf-cxx03.tar.gz/md5/25cbceed2cf1bb12601fe285c342d6b0 +GMP.v6.2.1+1.armv6l-linux-musleabihf-cxx03.tar.gz/sha512/37d8b21bf59c0c555f2b59d6dca4f486bf1725ae18a7fea9a2f31533c54ebb818b5ddb88ec8aa2b618e0ecad78973659abd1a9f095f64ef65067ab8ed08d7801 +GMP.v6.2.1+1.armv6l-linux-musleabihf-cxx11.tar.gz/md5/8ec72c769625a218c6951abed32b3684 +GMP.v6.2.1+1.armv6l-linux-musleabihf-cxx11.tar.gz/sha512/4cb9ccb97859b0918002b649e1b5e74e1fc89a2daeec6f32d5a06ce0d84217f54d1ee788f472cebeefc73ef52284a3d5607efbed47058b438d2dcbcf9f384ed0 +GMP.v6.2.1+1.armv7l-linux-gnueabihf-cxx03.tar.gz/md5/6f799d6516cc46af28eacf8409634825 +GMP.v6.2.1+1.armv7l-linux-gnueabihf-cxx03.tar.gz/sha512/541c1e03726584ddb672a83becdc9a99c68f5da9a7415750d582753b47774910bf25cee7fe21f5b5c2a80ff8ce87fc327abd45bf54d6cfe821cb202c81b67e43 +GMP.v6.2.1+1.armv7l-linux-gnueabihf-cxx11.tar.gz/md5/17dba9ebcc1bf4637095a98a876375a8 +GMP.v6.2.1+1.armv7l-linux-gnueabihf-cxx11.tar.gz/sha512/648220e632618d23e8611e10fa4bb2e581ed4432e3fff77d0d7349a7585bffa65ae57bf1ce64c550bf6d2acc016f499c0bbbfed8088281445b9d4ecbbf9a64bc +GMP.v6.2.1+1.armv7l-linux-musleabihf-cxx03.tar.gz/md5/79c77b81cc16fd22ad4cef75af7aa220 +GMP.v6.2.1+1.armv7l-linux-musleabihf-cxx03.tar.gz/sha512/0059ba54806ef0ca6621ddcd309a18922c4c7d9d9e214bc6870b6338a9449a472934cc27569402741d41a18dd53a896aae2f68b788f853fd4ea3db63035c8153 +GMP.v6.2.1+1.armv7l-linux-musleabihf-cxx11.tar.gz/md5/87b79bfc5c780e214863d0f0c1944da9 +GMP.v6.2.1+1.armv7l-linux-musleabihf-cxx11.tar.gz/sha512/88dcabcf96d8f2dcc7968333a94adcb8e8a91615b67ca23edf75c3368a89ef60a8deff8e8532d0cd4d5dd5356343b753b0ae0bf88ce7e190639468bf8170939a +GMP.v6.2.1+1.i686-linux-gnu-cxx03.tar.gz/md5/61d39e42ab6fd5844e938605e357b336 +GMP.v6.2.1+1.i686-linux-gnu-cxx03.tar.gz/sha512/8e0d382adf6b45cbf613092cee524551a04096b0bc6fb8893701edae9c1928bda67b5522cae3ef954a882ff73b735190881ade37495d9d1a6db88ed6fbcdc6b1 +GMP.v6.2.1+1.i686-linux-gnu-cxx11.tar.gz/md5/b66b49054426adf3e1d3454a80010d97 +GMP.v6.2.1+1.i686-linux-gnu-cxx11.tar.gz/sha512/b28f22bbfbf796c4e959b1fa3433d46b4cf0dbd402c0497a6d4893c8030aa12fd038da4846d8bce02199f1da9b0158d78f2b4ff2636799ba139602775725ff6d +GMP.v6.2.1+1.i686-linux-musl-cxx03.tar.gz/md5/69ea3b3348813777a1682e41a117d7c3 +GMP.v6.2.1+1.i686-linux-musl-cxx03.tar.gz/sha512/048dd08b5891864e69504baf6328ef5423e0f8e31c5c6cfac552eb51b3ef943af83b7ac654c33e1a0cf061c5832e08eebb9c03dbda6532fbc24e160e99c2aae6 +GMP.v6.2.1+1.i686-linux-musl-cxx11.tar.gz/md5/e7c82091d29a3e5958442c9ec631ad78 +GMP.v6.2.1+1.i686-linux-musl-cxx11.tar.gz/sha512/8574f2e42e181a7bd1cf8aa8056a14d13efe555ee74b14e14aef1bdce7f26ce2afe41b4f85ee20de6823045d5ff38e4dbcebcc7042fff4288af1b7d296202d43 +GMP.v6.2.1+1.i686-w64-mingw32-cxx03.tar.gz/md5/dcef59aa056dcd56e6e36ad49174389f +GMP.v6.2.1+1.i686-w64-mingw32-cxx03.tar.gz/sha512/3cf3096c325ae2baea8b3c3aed4a26d649dc2bb3cf0d979809d9962521422ada3fdcdddbcfc52b27d43b473a1d3ed4a40368cdeb16cac4d32718c604dbc9f388 +GMP.v6.2.1+1.i686-w64-mingw32-cxx11.tar.gz/md5/b772a602b016e73dfc9a93908f51622b +GMP.v6.2.1+1.i686-w64-mingw32-cxx11.tar.gz/sha512/00e06591e2cc44100dca1a8897c72933bf4bd8c3c732daea99a9efa4d0a67f6a8820bf3e5d27583dfddc50d4cda656fa7462a2c453035d03657948f0051dc2fe +GMP.v6.2.1+1.powerpc64le-linux-gnu-cxx03.tar.gz/md5/b31c423855c4c5633b41301e3b424312 +GMP.v6.2.1+1.powerpc64le-linux-gnu-cxx03.tar.gz/sha512/2565176e2bbcb9deab25a91736e8b6de01e7dca619ed1fcc98cebcaaa144eb03f89f4f6d5989aa8454b0d1c7266d1ace690e6deef67c0cf5c3fc1c2ab4d41b43 +GMP.v6.2.1+1.powerpc64le-linux-gnu-cxx11.tar.gz/md5/1ed2494342b5713308f6ffed5fe3863d +GMP.v6.2.1+1.powerpc64le-linux-gnu-cxx11.tar.gz/sha512/c600802c81c77247a24a50ec0695f742177c8c9f090b4c345f9b0cd065b35183f49592a764cdb7b1b6d5ee3722e7dd26672d85db963d1e490731545a36d1e581 +GMP.v6.2.1+1.x86_64-apple-darwin.tar.gz/md5/51e00a2b55e9f81eb62abe23bb5f6fd9 +GMP.v6.2.1+1.x86_64-apple-darwin.tar.gz/sha512/91731427afd8df54b54d87b93006190a8b959438dc591eb5fa44724056911b8bd5588b2b1e70e9da3d8d6e9ce5aaa6fea66b0706f636cb56b3c860e8f3c0550a +GMP.v6.2.1+1.x86_64-linux-gnu-cxx03.tar.gz/md5/3f3a6f15e4e8499470bbe69a9ea885c1 +GMP.v6.2.1+1.x86_64-linux-gnu-cxx03.tar.gz/sha512/2659344ab097cd9542a5946c127a43af6fad05aa1445d69a4978d1a6d9a9f0e0502a5a60c6ca88acccb86d038dd10f2a72a7c2d4dd7ad5383c7d687e9720cc88 +GMP.v6.2.1+1.x86_64-linux-gnu-cxx11.tar.gz/md5/15ee858d8e1f07f18df8a893634d859e +GMP.v6.2.1+1.x86_64-linux-gnu-cxx11.tar.gz/sha512/9d8ffa570eb22a5a908679e06af4dd0ce8c06cf97ff9fd766baeca352a99bcc54b4b71b9c52829ba80043a688f2ed6a33b0302072518f2b16416235d5295ea00 +GMP.v6.2.1+1.x86_64-linux-musl-cxx03.tar.gz/md5/79078a236575994696e7328e34326243 +GMP.v6.2.1+1.x86_64-linux-musl-cxx03.tar.gz/sha512/d4b77a4056a2b0dcb6f789381fff720ab7481cc7edb4672756cb2057ed6475abeb6ea414e6cec3e2450ef7302b647d7d2fc2d9f7de52feddd7767548392e84bb +GMP.v6.2.1+1.x86_64-linux-musl-cxx11.tar.gz/md5/94f822c7521f83652d87fd5f1ad8bb19 +GMP.v6.2.1+1.x86_64-linux-musl-cxx11.tar.gz/sha512/fa4f70f81524d47b65d5cf3ff5abe38a691f09e3297c62f0db2512483702b9af33bc4a3c15f6f1465d6dce4eeb19f665f29872e6dd7caea0806f4c7fd32c2c5a +GMP.v6.2.1+1.x86_64-unknown-freebsd.tar.gz/md5/cdb93a733763e8a4fc29652fda8c8b13 +GMP.v6.2.1+1.x86_64-unknown-freebsd.tar.gz/sha512/ec529f57eb167bfcb367310b375a3cded007cbc386cab9b09faa9fe8f37a443302c674814ada6c82125ad0ce4aebecb75bb61633a21e7a3a00fc928fbe05cb4f +GMP.v6.2.1+1.x86_64-w64-mingw32-cxx03.tar.gz/md5/8b5be9da6a0a293e14ab1d589a622b98 +GMP.v6.2.1+1.x86_64-w64-mingw32-cxx03.tar.gz/sha512/73287b8390cac2ce8afc4565c5218ac739ed8a23c56754f4667570039f022b777284aee25d7857a94ff46fd502ac0fabe46f509a5f870b1aa074f6ed1278dcf1 +GMP.v6.2.1+1.x86_64-w64-mingw32-cxx11.tar.gz/md5/11bcbfc3b65b19d73c3abf92ec46cb6a +GMP.v6.2.1+1.x86_64-w64-mingw32-cxx11.tar.gz/sha512/1dd9a6fe5c4991483a2d46420cd892271d37d9d23c409ed782b7736ab1942cd6c42360efbc308b5684bd5f991c7a96e8d375f3e855dc537bb3089e3402eed110 +gmp-6.2.1.tar.bz2/md5/28971fc21cf028042d4897f02fd355ea +gmp-6.2.1.tar.bz2/sha512/8904334a3bcc5c896ececabc75cda9dec642e401fb5397c4992c4fabea5e962c9ce8bd44e8e4233c34e55c8010cc28db0545f5f750cbdbb5f00af538dc763be9 diff --git a/deps/gmp.mk b/deps/gmp.mk index 9093817b86829..1d7d85556a2af 100644 --- a/deps/gmp.mk +++ b/deps/gmp.mk @@ -22,11 +22,28 @@ $(SRCCACHE)/gmp-$(GMP_VER)/source-extracted: $(SRCCACHE)/gmp-$(GMP_VER).tar.bz2 checksum-gmp: $(SRCCACHE)/gmp-$(GMP_VER).tar.bz2 $(JLCHECKSUM) $< -$(SRCCACHE)/gmp-$(GMP_VER)/build-patched: $(SRCCACHE)/gmp-$(GMP_VER)/source-extracted - cd $(dir $@) && patch -p1 < $(SRCDIR)/patches/gmp-exception.patch - cd $(dir $@) && patch -p1 < $(SRCDIR)/patches/gmp_alloc_overflow_func.patch +# Apply fix to avoid using Apple ARM reserved register X18 +# Necessary for version 6.2.1, remove after next gmp release +$(SRCCACHE)/gmp-$(GMP_VER)/gmp-HG-changeset.patch-applied: $(SRCCACHE)/gmp-$(GMP_VER)/source-extracted + cd $(dir $@) && \ + patch -p1 < $(SRCDIR)/patches/gmp-HG-changeset.patch + echo 1 > $@ + +$(SRCCACHE)/gmp-$(GMP_VER)/gmp-exception.patch-applied: $(SRCCACHE)/gmp-$(GMP_VER)/gmp-HG-changeset.patch-applied + cd $(dir $@) && \ + patch -p1 < $(SRCDIR)/patches/gmp-exception.patch echo 1 > $@ +$(SRCCACHE)/gmp-$(GMP_VER)/gmp_alloc_overflow_func.patch-applied: $(SRCCACHE)/gmp-$(GMP_VER)/gmp-exception.patch-applied + cd $(dir $@) && \ + patch -p1 < $(SRCDIR)/patches/gmp_alloc_overflow_func.patch + echo 1 > $@ + +$(SRCCACHE)/gmp-$(GMP_VER)/build-patched: + $(SRCCACHE)/gmp-$(GMP_VER)/gmp-HG-changeset.patch-applied + $(SRCCACHE)/gmp-$(GMP_VER)/gmp-exception.patch-applied + $(SRCCACHE)/gmp-$(GMP_VER)/gmp_alloc_overflow_func.patch-applied + $(BUILDDIR)/gmp-$(GMP_VER)/build-configured: $(SRCCACHE)/gmp-$(GMP_VER)/source-extracted $(SRCCACHE)/gmp-$(GMP_VER)/build-patched mkdir -p $(dir $@) cd $(dir $@) && \ diff --git a/deps/patches/gmp-HG-changeset.patch b/deps/patches/gmp-HG-changeset.patch new file mode 100644 index 0000000000000..7437fb6f2f748 --- /dev/null +++ b/deps/patches/gmp-HG-changeset.patch @@ -0,0 +1,520 @@ + +# HG changeset patch +# User Torbjorn Granlund +# Date 1606685500 -3600 +# Node ID 5f32dbc41afc1f8cd77af1614f0caeb24deb7d7b +# Parent 94c84d919f83ba963ed1809f8e80c7bef32db55c +Avoid the x18 register since it is reserved on Darwin. + +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/aors_n.asm +--- a/mpn/arm64/aors_n.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/aors_n.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -68,7 +68,7 @@ + EPILOGUE() + PROLOGUE(func_n) + CLRCY +-L(ent): lsr x18, n, #2 ++L(ent): lsr x17, n, #2 + tbz n, #0, L(bx0) + + L(bx1): ldr x7, [up] +@@ -77,7 +77,7 @@ + str x13, [rp],#8 + tbnz n, #1, L(b11) + +-L(b01): cbz x18, L(ret) ++L(b01): cbz x17, L(ret) + ldp x4, x5, [up,#8] + ldp x8, x9, [vp,#8] + sub up, up, #8 +@@ -88,7 +88,7 @@ + ldp x10, x11, [vp,#8] + add up, up, #8 + add vp, vp, #8 +- cbz x18, L(end) ++ cbz x17, L(end) + b L(top) + + L(bx0): tbnz n, #1, L(b10) +@@ -101,7 +101,7 @@ + + L(b10): ldp x6, x7, [up] + ldp x10, x11, [vp] +- cbz x18, L(end) ++ cbz x17, L(end) + + ALIGN(16) + L(top): ldp x4, x5, [up,#16] +@@ -114,8 +114,8 @@ + ADDSUBC x12, x4, x8 + ADDSUBC x13, x5, x9 + stp x12, x13, [rp],#16 +- sub x18, x18, #1 +- cbnz x18, L(top) ++ sub x17, x17, #1 ++ cbnz x17, L(top) + + L(end): ADDSUBC x12, x6, x10 + ADDSUBC x13, x7, x11 +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/aorsmul_1.asm +--- a/mpn/arm64/aorsmul_1.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/aorsmul_1.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -32,10 +32,15 @@ + + include(`../config.m4') + +-C cycles/limb +-C Cortex-A53 9.3-9.8 +-C Cortex-A57 7.0 +-C X-Gene 5.0 ++C addmul_1 submul_1 ++C cycles/limb cycles/limb ++C Cortex-A53 9.3-9.8 9.3-9.8 ++C Cortex-A55 9.0-9.5 9.3-9.8 ++C Cortex-A57 7 7 ++C Cortex-A72 ++C Cortex-A73 6 6 ++C X-Gene 5 5 ++C Apple M1 1.75 1.75 + + C NOTES + C * It is possible to keep the carry chain alive between the addition blocks +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/aorsorrlshC_n.asm +--- a/mpn/arm64/aorsorrlshC_n.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/aorsorrlshC_n.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -65,14 +65,14 @@ + + ASM_START() + PROLOGUE(func_n) +- lsr x18, n, #2 ++ lsr x6, n, #2 + tbz n, #0, L(bx0) + + L(bx1): ldr x5, [up] + tbnz n, #1, L(b11) + + L(b01): ldr x11, [vp] +- cbz x18, L(1) ++ cbz x6, L(1) + ldp x8, x9, [vp,#8] + lsl x13, x11, #LSH + ADDSUB( x15, x13, x5) +@@ -94,7 +94,7 @@ + ADDSUB( x17, x13, x5) + str x17, [rp],#8 + sub up, up, #8 +- cbz x18, L(end) ++ cbz x6, L(end) + b L(top) + + L(bx0): tbnz n, #1, L(b10) +@@ -107,7 +107,7 @@ + L(b10): CLRRCY( x9) + ldp x10, x11, [vp] + sub up, up, #16 +- cbz x18, L(end) ++ cbz x6, L(end) + + ALIGN(16) + L(top): ldp x4, x5, [up,#16] +@@ -124,8 +124,8 @@ + ADDSUBC(x16, x12, x4) + ADDSUBC(x17, x13, x5) + stp x16, x17, [rp],#16 +- sub x18, x18, #1 +- cbnz x18, L(top) ++ sub x6, x6, #1 ++ cbnz x6, L(top) + + L(end): ldp x4, x5, [up,#16] + extr x12, x10, x9, #RSH +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/cnd_aors_n.asm +--- a/mpn/arm64/cnd_aors_n.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/cnd_aors_n.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -65,7 +65,7 @@ + + CLRCY + +- lsr x18, n, #2 ++ lsr x17, n, #2 + tbz n, #0, L(bx0) + + L(bx1): ldr x13, [vp] +@@ -75,7 +75,7 @@ + str x9, [rp] + tbnz n, #1, L(b11) + +-L(b01): cbz x18, L(rt) ++L(b01): cbz x17, L(rt) + ldp x12, x13, [vp,#8] + ldp x10, x11, [up,#8] + sub up, up, #8 +@@ -86,7 +86,7 @@ + L(b11): ldp x12, x13, [vp,#8]! + ldp x10, x11, [up,#8]! + sub rp, rp, #8 +- cbz x18, L(end) ++ cbz x17, L(end) + b L(top) + + L(bx0): ldp x12, x13, [vp] +@@ -99,7 +99,7 @@ + b L(mid) + + L(b10): sub rp, rp, #16 +- cbz x18, L(end) ++ cbz x17, L(end) + + ALIGN(16) + L(top): bic x6, x12, cnd +@@ -116,8 +116,8 @@ + ADDSUBC x9, x11, x7 + ldp x10, x11, [up,#32]! + stp x8, x9, [rp,#32]! +- sub x18, x18, #1 +- cbnz x18, L(top) ++ sub x17, x17, #1 ++ cbnz x17, L(top) + + L(end): bic x6, x12, cnd + bic x7, x13, cnd +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/logops_n.asm +--- a/mpn/arm64/logops_n.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/logops_n.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -78,7 +78,7 @@ + + ASM_START() + PROLOGUE(func) +- lsr x18, n, #2 ++ lsr x17, n, #2 + tbz n, #0, L(bx0) + + L(bx1): ldr x7, [up] +@@ -88,7 +88,7 @@ + str x15, [rp],#8 + tbnz n, #1, L(b11) + +-L(b01): cbz x18, L(ret) ++L(b01): cbz x17, L(ret) + ldp x4, x5, [up,#8] + ldp x8, x9, [vp,#8] + sub up, up, #8 +@@ -99,7 +99,7 @@ + ldp x10, x11, [vp,#8] + add up, up, #8 + add vp, vp, #8 +- cbz x18, L(end) ++ cbz x17, L(end) + b L(top) + + L(bx0): tbnz n, #1, L(b10) +@@ -110,7 +110,7 @@ + + L(b10): ldp x6, x7, [up] + ldp x10, x11, [vp] +- cbz x18, L(end) ++ cbz x17, L(end) + + ALIGN(16) + L(top): ldp x4, x5, [up,#16] +@@ -127,8 +127,8 @@ + POSTOP( x12) + POSTOP( x13) + stp x12, x13, [rp],#16 +- sub x18, x18, #1 +- cbnz x18, L(top) ++ sub x17, x17, #1 ++ cbnz x17, L(top) + + L(end): LOGOP( x12, x6, x10) + LOGOP( x13, x7, x11) +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/lshift.asm +--- a/mpn/arm64/lshift.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/lshift.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -61,7 +61,7 @@ + add rp, rp_arg, n, lsl #3 + add up, up, n, lsl #3 + sub tnc, xzr, cnt +- lsr x18, n, #2 ++ lsr x17, n, #2 + tbz n, #0, L(bx0) + + L(bx1): ldr x4, [up,#-8] +@@ -69,7 +69,7 @@ + + L(b01): NSHIFT x0, x4, tnc + PSHIFT x2, x4, cnt +- cbnz x18, L(gt1) ++ cbnz x17, L(gt1) + str x2, [rp,#-8] + ret + L(gt1): ldp x4, x5, [up,#-24] +@@ -89,7 +89,7 @@ + PSHIFT x13, x5, cnt + NSHIFT x10, x4, tnc + PSHIFT x2, x4, cnt +- cbnz x18, L(gt2) ++ cbnz x17, L(gt2) + orr x10, x10, x13 + stp x2, x10, [rp,#-16] + ret +@@ -123,11 +123,11 @@ + orr x11, x12, x2 + stp x10, x11, [rp,#-32]! + PSHIFT x2, x4, cnt +-L(lo0): sub x18, x18, #1 ++L(lo0): sub x17, x17, #1 + L(lo3): NSHIFT x10, x6, tnc + PSHIFT x13, x7, cnt + NSHIFT x12, x7, tnc +- cbnz x18, L(top) ++ cbnz x17, L(top) + + L(end): orr x10, x10, x13 + orr x11, x12, x2 +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/lshiftc.asm +--- a/mpn/arm64/lshiftc.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/lshiftc.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -61,7 +61,7 @@ + add rp, rp_arg, n, lsl #3 + add up, up, n, lsl #3 + sub tnc, xzr, cnt +- lsr x18, n, #2 ++ lsr x17, n, #2 + tbz n, #0, L(bx0) + + L(bx1): ldr x4, [up,#-8] +@@ -69,7 +69,7 @@ + + L(b01): NSHIFT x0, x4, tnc + PSHIFT x2, x4, cnt +- cbnz x18, L(gt1) ++ cbnz x17, L(gt1) + mvn x2, x2 + str x2, [rp,#-8] + ret +@@ -90,7 +90,7 @@ + PSHIFT x13, x5, cnt + NSHIFT x10, x4, tnc + PSHIFT x2, x4, cnt +- cbnz x18, L(gt2) ++ cbnz x17, L(gt2) + eon x10, x10, x13 + mvn x2, x2 + stp x2, x10, [rp,#-16] +@@ -125,11 +125,11 @@ + eon x11, x12, x2 + stp x10, x11, [rp,#-32]! + PSHIFT x2, x4, cnt +-L(lo0): sub x18, x18, #1 ++L(lo0): sub x17, x17, #1 + L(lo3): NSHIFT x10, x6, tnc + PSHIFT x13, x7, cnt + NSHIFT x12, x7, tnc +- cbnz x18, L(top) ++ cbnz x17, L(top) + + L(end): eon x10, x10, x13 + eon x11, x12, x2 +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/mul_1.asm +--- a/mpn/arm64/mul_1.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/mul_1.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -56,7 +56,7 @@ + + PROLOGUE(mpn_mul_1) + adds x4, xzr, xzr C clear register and cy flag +-L(com): lsr x18, n, #2 ++L(com): lsr x17, n, #2 + tbnz n, #0, L(bx1) + + L(bx0): mov x11, x4 +@@ -65,7 +65,7 @@ + L(b10): ldp x4, x5, [up] + mul x8, x4, v0 + umulh x10, x4, v0 +- cbz x18, L(2) ++ cbz x17, L(2) + ldp x6, x7, [up,#16]! + mul x9, x5, v0 + b L(mid)-8 +@@ -80,7 +80,7 @@ + str x9, [rp],#8 + tbnz n, #1, L(b10) + +-L(b01): cbz x18, L(1) ++L(b01): cbz x17, L(1) + + L(b00): ldp x6, x7, [up] + mul x8, x6, v0 +@@ -90,8 +90,8 @@ + adcs x12, x8, x11 + umulh x11, x7, v0 + add rp, rp, #16 +- sub x18, x18, #1 +- cbz x18, L(end) ++ sub x17, x17, #1 ++ cbz x17, L(end) + + ALIGN(16) + L(top): mul x8, x4, v0 +@@ -110,8 +110,8 @@ + stp x12, x13, [rp],#32 + adcs x12, x8, x11 + umulh x11, x7, v0 +- sub x18, x18, #1 +- cbnz x18, L(top) ++ sub x17, x17, #1 ++ cbnz x17, L(top) + + L(end): mul x8, x4, v0 + adcs x13, x9, x10 +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/rsh1aors_n.asm +--- a/mpn/arm64/rsh1aors_n.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/rsh1aors_n.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -59,7 +59,7 @@ + + ASM_START() + PROLOGUE(func_n) +- lsr x18, n, #2 ++ lsr x6, n, #2 + + tbz n, #0, L(bx0) + +@@ -69,7 +69,7 @@ + + L(b01): ADDSUB x13, x5, x9 + and x10, x13, #1 +- cbz x18, L(1) ++ cbz x6, L(1) + ldp x4, x5, [up],#48 + ldp x8, x9, [vp],#48 + ADDSUBC x14, x4, x8 +@@ -80,8 +80,8 @@ + ADDSUBC x12, x4, x8 + ADDSUBC x13, x5, x9 + str x17, [rp], #24 +- sub x18, x18, #1 +- cbz x18, L(end) ++ sub x6, x6, #1 ++ cbz x6, L(end) + b L(top) + + L(1): cset x14, COND +@@ -97,7 +97,7 @@ + ldp x8, x9, [vp],#32 + ADDSUBC x12, x4, x8 + ADDSUBC x13, x5, x9 +- cbz x18, L(3) ++ cbz x6, L(3) + ldp x4, x5, [up,#-16] + ldp x8, x9, [vp,#-16] + extr x17, x12, x15, #1 +@@ -117,7 +117,7 @@ + ADDSUB x12, x4, x8 + ADDSUBC x13, x5, x9 + and x10, x12, #1 +- cbz x18, L(2) ++ cbz x6, L(2) + ldp x4, x5, [up,#-16] + ldp x8, x9, [vp,#-16] + ADDSUBC x14, x4, x8 +@@ -134,8 +134,8 @@ + ADDSUBC x12, x4, x8 + ADDSUBC x13, x5, x9 + add rp, rp, #16 +- sub x18, x18, #1 +- cbz x18, L(end) ++ sub x6, x6, #1 ++ cbz x6, L(end) + + ALIGN(16) + L(top): ldp x4, x5, [up,#-16] +@@ -152,8 +152,8 @@ + ADDSUBC x12, x4, x8 + ADDSUBC x13, x5, x9 + stp x16, x17, [rp],#32 +- sub x18, x18, #1 +- cbnz x18, L(top) ++ sub x6, x6, #1 ++ cbnz x6, L(top) + + L(end): extr x16, x15, x14, #1 + extr x17, x12, x15, #1 +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/rshift.asm +--- a/mpn/arm64/rshift.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/rshift.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -60,7 +60,7 @@ + PROLOGUE(mpn_rshift) + mov rp, rp_arg + sub tnc, xzr, cnt +- lsr x18, n, #2 ++ lsr x17, n, #2 + tbz n, #0, L(bx0) + + L(bx1): ldr x5, [up] +@@ -68,7 +68,7 @@ + + L(b01): NSHIFT x0, x5, tnc + PSHIFT x2, x5, cnt +- cbnz x18, L(gt1) ++ cbnz x17, L(gt1) + str x2, [rp] + ret + L(gt1): ldp x4, x5, [up,#8] +@@ -89,7 +89,7 @@ + PSHIFT x13, x4, cnt + NSHIFT x10, x5, tnc + PSHIFT x2, x5, cnt +- cbnz x18, L(gt2) ++ cbnz x17, L(gt2) + orr x10, x10, x13 + stp x10, x2, [rp] + ret +@@ -121,11 +121,11 @@ + orr x11, x12, x2 + stp x11, x10, [rp,#32]! + PSHIFT x2, x5, cnt +-L(lo0): sub x18, x18, #1 ++L(lo0): sub x17, x17, #1 + L(lo3): NSHIFT x10, x7, tnc + NSHIFT x12, x6, tnc + PSHIFT x13, x6, cnt +- cbnz x18, L(top) ++ cbnz x17, L(top) + + L(end): orr x10, x10, x13 + orr x11, x12, x2 +diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/sqr_diag_addlsh1.asm +--- a/mpn/arm64/sqr_diag_addlsh1.asm Sat Nov 28 23:38:32 2020 +0100 ++++ b/mpn/arm64/sqr_diag_addlsh1.asm Sun Nov 29 22:31:40 2020 +0100 +@@ -47,7 +47,7 @@ + ASM_START() + PROLOGUE(mpn_sqr_diag_addlsh1) + ldr x15, [up],#8 +- lsr x18, n, #1 ++ lsr x14, n, #1 + tbz n, #0, L(bx0) + + L(bx1): adds x7, xzr, xzr +@@ -62,8 +62,8 @@ + ldr x17, [up],#16 + ldp x6, x7, [tp],#32 + umulh x11, x15, x15 +- sub x18, x18, #1 +- cbz x18, L(end) ++ sub x14, x14, #1 ++ cbz x14, L(end) + + ALIGN(16) + L(top): extr x9, x6, x5, #63 +@@ -84,8 +84,8 @@ + extr x8, x5, x4, #63 + stp x12, x13, [rp],#16 + adcs x12, x8, x10 +- sub x18, x18, #1 +- cbnz x18, L(top) ++ sub x14, x14, #1 ++ cbnz x14, L(top) + + L(end): extr x9, x6, x5, #63 + mul x10, x17, x17 diff --git a/stdlib/GMP_jll/Project.toml b/stdlib/GMP_jll/Project.toml index a4d989a410199..0fc262e562da7 100644 --- a/stdlib/GMP_jll/Project.toml +++ b/stdlib/GMP_jll/Project.toml @@ -1,10 +1,10 @@ name = "GMP_jll" uuid = "781609d7-10c4-51f6-84f2-b8444358ff6d" -version = "6.2.1+0" +version = "6.2.1+1" [deps] -Libdl = "8f399da3-3557-5675-b5ff-fb832c97cbdb" Artifacts = "56f22d72-fd6d-98f1-02f0-08ddc0907c33" +Libdl = "8f399da3-3557-5675-b5ff-fb832c97cbdb" [compat] julia = "1.6"