diff --git a/.github/workflows/firmware.yml b/.github/workflows/firmware.yml new file mode 100644 index 0000000..ad05633 --- /dev/null +++ b/.github/workflows/firmware.yml @@ -0,0 +1,59 @@ +name: CI Checks + +on: [push, pull_request] + +env: + CARGO_TERM_COLOR: always + +jobs: + building: + name: Building + continue-on-error: ${{ matrix.experimental || false }} + strategy: + matrix: + # All generated code should be running on stable now + rust: [nightly, stable] + include: + # Nightly is only for reference and allowed to fail + - rust: nightly + experimental: true + os: + # Check compilation works on common OSes + # (i.e. no path issues) + - ubuntu-latest + - macOS-latest + - windows-latest + runs-on: ${{ matrix.os }} + steps: + - uses: actions/checkout@v3 + - uses: dtolnay/rust-toolchain@master + with: + toolchain: ${{ matrix.rust }} + target: thumbv6m-none-eabi + - run: cd firmware && cargo install flip-link + - run: cd firmware && cargo build --all + - run: cd firmware && cargo build --all --release + linting: + name: Linting + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v3 + with: + submodules: true + - uses: dtolnay/rust-toolchain@stable + with: + components: clippy + target: thumbv6m-none-eabi + - run: cd firmware && cargo clippy --all-features -- --deny=warnings + formatting: + name: Formatting + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v3 + with: + submodules: true + - uses: dtolnay/rust-toolchain@stable + with: + components: rustfmt + target: thumbv6m-none-eabi + - run: cd firmware && cargo fmt -- --check diff --git a/firmware/.cargo/config.toml b/firmware/.cargo/config.toml new file mode 100644 index 0000000..ca56c01 --- /dev/null +++ b/firmware/.cargo/config.toml @@ -0,0 +1,22 @@ +[target.'cfg(all(target_arch = "arm", target_os = "none"))'] +runner = "probe-run --chip RP2040" + +rustflags = [ + "-C", "linker=flip-link", + "-C", "link-arg=--nmagic", + "-C", "link-arg=-Tlink.x", + "-C", "link-arg=-Tdefmt.x", + + # Code-size optimizations. + # trap unreachable can save a lot of space, but requires nightly compiler. + # uncomment the next line if you wish to enable it + # "-Z", "trap-unreachable=no", + "-C", "inline-threshold=5", + "-C", "no-vectorize-loops", +] + +[build] +target = "thumbv6m-none-eabi" + +[env] +DEFMT_LOG = "debug" diff --git a/firmware/.gitignore b/firmware/.gitignore new file mode 100644 index 0000000..3a0e903 --- /dev/null +++ b/firmware/.gitignore @@ -0,0 +1,14 @@ +**/*.rs.bk +.#* +.gdb_history +Cargo.lock +target/ + +# editor files +.vscode/* +!.vscode/*.md +!.vscode/*.svd +!.vscode/launch.json +!.vscode/tasks.json +!.vscode/extensions.json +!.vscode/settings.json \ No newline at end of file diff --git a/firmware/APACHE2.0 b/firmware/APACHE2.0 new file mode 100644 index 0000000..a1fc205 --- /dev/null +++ b/firmware/APACHE2.0 @@ -0,0 +1,201 @@ +Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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= "0.2.1" + +# but you can use any BSP. Uncomment this to use the pro_micro_rp2040 BSP instead +# sparkfun-pro-micro-rp2040 = "0.6" + +# If you're not going to use a Board Support Package you'll need these: +# rp2040-hal = { version="0.8", features=["rt", "critical-section-impl"] } +# rp2040-boot2 = "0.2" + +# cargo build/run +[profile.dev] +codegen-units = 1 +debug = 2 +debug-assertions = true +incremental = false +opt-level = 3 +overflow-checks = true + +# cargo build/run --release +[profile.release] +codegen-units = 1 +debug = 2 +debug-assertions = false +incremental = false +lto = 'fat' +opt-level = 3 +overflow-checks = false + +# do not optimize proc-macro crates = faster builds from scratch +[profile.dev.build-override] +codegen-units = 8 +debug = false +debug-assertions = false +opt-level = 0 +overflow-checks = false + +[profile.release.build-override] +codegen-units = 8 +debug = false +debug-assertions = false +opt-level = 0 +overflow-checks = false + +# cargo test +[profile.test] +codegen-units = 1 +debug = 2 +debug-assertions = true +incremental = false +opt-level = 3 +overflow-checks = true + +# cargo test --release +[profile.bench] +codegen-units = 1 +debug = 2 +debug-assertions = false +incremental = false +lto = 'fat' +opt-level = 3 diff --git a/firmware/MIT b/firmware/MIT new file mode 100644 index 0000000..92d4f52 --- /dev/null +++ b/firmware/MIT @@ -0,0 +1,21 @@ +MIT License + +Copyright (c) 2021 rp-rs organization + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/firmware/build.rs b/firmware/build.rs new file mode 100644 index 0000000..d534cc3 --- /dev/null +++ b/firmware/build.rs @@ -0,0 +1,31 @@ +//! This build script copies the `memory.x` file from the crate root into +//! a directory where the linker can always find it at build time. +//! For many projects this is optional, as the linker always searches the +//! project root directory -- wherever `Cargo.toml` is. However, if you +//! are using a workspace or have a more complicated build setup, this +//! build script becomes required. Additionally, by requesting that +//! Cargo re-run the build script whenever `memory.x` is changed, +//! updating `memory.x` ensures a rebuild of the application with the +//! new memory settings. + +use std::env; +use std::fs::File; +use std::io::Write; +use std::path::PathBuf; + +fn main() { + // Put `memory.x` in our output directory and ensure it's + // on the linker search path. + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + File::create(out.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + + // By default, Cargo will re-run a build script whenever + // any file in the project changes. By specifying `memory.x` + // here, we ensure the build script is only re-run when + // `memory.x` is changed. + println!("cargo:rerun-if-changed=memory.x"); +} diff --git a/firmware/memory.x b/firmware/memory.x new file mode 100644 index 0000000..070eac7 --- /dev/null +++ b/firmware/memory.x @@ -0,0 +1,15 @@ +MEMORY { + BOOT2 : ORIGIN = 0x10000000, LENGTH = 0x100 + FLASH : ORIGIN = 0x10000100, LENGTH = 2048K - 0x100 + RAM : ORIGIN = 0x20000000, LENGTH = 256K +} + +EXTERN(BOOT2_FIRMWARE) + +SECTIONS { + /* ### Boot loader */ + .boot2 ORIGIN(BOOT2) : + { + KEEP(*(.boot2)); + } > BOOT2 +} INSERT BEFORE .text; \ No newline at end of file diff --git a/firmware/src/i2s.rs b/firmware/src/i2s.rs new file mode 100644 index 0000000..1b6fab3 --- /dev/null +++ b/firmware/src/i2s.rs @@ -0,0 +1,225 @@ +//! Code to set up a PIO to generate I2S Audio + +use rp_pico::hal::{pac::interrupt, prelude::*}; + +/// Holds the objects we need to read from the RAM fifo and write to the PIO hardware FIFO. +static mut PLAYBACK_TO_PIO: Option = None; + +/// The reader end of the RAM FIFO and the writer end of the PIO hardware FIFO. +struct PlaybackToPio { + pio_fifo: rp_pico::hal::pio::Tx<(rp_pico::pac::PIO1, rp_pico::hal::pio::SM0)>, + ram_fifo: heapless::spsc::Consumer<'static, u32, 1024>, +} + +/// Used to 'play' samples by writing them to the RAM FIFO. +/// +/// Holds the writer end of the RAM FIFO. +pub struct Player { + fifo: heapless::spsc::Producer<'static, u32, 1024>, +} + +impl Player { + /// Queue some 16-bit stereo samples for playback. + /// + /// Takes as many as will fit in the FIFO. Returns how many bytes were + /// taken, which will always be a multiple of 4 because it always takes them + /// in Little Endian 16-bit stereo. + /// + /// The length of `samples` must be a multiple of 4, as they should be + /// 16-bit stereo pairs. + pub fn play_samples_16bit_stereo(&mut self, samples: &[u8]) -> usize { + let mut count = 0; + for samples in samples.chunks_exact(4) { + if self.fifo.ready() { + let left_sample = (samples[1] as u32) << 8 | (samples[0] as u32); + let right_sample = (samples[3] as u32) << 8 | (samples[2] as u32); + let stereo_sample = left_sample << 16 | right_sample; + self.fifo.enqueue(stereo_sample).unwrap(); + count += 4; + } else { + break; + } + } + count + } + + /// Queue some 16-bit mono samples for playback. + /// + /// Takes as many as will fit in the FIFO. Returns how many bytes were + /// taken, which will always be a multiple of 2 because it always takes them + /// in Little Endian 16-bit mono, and duplicates them as they go into the + /// FIFO. + /// + /// The length of `samples` must be a multiple of 2, as they should be + /// 16-bit mono samples. + pub fn play_samples_16bit_mono(&mut self, samples: &[u8]) -> usize { + let mut count = 0; + for samples in samples.chunks_exact(2) { + if self.fifo.ready() { + let mono_sample = (samples[1] as u32) << 8 | (samples[0] as u32); + let stereo_sample = mono_sample << 16 | mono_sample; + self.fifo.enqueue(stereo_sample).unwrap(); + count += 2; + } else { + break; + } + } + count + } + + /// Space, in stereo samples. + pub fn available_space(&self) -> usize { + self.fifo.capacity() - self.fifo.len() + } +} + +/// Initialise PIO1 to produce I2S audio. +/// +/// Returns a FIFO you can send samples into. +pub fn init(pio: super::pac::PIO1, resets: &mut super::pac::RESETS) -> Player { + // Grab PIO0 and the state machines it contains + let (mut pio, sm0, _sm1, _sm2, _sm3) = pio.split(resets); + + // This is the I2S program. It transfers two 16-bit words (left and right), + // packed as a 32-bit value in the FIFO, according to the clock signals received. + // + // You should clock out data Left (i.e. MSB first) to be I2S compatible. + let samples_program = pio_proc::pio_asm!( + ".wrap_target" + + // 1. Spin until L word starts (LRCLK goes from low to high). + + "wait 0 pin 6" // Wait for LRCLK low + "wait 1 pin 6" // Wait for LRCLK high + + // 2. Skip dummy bit (which comes after LRCLK transition) + + "set x, 15" // Set loop count whilst we wait (it's free) + "wait 0 pin 5" // Wait for BCLK to finish going low + "wait 1 pin 5" // Wait for BCLK rising edge (middle of the dummy bit) + + // 3. Read/Write 16 bits of left channel data + + "left_loop:" + " wait 0 pin 5" // Wait for BCLK falling edge (start of bit) + " out pins, 1" // Write DAC bit + " wait 1 pin 5" // Wait for BCLK rising edge (middle of bit) + " in pins, 1" // Read ADC bit + " jmp x-- left_loop" // Repeat until x is 0 (runs for N + 1 loops) + + // 4. Spin until R word starts (LRCLK goes low) + + "wait 0 pin 6" // Wait for LRCLK low + + // 5. Skip dummy bit (which comes after LRCLK transition) + + "set x, 15" // Set loop count whilst we wait (it's free) + "wait 0 pin 5" // Wait for BCLK to finish going low + "wait 1 pin 5" // Wait for BCLK rising edge (middle of the dummy bit) + + // 6. Read/Write 16 bits of left channel data + + "right_loop:" + " wait 0 pin 5" // Wait for BCLK falling edge (start of bit) + " out pins, 1" // Write DAC bit + " wait 1 pin 5" // Wait for BCLK rising edge (middle of bit) + " in pins, 1" // Read ADC bit + " jmp x-- right_loop" // Repeat until x is 0 (runs for N + 1 loops) + + // 7. Load + Store all 32 bits (16 bits left, 16 bits right) + + "push noblock" + "pull noblock" + + ".wrap" + ); + + // R00 is the LSB of the right word, R15 is the MSB of the right word. + // L00 is the LSB of the left word, L15 is the MSB of the left word. + // + // There is one dummy bit after the LRCLK edge. There may be more than 17 bit-clocks in each + // phase of the LRCLK signal - ignore any extra bits. In fact on the NAU88C22 we get + // a total of 125 bit-clocks for the left and another 125 bit-clocks for the right because + // the bit clock is 12 MHz and the LRCLK is 48 kHz. + // + // DAC : ..┬──┬──┬──┬──┬──┬──┬──┬──┬...┬──┬──┬──┬──┬──┬──┬...┬──┬──┬──┬──┬──┬──┬.. + // : │ Pad │ L15 │ L14 │ L13 │ │ L02 │ L01 │ L00 │ │ Pad │ R15 │ R14 │ + // : ..┴──┴──┴──┴──┴──┴──┴──┴──┴...┴──┴──┴──┴──┴──┴──┴...┴──┴──┴──┴──┴──┴──┴.. + // LRCLK : ┌─────────────────────────────────────────────────┐ + // : │ │ + // : ..─┘ └─────────────────.. + // BCLK : ..─┐ ┌──┐ ┌──┐ ┌──┐ ┌──┐ ..┐ ┌──┐ ┌──┐ ┌──┐ ..┐ ┌──┐ ┌──┐ ┌──┐ + // : │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ + // : └──┘ └──┘ └──┘ └──┘ └.. └──┘ └──┘ └──┘ └.. └──┘ └──┘ └──┘ └.. + // ^ ^ + // │ │ + // │ └── Read ADC on rising BCLK + // └── Update DAC on falling BCLK + // + // ADC in (CODEC-to-Pico) is GPIO22 + // DAC out (Pico-to-CODEC) is GPIO26 + // BCLK is GPIO27 + // LRCLK is GPIO28 + + let samples_installed = pio.install(&samples_program.program).unwrap(); + let (mut samples_sm, _sample_rx_fifo, pio_tx_fifo) = + rp_pico::hal::pio::PIOBuilder::from_program(samples_installed) + .buffers(rp_pico::hal::pio::Buffers::RxTx) + .out_pins(26, 1) // DAC out is GPIO26 + .in_pin_base(22) + .autopull(false) + .autopush(false) + .out_shift_direction(rp_pico::hal::pio::ShiftDirection::Left) + .in_shift_direction(rp_pico::hal::pio::ShiftDirection::Left) + .build(sm0); + samples_sm.set_pindirs([ + (22, rp_pico::hal::pio::PinDir::Input), + (26, rp_pico::hal::pio::PinDir::Output), + (27, rp_pico::hal::pio::PinDir::Input), + (28, rp_pico::hal::pio::PinDir::Input), + ]); + + let _running_sam = samples_sm.start(); + + static mut SAMPLE_QUEUE: heapless::spsc::Queue = heapless::spsc::Queue::new(); + let (q_producer, q_consumer) = unsafe { SAMPLE_QUEUE.split() }; + + pio_tx_fifo.enable_tx_not_full_interrupt(rp_pico::hal::pio::PioIRQ::Irq0); + + critical_section::with(|_| unsafe { + PLAYBACK_TO_PIO.replace(PlaybackToPio { + pio_fifo: pio_tx_fifo, + ram_fifo: q_consumer, + }); + }); + + unsafe { + rp_pico::hal::pac::NVIC::unmask(rp_pico::hal::pac::Interrupt::PIO1_IRQ_0); + } + + Player { fifo: q_producer } +} + +/// Called when the PIO1 IRQ fires. +/// +/// We mapped this to "TX FIFO is not empty", so this interrupt will be +/// repeatedly called whilst the PIO FIFO is not full. +#[interrupt] +fn PIO1_IRQ_0() { + // This is the only function (apart from `init`) which accesses this + // variable, and `init()` is sure to disable interrupts until the global is + // set up, so this is safe. + let Some(fifo) = (unsafe { PLAYBACK_TO_PIO.as_mut() }) else { + return; + }; + // Read from fifo.ram_fifo + if let Some(sample) = fifo.ram_fifo.dequeue() { + // .. and write to fifo.pio_fifo + fifo.pio_fifo.write(sample); + } else { + // Read failed to play null sample to in-fill + fifo.pio_fifo.write(0); + } + // Send an event, just in case this CPU just went to sleep + cortex_m::asm::sev(); +} diff --git a/firmware/src/main.rs b/firmware/src/main.rs new file mode 100644 index 0000000..b5e967d --- /dev/null +++ b/firmware/src/main.rs @@ -0,0 +1,159 @@ +//! Blinks the LED on a Pico board +//! +//! This will blink an LED attached to GP25, which is the pin the Pico uses for the on-board LED. +#![no_std] +#![no_main] + +use bsp::entry; +use defmt::*; +use defmt_rtt as _; +use embedded_hal::digital::v2::OutputPin; +use panic_probe as _; + +use rp2040_hal::gpio::{FunctionPio1, Pin, PullNone}; +// Provide an alias for our BSP so we can switch targets quickly. +// Uncomment the BSP you included in Cargo.toml, the rest of the code does not need to change. +use rp_pico as bsp; +// use sparkfun_pro_micro_rp2040 as bsp; + +use bsp::hal::{ + clocks::{init_clocks_and_plls, Clock}, + fugit::RateExtU32, + pac, + sio::Sio, + watchdog::Watchdog, +}; + +mod i2s; + +// static CLIP: [u8; 403052] = *include_bytes!("test audio.raw"); +static CLIP: [u8; 1024] = [0; 1024]; + +#[entry] +fn main() -> ! { + info!("Program start"); + let mut pac = pac::Peripherals::take().unwrap(); + let core = pac::CorePeripherals::take().unwrap(); + let mut watchdog = Watchdog::new(pac.WATCHDOG); + let sio = Sio::new(pac.SIO); + + // External high-speed crystal on the pico board is 12Mhz + let external_xtal_freq_hz = 12_000_000u32; + let clocks = init_clocks_and_plls( + external_xtal_freq_hz, + pac.XOSC, + pac.CLOCKS, + pac.PLL_SYS, + pac.PLL_USB, + &mut pac.RESETS, + &mut watchdog, + ) + .ok() + .unwrap(); + + let mut delay = cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().to_Hz()); + + let pins = bsp::Pins::new( + pac.IO_BANK0, + pac.PADS_BANK0, + sio.gpio_bank0, + &mut pac.RESETS, + ); + + // This is the correct pin on the Raspberry Pico board. On other boards, even if they have an + // on-board LED, it might need to be changed. + // Notably, on the Pico W, the LED is not connected to any of the RP2040 GPIOs but to the cyw43 module instead. If you have + // a Pico W and want to toggle a LED with a simple GPIO output pin, you can connect an external + // LED to one of the GPIO pins, and reference that pin here. + let mut led_pin = pins.led.into_push_pull_output(); + let sda_pin = pins.gpio14.into_function(); + let scl_pin = pins.gpio15.into_function(); + + let i2c = bsp::hal::I2C::i2c1( + pac.I2C1, + sda_pin, + scl_pin, + 100.kHz(), + &mut pac.RESETS, + &clocks.system_clock, + ); + + let _i2s_adc_data: Pin = + pins.gpio22.reconfigure(); + let _i2s_dac_data: Pin = + pins.gpio26.reconfigure(); + let _i2s_bit_clock: Pin = + pins.gpio27.reconfigure(); + let _i2s_lr_clock: Pin = + pins.gpio28.reconfigure(); + + let mut player = i2s::init(pac.PIO1, &mut pac.RESETS); + unsafe { + cortex_m::interrupt::enable(); + } + + let mut codec = nau88c22::Codec::new(i2c, Some(12_000_000)); + + let _ = codec.reset(); + + for _ in 0..10 { + delay.delay_ms(100); + info!( + "Device ID: {:?}", + codec.check_device_id().map_err(clean_error) + ); + } + + // R1 Bit 2, IOBUFEN, set to logic = 1 + // R1 Bit 8, DCBUFEN, set to logic = 1 if setting up for greater than 3.60V operation + codec + .modify_powermanagement1(|mut w| { + w.iobufen_set(true); + w.dcbufen_set(true); + w + }) + .unwrap(); + info!( + "powermanagement1 = {:?}", + defmt::Debug2Format(&codec.read_powermanagement1().map_err(clean_error)) + ); + + // R1 Bits 1, Bit 0, REFIMP set to 80kΩ setting + // R1 Bit 2, ABIASEN, set to logic = 1 + // Value to be written to R1 = 0x10D + codec + .modify_powermanagement1(|mut w| { + w.refimp_set(1); + w.abiasen_set(true); + w + }) + .unwrap(); + info!( + "powermanagement1 = {:?}", + defmt::Debug2Format(&codec.read_powermanagement1().map_err(clean_error)) + ); + + // wait for caps to charge + delay.delay_ms(250); + + loop { + info!("play!"); + led_pin.set_high().unwrap(); + let mut count = 0; + while count < CLIP.len() { + count += player.play_samples_16bit_stereo(&CLIP); + } + led_pin.set_low().unwrap(); + info!("stop!"); + delay.delay_ms(1000); + } +} + +fn clean_error(e: nau88c22::Error) -> nau88c22::Error<()> { + match e { + nau88c22::Error::I2c(_) => nau88c22::Error::I2c(()), + nau88c22::Error::WrongDeviceId => nau88c22::Error::WrongDeviceId, + } +} + +// End of file diff --git a/firmware/src/test audio.raw b/firmware/src/test audio.raw new file mode 100644 index 0000000..35642f6 Binary files /dev/null and b/firmware/src/test audio.raw differ