From a2f8a24d96714feca22e9674bdf486227922d49c Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Tue, 27 Nov 2018 10:13:43 -0800 Subject: [PATCH 01/12] Update Nuttx and NuttX-apps to 7.28+ w/PX4 imxrt contrib --- platforms/nuttx/NuttX/apps | 2 +- platforms/nuttx/NuttX/nuttx | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/platforms/nuttx/NuttX/apps b/platforms/nuttx/NuttX/apps index 13eeff0ec3f2..8f0b299e823d 160000 --- a/platforms/nuttx/NuttX/apps +++ b/platforms/nuttx/NuttX/apps @@ -1 +1 @@ -Subproject commit 13eeff0ec3f23d84fabf1e9fe216846957ad15cf +Subproject commit 8f0b299e823dfb1dd0bc513d8b08bd603bbb6af6 diff --git a/platforms/nuttx/NuttX/nuttx b/platforms/nuttx/NuttX/nuttx index a6f5881ea851..324969142b92 160000 --- a/platforms/nuttx/NuttX/nuttx +++ b/platforms/nuttx/NuttX/nuttx @@ -1 +1 @@ -Subproject commit a6f5881ea851383877b92b0b6fed1ba9ff9825d0 +Subproject commit 324969142b926e54b611fb5869689b559b1db803 From c093110eedf3be1c6da6c74a5af1b0d260247770 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 3 Jan 2019 16:26:30 -0800 Subject: [PATCH 02/12] board_common:Add PX4 SOC ARCH ID for IMXRT --- src/drivers/boards/common/board_common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/drivers/boards/common/board_common.h b/src/drivers/boards/common/board_common.h index 9784edd49484..05f4c6ec8da9 100644 --- a/src/drivers/boards/common/board_common.h +++ b/src/drivers/boards/common/board_common.h @@ -371,6 +371,7 @@ typedef enum PX4_SOC_ARCH_ID_t { PX4_SOC_ARCH_ID_STM32F7 = 0x0002, PX4_SOC_ARCH_ID_KINETISK66 = 0x0003, PX4_SOC_ARCH_ID_SAMV7 = 0x0004, + PX4_SOC_ARCH_ID_NXPIMXRT1062 = 0x0005, PX4_SOC_ARCH_ID_EAGLE = 0x1001, PX4_SOC_ARCH_ID_QURT = 0x1002, From f2406c4bea1c74d2155222a2a8dfcafa00d45add Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Wed, 9 Jan 2019 13:09:31 -0800 Subject: [PATCH 03/12] px4_micro_hal:Add IMXRT --- src/platforms/px4_micro_hal.h | 84 ++++++++++++++++++++++++++++++++++- 1 file changed, 83 insertions(+), 1 deletion(-) diff --git a/src/platforms/px4_micro_hal.h b/src/platforms/px4_micro_hal.h index 62b8b9261e43..3df17b8dea05 100644 --- a/src/platforms/px4_micro_hal.h +++ b/src/platforms/px4_micro_hal.h @@ -1,6 +1,6 @@ /**************************************************************************** * - * Copyright (c) 2016 PX4 Development Team. All rights reserved. + * Copyright (c) 2016-2019 PX4 Development Team. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -53,6 +53,10 @@ __BEGIN_DECLS # define px4_enter_critical_section() enter_critical_section() # define px4_leave_critical_section(flags) leave_critical_section(flags) +/***************************************************************************************** + * STM32 Fx + ****************************************************************************************/ + # if defined(CONFIG_ARCH_CHIP_STM32) || defined(CONFIG_ARCH_CHIP_STM32F7) # if defined(CONFIG_ARCH_CHIP_STM32) @@ -149,6 +153,10 @@ int stm32_flash_writeprotect(size_t page, bool enabled); # define px4_arch_gpiosetevent(pinset,r,f,e,fp,a) stm32_gpiosetevent(pinset,r,f,e,fp,a) #endif // defined(CONFIG_ARCH_CHIP_STM32) || defined(CONFIG_ARCH_CHIP_STM32F7) +/***************************************************************************************** + * K66 + ****************************************************************************************/ + #if defined(CONFIG_ARCH_CHIP_KINETIS) # define PX4_SOC_ARCH_ID PX4_SOC_ARCH_ID_KINETISK66 @@ -223,6 +231,80 @@ int stm32_flash_writeprotect(size_t page, bool enabled); # define px4_arch_gpiosetevent(pinset,r,f,e,fp,a) kinetis_gpiosetevent(pinset,r,f,e,fp,a) # endif +/***************************************************************************************** + * IMX RT + ****************************************************************************************/ + +#if defined(CONFIG_ARCH_CHIP_IMXRT) +# define PX4_SOC_ARCH_ID PX4_SOC_ARCH_ID_NXPIMXRT1062 + +# // Fixme: using ?? +# define PX4_BBSRAM_SIZE 2048 +# define PX4_BBSRAM_GETDESC_IOCTL 0 +# define PX4_NUMBER_I2C_BUSES 4 + +# define GPIO_OUTPUT_SET GPIO_OUTPUT_ONE +# define GPIO_OUTPUT_CLEAR GPIO_OUTPUT_ZERO + +# include +# include +# include +//# include todo:Upsteam UID access + +/* imxrt defines the 64 bit UUID as + * + * OCOTP 0x410 bits 31:0 + * OCOTP 0x420 bits 63:32 + * + * PX4 uses the words in bigendian order MSB to LSB + * word [0] [1] + * bits 63-32, 31-00, + */ +# define PX4_CPU_UUID_BYTE_LENGTH 8 +# define PX4_CPU_UUID_WORD32_LENGTH (PX4_CPU_UUID_BYTE_LENGTH/sizeof(uint32_t)) + +/* The mfguid will be an array of bytes with + * MSD @ index 0 - LSD @ index PX4_CPU_MFGUID_BYTE_LENGTH-1 + * + * It will be converted to a string with the MSD on left and LSD on the right most position. + */ +# define PX4_CPU_MFGUID_BYTE_LENGTH PX4_CPU_UUID_BYTE_LENGTH + +/* define common formating across all commands */ + +# define PX4_CPU_UUID_WORD32_FORMAT "%08x" +# define PX4_CPU_UUID_WORD32_SEPARATOR ":" + +# define PX4_CPU_UUID_WORD32_UNIQUE_H 0 /* Least significant digits change the most (die wafer,X,Y */ +# define PX4_CPU_UUID_WORD32_UNIQUE_M 1 /* Most significant digits change the least (lot#) */ + +/* Separator nnn:nnn:nnnn 2 char per byte term */ +# define PX4_CPU_UUID_WORD32_FORMAT_SIZE (PX4_CPU_UUID_WORD32_LENGTH-1+(2*PX4_CPU_UUID_BYTE_LENGTH)+1) +# define PX4_CPU_MFGUID_FORMAT_SIZE ((2*PX4_CPU_MFGUID_BYTE_LENGTH)+1) + +# define imxrt_bbsram_savepanic(fileno, context, length) (0) // todo:Not implemented yet + +# define px4_savepanic(fileno, context, length) imxrt_bbsram_savepanic(fileno, context, length) + +/* bus_num is 1 based on imx and must be translated from the legacy one based */ + +# define PX4_BUS_OFFSET 0 /* imxrt buses are 1 based no adjustment needed */ + +# define px4_spibus_initialize(bus_num_1based) imxrt_lpspibus_initialize(PX4_BUS_NUMBER_FROM_PX4(bus_num_1based)) + +# define px4_i2cbus_initialize(bus_num_1based) imxrt_i2cbus_initialize(PX4_BUS_NUMBER_FROM_PX4(bus_num_1based)) +# define px4_i2cbus_uninitialize(pdev) imxrt_i2cbus_uninitialize(pdev) + +# define px4_arch_configgpio(pinset) imxrt_config_gpio(pinset) +# define px4_arch_unconfiggpio(pinset) +# define px4_arch_gpioread(pinset) imxrt_gpio_read(pinset) +# define px4_arch_gpiowrite(pinset, value) imxrt_gpio_write(pinset, value) + +/* imxrt_gpiosetevent is not implemented and will need to be added */ + +# define px4_arch_gpiosetevent(pinset,r,f,e,fp,a) imxrt_gpiosetevent(pinset,r,f,e,fp,a) +# endif + #include __END_DECLS From 476d8bc0510cc3c21985279ef1c03071bfcc48a4 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 27 Dec 2018 16:00:31 -0800 Subject: [PATCH 04/12] Add IMXRT based board:fmurt1062-v1 and imxrt drivers --- Makefile | 1 + boards/nxp/fmurt1062-v1/default.cmake | 128 ++ boards/nxp/fmurt1062-v1/firmware.prototype | 13 + boards/nxp/fmurt1062-v1/init/rc.board | 54 + boards/nxp/fmurt1062-v1/nuttx-config/Kconfig | 16 + .../fmurt1062-v1/nuttx-config/include/board.h | 383 +++++ .../fmurt1062-v1/nuttx-config/nsh/defconfig | 1498 +++++++++++++++++ .../nuttx-config/scripts/ld.script | 178 ++ boards/nxp/fmurt1062-v1/src/CMakeLists.txt | 55 + boards/nxp/fmurt1062-v1/src/autoleds.c | 191 +++ boards/nxp/fmurt1062-v1/src/automount.c | 304 ++++ boards/nxp/fmurt1062-v1/src/board_config.h | 696 ++++++++ boards/nxp/fmurt1062-v1/src/can.c | 129 ++ .../fmurt1062-v1/src/imxrt_flexspi_nor_boot.c | 64 + .../fmurt1062-v1/src/imxrt_flexspi_nor_boot.h | 147 ++ .../src/imxrt_flexspi_nor_flash.c | 198 +++ .../src/imxrt_flexspi_nor_flash.h | 349 ++++ boards/nxp/fmurt1062-v1/src/init.c | 350 ++++ boards/nxp/fmurt1062-v1/src/led.c | 115 ++ boards/nxp/fmurt1062-v1/src/manifest.c | 157 ++ boards/nxp/fmurt1062-v1/src/sdhc.c | 127 ++ boards/nxp/fmurt1062-v1/src/spi.c | 413 +++++ boards/nxp/fmurt1062-v1/src/timer_config.c | 250 +++ boards/nxp/fmurt1062-v1/src/usb.c | 129 ++ src/drivers/boards/common/CMakeLists.txt | 2 + .../boards/common/imxrt/CMakeLists.txt | 41 + .../boards/common/imxrt/board_hw_rev_ver.c | 345 ++++ .../boards/common/imxrt/board_identity.c | 172 ++ .../boards/common/imxrt/board_mcu_version.c | 76 + src/drivers/boards/common/imxrt/board_reset.c | 79 + src/drivers/imxrt/CMakeLists.txt | 43 + src/drivers/imxrt/adc/CMakeLists.txt | 39 + src/drivers/imxrt/adc/adc.cpp | 570 +++++++ src/drivers/imxrt/drv_hrt.c | 875 ++++++++++ src/drivers/imxrt/drv_input_capture.c | 332 ++++ src/drivers/imxrt/drv_input_capture.h | 42 + src/drivers/imxrt/drv_io_timer.c | 733 ++++++++ src/drivers/imxrt/drv_io_timer.h | 142 ++ src/drivers/imxrt/drv_led_pwm.cpp | 354 ++++ src/drivers/imxrt/drv_pwm_servo.c | 162 ++ src/drivers/imxrt/drv_pwm_servo.h | 42 + src/drivers/imxrt/drv_pwm_trigger.c | 108 ++ src/drivers/imxrt/drv_pwm_trigger.h | 42 + src/drivers/imxrt/tone_alarm/CMakeLists.txt | 36 + .../imxrt/tone_alarm/ToneAlarmInterface.cpp | 190 +++ 45 files changed, 10370 insertions(+) create mode 100644 boards/nxp/fmurt1062-v1/default.cmake create mode 100644 boards/nxp/fmurt1062-v1/firmware.prototype create mode 100644 boards/nxp/fmurt1062-v1/init/rc.board create mode 100644 boards/nxp/fmurt1062-v1/nuttx-config/Kconfig create mode 100644 boards/nxp/fmurt1062-v1/nuttx-config/include/board.h create mode 100644 boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig create mode 100644 boards/nxp/fmurt1062-v1/nuttx-config/scripts/ld.script create mode 100644 boards/nxp/fmurt1062-v1/src/CMakeLists.txt create mode 100644 boards/nxp/fmurt1062-v1/src/autoleds.c create mode 100644 boards/nxp/fmurt1062-v1/src/automount.c create mode 100644 boards/nxp/fmurt1062-v1/src/board_config.h create mode 100644 boards/nxp/fmurt1062-v1/src/can.c create mode 100644 boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_boot.c create mode 100644 boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_boot.h create mode 100644 boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_flash.c create mode 100644 boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_flash.h create mode 100644 boards/nxp/fmurt1062-v1/src/init.c create mode 100644 boards/nxp/fmurt1062-v1/src/led.c create mode 100644 boards/nxp/fmurt1062-v1/src/manifest.c create mode 100644 boards/nxp/fmurt1062-v1/src/sdhc.c create mode 100644 boards/nxp/fmurt1062-v1/src/spi.c create mode 100644 boards/nxp/fmurt1062-v1/src/timer_config.c create mode 100644 boards/nxp/fmurt1062-v1/src/usb.c create mode 100644 src/drivers/boards/common/imxrt/CMakeLists.txt create mode 100644 src/drivers/boards/common/imxrt/board_hw_rev_ver.c create mode 100644 src/drivers/boards/common/imxrt/board_identity.c create mode 100644 src/drivers/boards/common/imxrt/board_mcu_version.c create mode 100644 src/drivers/boards/common/imxrt/board_reset.c create mode 100644 src/drivers/imxrt/CMakeLists.txt create mode 100644 src/drivers/imxrt/adc/CMakeLists.txt create mode 100644 src/drivers/imxrt/adc/adc.cpp create mode 100644 src/drivers/imxrt/drv_hrt.c create mode 100644 src/drivers/imxrt/drv_input_capture.c create mode 100644 src/drivers/imxrt/drv_input_capture.h create mode 100644 src/drivers/imxrt/drv_io_timer.c create mode 100644 src/drivers/imxrt/drv_io_timer.h create mode 100644 src/drivers/imxrt/drv_led_pwm.cpp create mode 100644 src/drivers/imxrt/drv_pwm_servo.c create mode 100644 src/drivers/imxrt/drv_pwm_servo.h create mode 100644 src/drivers/imxrt/drv_pwm_trigger.c create mode 100644 src/drivers/imxrt/drv_pwm_trigger.h create mode 100644 src/drivers/imxrt/tone_alarm/CMakeLists.txt create mode 100644 src/drivers/imxrt/tone_alarm/ToneAlarmInterface.cpp diff --git a/Makefile b/Makefile index a708a1a97774..8479d5f6fbcf 100644 --- a/Makefile +++ b/Makefile @@ -253,6 +253,7 @@ px4fmu_firmware: \ misc_qgc_extra_firmware: \ check_nxp_fmuk66-v3_default \ + check_nxp_fmurt1062-v1_default \ check_intel_aerofc-v1_default \ check_auav_x21_default \ check_bitcraze_crazyflie_default \ diff --git a/boards/nxp/fmurt1062-v1/default.cmake b/boards/nxp/fmurt1062-v1/default.cmake new file mode 100644 index 000000000000..4affccc9e95f --- /dev/null +++ b/boards/nxp/fmurt1062-v1/default.cmake @@ -0,0 +1,128 @@ + +px4_add_board( + PLATFORM nuttx + VENDOR nxp + MODEL fmurt1062-v1 + TOOLCHAIN arm-none-eabi + ARCHITECTURE cortex-m7 + ROMFSROOT px4fmu_common + TESTING +# UAVCAN_INTERFACES 2 + + SERIAL_PORTS +# GPS1:/dev/ttyS0 +# TEL1:/dev/ttyS1 +# TEL2:/dev/ttyS2 +# GPS2:/dev/ttyS3 +# ON EVK + GPS1:/dev/ttyS1 + TEL2:/dev/ttyS2 + + DRIVERS + barometer # all available barometer drivers + batt_smbus + camera_trigger + differential_pressure # all available differential pressure drivers + distance_sensor # all available distance sensor drivers + gps + #heater + #imu # all available imu drivers + #heater + imu/adis16448 + #imu # all available imu drivers + imu/bma180 + imu/bmi055 + imu/bmi160 + imu/mpu6000 + imu/mpu9250 + irlock + imxrt + imxrt/adc + imxrt/tone_alarm + lights/blinkm + lights/oreoled + lights/rgbled + lights/rgbled_ncp5623c + lights/rgbled_pwm + magnetometer # all available magnetometer drivers + mkblctrl + lights/pca8574 + pca9685 + pmw3901 + #protocol_splitter + #pwm_input # NOT Portable YET drivers + pwm_out_sim + px4flow + px4fmu + rc_input + roboclaw + tap_esc + telemetry # all available telemetry drivers + #test_ppm # NOT Portable YET + tone_alarm + + MODULES + attitude_estimator_q + camera_feedback + commander + dataman + ekf2 + events + fw_att_control + fw_pos_control_l1 + gnd_att_control + gnd_pos_control + land_detector + landing_target_estimator + load_mon + local_position_estimator + logger + mavlink + mc_att_control + mc_pos_control + navigator + sensors + vmount + vtol_att_control + wind_estimator + + SYSTEMCMDS + bl_update + config + dumpfile + esc_calib + #hardfault_log # Needs bbsrm + led_control + mixer + motor_ramp + motor_test + mtd + nshterm + param + perf + pwm + reboot + reflect + sd_bench + shutdown + tests # tests and test runner + top + topic_listener + tune_control + usb_connected + ver + + EXAMPLES + bottle_drop # OBC challenge + fixedwing_control # Tutorial code from https://px4.io/dev/example_fixedwing_control + hello + hwtest # Hardware test + #matlab_csv_serial + position_estimator_inav + px4_mavlink_debug # Tutorial code from https://px4.io/dev/debug_values + px4_simple_app # Tutorial code from https://px4.io/dev/px4_simple_app + rover_steering_control # Rover example app + segway + uuv_example_app + + ) diff --git a/boards/nxp/fmurt1062-v1/firmware.prototype b/boards/nxp/fmurt1062-v1/firmware.prototype new file mode 100644 index 000000000000..cbb26388e0be --- /dev/null +++ b/boards/nxp/fmurt1062-v1/firmware.prototype @@ -0,0 +1,13 @@ +{ + "board_id": 28, + "magic": "PX4FWv1", + "description": "Firmware for the NXPFMURT1062v1 board", + "image": "", + "build_time": 0, + "summary": "NXPFMURT1062v1", + "version": "0.1", + "image_size": 0, + "image_maxsize": 8388608, + "git_identity": "", + "board_revision": 0 +} diff --git a/boards/nxp/fmurt1062-v1/init/rc.board b/boards/nxp/fmurt1062-v1/init/rc.board new file mode 100644 index 000000000000..e0d53ab99bff --- /dev/null +++ b/boards/nxp/fmurt1062-v1/init/rc.board @@ -0,0 +1,54 @@ +#!nsh +# +# PX4 FMUv5 specific board init +# +#------------------------------------------------------------------------------ +# +# UART mapping on NXP FMURT1062: +# +# LPUART2 /dev/ttyS0 GPS +# LPUART3 /dev/ttyS2 TELEM2 (GPIO flow control) +# LPUART4 /dev/ttyS1 TELEM1 (UART flow control) +# LPUART5 /dev/ttyS3 TELEM4 GPS2 +# LPUART6 /dev/ttyS4 TELEM3 (RC_INPUT) +# LPUART7 /dev/ttyS5 CONSOLE +# LPUART8 /dev/ttyS6 PX4IO +# +#------------------------------------------------------------------------------ +# + + + +if [ $AUTOCNF = yes ] +then + param set SYS_FMU_TASK 1 +fi + +set LOGGER_BUF 64 + +# Internal SPI bus ICM-20602 +mpu6000 -R 8 -s -T 20602 start + +# Internal SPI bus ICM-20689 +mpu6000 -R 8 -z -T 20689 start + +# Internal SPI bus BMI055 accel +bmi055 -A -R 10 start + +# Internal SPI bus BMI055 gyro +bmi055 -G -R 10 start + +# Possible external compasses +hmc5883 -C -T -X start + +# Possible external compasses +ist8310 -C -b 1 start +ist8310 -C -b 2 start + +# Possible internal compass +ist8310 -C -b 5 start + +# Possible pmw3901 optical flow sensor +pmw3901 start + +px4flow start & diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/Kconfig b/boards/nxp/fmurt1062-v1/nuttx-config/Kconfig new file mode 100644 index 000000000000..6c309432bb04 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/nuttx-config/Kconfig @@ -0,0 +1,16 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +choice + prompt "Boot Flash" + default NXP_FMURT1062_V3_QSPI_FLASH + +config NXP_FMURT1062_V3_HYPER_FLASH + bool "HYPER Flash" + +config NXP_FMURT1062_V3_QSPI_FLASH + bool "QSPI Flash" + +endchoice # Boot Flash diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/include/board.h b/boards/nxp/fmurt1062-v1/nuttx-config/include/board.h new file mode 100644 index 000000000000..9da9adb6ed05 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/nuttx-config/include/board.h @@ -0,0 +1,383 @@ +/************************************************************************************ + * nuttx-configs/nxp_fmurt1062-v1/include/board.h + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __NUTTX_CONFIG_NXP_FMURT1062_V1_INCLUDE_BOARD_H +#define __NUTTX_CONFIG_NXP_FMURT1062_V1_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +#define ON_EVK // For Board Bring up before BIG Board on IMXRT1060-EVK + +/* Clocking *************************************************************************/ + +/* Set VDD_SOC to 1.3V */ + +#define IMXRT_VDD_SOC (0x14) + +/* Set Arm PLL (PLL1) to fOut = (24Mhz * ARM_PLL_DIV_SELECT/2) / ARM_PODF_DIVISOR + * 576Mhz = (24Mhz * ARM_PLL_DIV_SELECT/2) / ARM_PODF_DIVISOR + * ARM_PLL_DIV_SELECT = 96 + * ARM_PODF_DIVISOR = 2 + * 576Mhz = (24Mhz * 96/2) / 2 + * + * AHB_CLOCK_ROOT = PLL1fOut / IMXRT_AHB_PODF_DIVIDER + * 1Hz to 600 Mhz = 576Mhz / IMXRT_ARM_CLOCK_DIVIDER + * IMXRT_ARM_CLOCK_DIVIDER = 1 + * 576Mhz = 576Mhz / 1 + * + * PRE_PERIPH_CLK_SEL = PRE_PERIPH_CLK_SEL_PLL1 + * PERIPH_CLK_SEL = 1 (0 select PERIPH_CLK2_PODF, 1 select PRE_PERIPH_CLK_SEL_PLL1) + * PERIPH_CLK = 576Mhz + * + * IPG_CLOCK_ROOT = AHB_CLOCK_ROOT / IMXRT_IPG_PODF_DIVIDER + * IMXRT_IPG_PODF_DIVIDER = 4 + * 144Mhz = 576Mhz / 4 + * + * PRECLK_CLOCK_ROOT = IPG_CLOCK_ROOT / IMXRT_PERCLK_PODF_DIVIDER + * IMXRT_PERCLK_PODF_DIVIDER = 1 + * 16Mhz = 144Mhz / 9 + * + * SEMC_CLK_ROOT = 576Mhz / IMXRT_SEMC_PODF_DIVIDER (labeled AIX_PODF in 18.2) + * IMXRT_SEMC_PODF_DIVIDER = 8 + * 72Mhz = 576Mhz / 8 + * + * Set Sys PLL (PLL2) to fOut = (24Mhz * (20+(2*(DIV_SELECT))) + * 528Mhz = (24Mhz * (20+(2*(1))) + * + * Set USB1 PLL (PLL3) to fOut = (24Mhz * 20) + * 480Mhz = (24Mhz * 20) + * + * Set LPSPI PLL3 PFD0 to fOut = (480Mhz / 12 * 18) + * 720Mhz = (480Mhz / 12 * 18) + * 90Mhz = (720Mhz / LSPI_PODF_DIVIDER) + * + * Set USDHC1 PLL2 PFD2 to fOut = (528Mhz / 24 * 18) + * 396Mhz = (528Mhz / 24 * 18) + * 198Mhz = (396Mhz / IMXRT_USDHC1_PODF_DIVIDER) + */ + +#define BOARD_XTAL_FREQUENCY 24000000 +#define IMXRT_PRE_PERIPH_CLK_SEL CCM_CBCMR_PRE_PERIPH_CLK_SEL_PLL1 +#define IMXRT_PERIPH_CLK_SEL CCM_CBCDR_PERIPH_CLK_SEL_PRE_PERIPH +#define IMXRT_ARM_PLL_DIV_SELECT 96 +#define IMXRT_ARM_PODF_DIVIDER 2 +#define IMXRT_AHB_PODF_DIVIDER 1 +#define IMXRT_IPG_PODF_DIVIDER 4 +#define IMXRT_PERCLK_CLK_SEL CCM_CSCMR1_PERCLK_CLK_SEL_IPG_CLK_ROOT +#define IMXRT_PERCLK_PODF_DIVIDER 9 +#define IMXRT_SEMC_PODF_DIVIDER 8 + +#define IMXRT_LPSPI_CLK_SELECT CCM_CBCMR_LPSPI_CLK_SEL_PLL3_PFD0 +#define IMXRT_LSPI_PODF_DIVIDER 8 + +#define IMXRT_USDHC1_CLK_SELECT CCM_CSCMR1_USDHC1_CLK_SEL_PLL2_PFD0 +#define IMXRT_USDHC1_PODF_DIVIDER 2 + +#define IMXRT_SYS_PLL_SELECT CCM_ANALOG_PLL_SYS_DIV_SELECT_22 + +#define BOARD_CPU_FREQUENCY \ + (BOARD_XTAL_FREQUENCY * (IMXRT_ARM_PLL_DIV_SELECT / 2)) / IMXRT_ARM_PODF_DIVIDER + +#define BOARD_GPT_FREQUENCY \ + (BOARD_CPU_FREQUENCY / IMXRT_IPG_PODF_DIVIDER) / IMXRT_PERCLK_PODF_DIVIDER + +/* SDIO *****************************************************************************/ + +/* Pin drive characteristics */ + +#define USDHC1_DATAX_IOMUX (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \ + IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER) +#define USDHC1_CMD_IOMUX (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | \ + IOMUX_PULL_UP_47K | IOMUX_SCHMITT_TRIGGER) +#define USDHC1_CLK_IOMUX (IOMUX_SLEW_FAST | IOMUX_DRIVE_130OHM | IOMUX_SPEED_MAX) +#define USDHC1_CD_IOMUX (0) + +#define PIN_USDHC1_D0 (GPIO_USDHC1_DATA0 | USDHC1_DATAX_IOMUX) +#define PIN_USDHC1_D1 (GPIO_USDHC1_DATA1 | USDHC1_DATAX_IOMUX) +#define PIN_USDHC1_D2 (GPIO_USDHC1_DATA2 | USDHC1_DATAX_IOMUX) +#define PIN_USDHC1_D3 (GPIO_USDHC1_DATA3 | USDHC1_DATAX_IOMUX) +#define PIN_USDHC1_DCLK (GPIO_USDHC1_CLK | USDHC1_CLK_IOMUX) +#define PIN_USDHC1_CMD (GPIO_USDHC1_CMD | USDHC1_CMD_IOMUX) +#define PIN_USDHC1_CD (GPIO_USDHC1_CD_2 | USDHC1_CD_IOMUX) + +/* Ideal 400Khz for initial inquiry. + * Given input clock 198 Mhz. + * 386.71875 KHz = 198 Mhz / (256 * 2) + */ + +#define BOARD_USDHC_IDMODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV256 +#define BOARD_USDHC_IDMODE_DIVISOR USDHC_SYSCTL_DVS_DIV(2) + +/* Ideal 25 Mhz for other modes + * Given input clock 198 Mhz. + * 24.75 MHz = 198 Mhz / (8 * 1) + */ + +#define BOARD_USDHC_MMCMODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8 +#define BOARD_USDHC_MMCMODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1) + +#define BOARD_USDHC_SD1MODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8 +#define BOARD_USDHC_SD1MODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1) + +#define BOARD_USDHC_SD4MODE_PRESCALER USDHC_SYSCTL_SDCLKFS_DIV8 +#define BOARD_USDHC_SD4MODE_DIVISOR USDHC_SYSCTL_DVS_DIV(1) + +/* LED definitions ******************************************************************/ +/* The nxp fmutr1062 board has numerous LEDs but only three, LED_GREEN a Green LED, + * LED_BLUE a Blue LED and LED_RED a Red LED, that can be controlled by software. + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. + * The following definitions are used to access individual LEDs. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_NLEDS 3 + +#define BOARD_LED_RED BOARD_LED1 +#define BOARD_LED_GREEN BOARD_LED2 +#define BOARD_LED_BLUE BOARD_LED3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) + +/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in + * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related + * events as follows: + * + * + * SYMBOL Meaning LED state + * Red Green Blue + * ---------------------- -------------------------- ------ ------ ----*/ + +#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */ +#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */ +#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */ +#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */ +#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */ +#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */ + +/* Thus if the Green LED is statically on, NuttX has successfully booted and + * is, apparently, running normally. If the Red LED is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. + */ + +/* PIO Disambiguation ***************************************************************/ +/* LPUARTs + */ + +/* GPS 1 */ + +#define GPIO_LPUART2_RX GPIO_LPUART2_RX_1 /* EVK J22-8 */ /* GPIO_AD_B1_03 */ +#define GPIO_LPUART2_TX GPIO_LPUART2_TX_1 /* EVK J22-7 */ /* GPIO_AD_B1_02 */ + +/* Telem 2 */ +#define HS_INPUT_IOMUX (IOMUX_CMOS_INPUT | IOMUX_SLEW_SLOW | IOMUX_DRIVE_HIZ | IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_47K) +#define HS_OUTPUT_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_SLEW_FAST | IOMUX_DRIVE_33OHM | IOMUX_SPEED_MEDIUM | IOMUX_PULL_KEEP) + +#if defined(ON_EVK) +#define GPIO_LPUART3_RX GPIO_LPUART3_RX_1 /* GPIO_AD_B1_07 EVK J22-1 */ +#define GPIO_LPUART3_TX GPIO_LPUART3_TX_1 /* GPIO_AD_B1_06 EVK J22-2 */ +#else +#define GPIO_LPUART3_RX GPIO_LPUART3_RX_3 /* GPIO_B0_09 */ +#define GPIO_LPUART3_TX GPIO_LPUART3_TX_3 /* GPIO_B0_08 */ +#define GPIO_LPUART3_CTS /* GPIO_AD_B0_08 GPIO1 Pin 8 (GPIO only, no HW Flow control) */ (GPIO_PORT1 | GPIO_PIN8 | GPIO_INPUT | HS_INPUT_IOMUX) +#define GPIO_LPUART3_RTS /* GPIO_EMC_24 GPIO4 Pin 24 (GPIO only, no HW Flow control) */ (GPIO_PORT4 | GPIO_PIN14 | GPIO_OUTPUT | HS_OUTPUT_IOMUX) +#endif + +/* Telem 1 */ + +#define GPIO_LPUART4_RX GPIO_LPUART4_RX_1 /* GPIO_EMC_20 */ +#define GPIO_LPUART4_TX GPIO_LPUART4_TX_1 /* GPIO_EMC_19 */ +/* GPIO_LPUART4_CTS GPIO_EMC_17 No Alternate */ +/* GPIO_LPUART4_RTS GPIO_EMC_18 No Alternate */ + +/* GPS2 */ + +#define GPIO_LPUART5_RX GPIO_LPUART5_RX_1 /* GPIO_B1_13 */ +#define GPIO_LPUART5_TX GPIO_LPUART5_TX_1 /* GPIO_B1_12 */ + +/* RC INPUT single wire mode on TX, RX is not used */ + +#define GPIO_LPUART6_RX GPIO_LPUART6_RX_1 /* GPIO_EMC_26 */ +#define GPIO_LPUART6_TX GPIO_LPUART6_TX_1 /* GPIO_EMC_25 */ + +#define GPIO_LPUART7_RX GPIO_LPUART7_RX_1 /* GPIO_EMC_32 */ +#define GPIO_LPUART7_TX GPIO_LPUART7_TX_1 /* GPIO_EMC_31 */ + +#define GPIO_LPUART8_RX GPIO_LPUART3_RX_1 /* GPIO_EMC_39 */ +#define GPIO_LPUART8_TX GPIO_LPUART3_TX_1 /* GPIO_EMC_38 */ + +/* CAN + * + * CAN1 is routed to transceiver. + * CAN2 is routed to transceiver. + * CAN3 is routed to transceiver. + */ +#define GPIO_FLEXCAN1_RX GPIO_FLEXCAN1_RX_2 /* GPIO_B0_03 */ +#define GPIO_FLEXCAN1_TX GPIO_FLEXCAN1_TX_2 /* GPIO_B0_02 */ +#define GPIO_FLEXCAN2_RX GPIO_FLEXCAN2_RX_1 /* GPIO_AD_B0_03 */ +#define GPIO_FLEXCAN2_TX GPIO_FLEXCAN2_TX_1 /* GPIO_AD_B0_02 */ +#define GPIO_FLEXCAN3_RX GPIO_FLEXCAN3_RX_1 /* GPIO_AD_B0_11 */ +#define GPIO_FLEXCAN3_TX GPIO_FLEXCAN3_TX_3 /* GPIO_EMC_36 */ + +/* LPSPI */ + +#define GPIO_LPSPI1_SCK GPIO_LPSPI1_SCK_1 /* GPIO_EMC_27 */ +#define GPIO_LPSPI1_MISO GPIO_LPSPI1_SDI_1 /* GPIO_EMC_29 */ +#define GPIO_LPSPI1_MOSI GPIO_LPSPI1_SDO_1 /* GPIO_EMC_28 */ + +#if defined(ON_EVK) +#define GPIO_LPSPI2_SCK GPIO_LPSPI2_SCK_2 /* EVK J24-6 POP R280 GPIO_SD_B0_00 */ +#define GPIO_LPSPI2_MISO GPIO_LPSPI1_SDI_2 /* EVK J24-5 POP R278 GPIO_SD_B0_03 */ +#define GPIO_LPSPI2_MOSI GPIO_LPSPI1_SDO_2 /* EVK J24-4 POP R279 GPIO_SD_B0_02 */ +#else +#define GPIO_LPSPI2_SCK GPIO_LPSPI2_SCK_1 /* GPIO_EMC_00 */ +#define GPIO_LPSPI2_MISO GPIO_LPSPI2_SDI_1 /* GPIO_EMC_03 */ +#define GPIO_LPSPI2_MOSI GPIO_LPSPI2_SDO_1 /* GPIO_EMC_02 */ +#endif + +#define GPIO_LPSPI3_SCK GPIO_LPSPI3_SCK_1 /* GPIO_AD_B1_15 */ +#define GPIO_LPSPI3_MISO GPIO_LPSPI3_SDI_1 /* GPIO_AD_B1_13 */ +#define GPIO_LPSPI3_MOSI GPIO_LPSPI3_SDO_1 /* GPIO_AD_B1_14 */ + +#define GPIO_LPSPI4_SCK GPIO_LPSPI4_SCK_1 /* GPIO_B1_07 */ +#define GPIO_LPSPI4_MISO GPIO_LPSPI4_SDI_1 /* GPIO_B1_05 */ +#define GPIO_LPSPI4_MOSI GPIO_LPSPI4_SDO_1 /* GPIO_B1_06 */ + +/* LPI2Cs */ + +#define LPI2C_IOMUX (GPIO_OUTPUT | IOMUX_SPEED_MAX | IOMUX_SLEW_FAST | IOMUX_DRIVE_33OHM | IOMUX_OPENDRAIN | IOMUX_PULL_NONE) + +#define GPIO_LPI2C1_SDA GPIO_LPI2C1_SDA_2 /* EVK J24-9 R276 */ /* GPIO_AD_B1_01 */ +#define GPIO_LPI2C1_SCL GPIO_LPI2C1_SCL_2 /* EVK J24-10 R277 */ /* GPIO_AD_B1_00 */ + +#define GPIO_LPI2C1_SDA_GPIO (GPIO_PORT1 | GPIO_PIN17 | LPI2C_IOMUX) +#define GPIO_LPI2C1_SCL_GPIO (GPIO_PORT1 | GPIO_PIN16 | LPI2C_IOMUX) + +#define GPIO_LPI2C2_SDA GPIO_LPI2C2_SDA_1 /* EVK J8-A25 */ /* GPIO_B0_05 */ +#define GPIO_LPI2C2_SCL GPIO_LPI2C2_SCL_1 /* EVK J8-A24 */ /* GPIO_B0_04 */ + +#define GPIO_LPI2C2_SDA_GPIO (GPIO_PORT2 | GPIO_PIN5 | LPI2C_IOMUX) +#define GPIO_LPI2C2_SCL_GPIO (GPIO_PORT2 | GPIO_PIN4 | LPI2C_IOMUX) + +#define GPIO_LPI2C3_SDA GPIO_LPI2C3_SDA_2 /* GPIO_EMC_21 */ +#define GPIO_LPI2C3_SCL GPIO_LPI2C3_SCL_2 /* GPIO_EMC_22 */ + +#define GPIO_LPI2C3_SDA_GPIO (GPIO_PORT4 | GPIO_PIN21 | LPI2C_IOMUX) +#define GPIO_LPI2C3_SCL_GPIO (GPIO_PORT4 | GPIO_PIN22 | LPI2C_IOMUX) + +/* Board provides GPIO or other Hardware for signaling to timing analyzer */ + +#if defined(CONFIG_BOARD_USE_PROBES) +#define PROBE_IOMUX (GPIO_OUTPUT | IOMUX_SPEED_MAX | IOMUX_SLEW_FAST | IOMUX_DRIVE_33OHM | IOMUX_CMOS_OUTPUT | IOMUX_PULL_NONE) +# define PROBE_N(n) (1<<((n)-1)) +# define PROBE_1 (GPIO_PORT2 | GPIO_PIN6 | PROBE_IOMUX) +# define PROBE_2 (GPIO_PORT4 | GPIO_PIN8 | PROBE_IOMUX) +# define PROBE_3 (GPIO_PORT4 | GPIO_PIN10 | PROBE_IOMUX) +# define PROBE_4 (GPIO_PORT1 | GPIO_PIN9 | PROBE_IOMUX) +# define PROBE_5 (GPIO_PORT3 | GPIO_PIN19 | PROBE_IOMUX) +# define PROBE_6 (GPIO_PORT4 | GPIO_PIN30 | PROBE_IOMUX) +# define PROBE_7 (GPIO_PORT4 | GPIO_PIN4 | PROBE_IOMUX) +# define PROBE_8 (GPIO_PORT4 | GPIO_PIN1 | PROBE_IOMUX) + +# define PROBE_INIT(mask) \ + do { \ + if ((mask)& PROBE_N(1)) { imxrt_config_gpio(PROBE_1); } \ + if ((mask)& PROBE_N(2)) { imxrt_config_gpio(PROBE_2); } \ + if ((mask)& PROBE_N(3)) { imxrt_config_gpio(PROBE_3); } \ + if ((mask)& PROBE_N(4)) { imxrt_config_gpio(PROBE_4); } \ + if ((mask)& PROBE_N(5)) { imxrt_config_gpio(PROBE_5); } \ + if ((mask)& PROBE_N(6)) { imxrt_config_gpio(PROBE_6); } \ + if ((mask)& PROBE_N(7)) { imxrt_config_gpio(PROBE_7); } \ + if ((mask)& PROBE_N(8)) { imxrt_config_gpio(PROBE_8); } \ + } while(0) + +# define PROBE(n,s) do {stm32_gpiowrite(PROBE_##n,(s));}while(0) +# define PROBE_MARK(n) PROBE(n,false);PROBE(n,true) +#else +# define PROBE_INIT(mask) +# define PROBE(n,s) +# define PROBE_MARK(n) +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __NUTTX_CONFIG_NXP_FMURT1062_V1_INCLUDE_BOARD_H */ diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig new file mode 100644 index 000000000000..01f4e6fdebb1 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig @@ -0,0 +1,1498 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_MACOS is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_LOADABLE is not set +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set +# CONFIG_DFU_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_MISOC is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_RISCV is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_XTENSA is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +# CONFIG_ARCH_OR1K is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_AM335X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +CONFIG_ARCH_CHIP_IMXRT=y +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LC823450 is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_LPC54XX is not set +# CONFIG_ARCH_CHIP_MAX326XX is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_CHIP_NRF52 is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD2X is not set +# CONFIG_ARCH_CHIP_SAML2X is not set +# CONFIG_ARCH_CHIP_SAMD5X is not set +# CONFIG_ARCH_CHIP_SAME5X is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F0 is not set +# CONFIG_ARCH_CHIP_STM32L0 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32H7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_XMC4 is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM1136J is not set +# CONFIG_ARCH_ARM1156T2 is not set +# CONFIG_ARCH_ARM1176JZ is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM23 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM33 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEXR5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_HAVE_LAZYFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +CONFIG_ARCH_HAVE_HARDFAULT_DEBUG=y +CONFIG_DEBUG_HARDFAULT_ALERT=y +CONFIG_ARCH_HAVE_MEMFAULT_DEBUG=y +# CONFIG_ARM_SEMIHOSTING_SYSLOG is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARMV7M_BASEPRI_WAR=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_TOOLCHAIN_CLANGL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# i.MX RT Configuration Options +# +# CONFIG_ARCH_CHIP_MIMXRT1051DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1051CVL5A is not set +# CONFIG_ARCH_CHIP_MIMXRT1052DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1052CVL5A is not set +# CONFIG_ARCH_CHIP_MIMXRT1061DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1061CVL5A is not set +CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y +# CONFIG_ARCH_CHIP_MIMXRT1062CVL5A is not set +# CONFIG_ARCH_FAMILY_MXRT105xDVL6A is not set +# CONFIG_ARCH_FAMILY_MIMXRT1052CVL5A is not set +# CONFIG_ARCH_FAMILY_IMXRT105x is not set +CONFIG_ARCH_FAMILY_MXRT106xDVL6A=y +# CONFIG_ARCH_FAMILY_MIMXRT1062CVL5A is not set +CONFIG_ARCH_FAMILY_IMXRT106x=y +CONFIG_IMXRT_HAVE_LPUART=y +CONFIG_IMXRT_LPI2C=y +CONFIG_IMXRT_LPSPI=y +CONFIG_IMXRT_HIGHSPEED_GPIO=y + +# +# i.MX RT Peripheral Selection +# +# CONFIG_IMXRT_EDMA is not set +# CONFIG_IMXRT_ENET is not set + +# +# FlexIO Peripherals +# + +# +# LPUART Peripherals +# +# CONFIG_IMXRT_LPUART1 is not set +CONFIG_IMXRT_LPUART2=y +CONFIG_IMXRT_LPUART3=y +CONFIG_IMXRT_LPUART4=y +CONFIG_IMXRT_LPUART5=y +CONFIG_IMXRT_LPUART6=y +CONFIG_IMXRT_LPUART7=y +CONFIG_IMXRT_LPUART8=y + +# +# LPI2C Peripherals +# +CONFIG_IMXRT_LPI2C1=y +CONFIG_LPI2C1_BUSYIDLE=0 +CONFIG_LPI2C1_FILTSCL=0 +CONFIG_LPI2C1_FILTSDA=0 +CONFIG_IMXRT_LPI2C2=y +CONFIG_LPI2C2_BUSYIDLE=0 +CONFIG_LPI2C2_FILTSCL=0 +CONFIG_LPI2C2_FILTSDA=0 +CONFIG_IMXRT_LPI2C3=y +CONFIG_LPI2C3_BUSYIDLE=0 +CONFIG_LPI2C3_FILTSCL=0 +CONFIG_LPI2C3_FILTSDA=0 +# CONFIG_IMXRT_LPI2C4 is not set + +# +# LPSPI Peripherals +# +CONFIG_IMXRT_LPSPI1=y +CONFIG_IMXRT_LPSPI2=y +CONFIG_IMXRT_LPSPI3=y +CONFIG_IMXRT_LPSPI4=y +# CONFIG_IMXRT_SEMC is not set +CONFIG_IMXRT_SNVS_LPSRTC=y +CONFIG_IMXRT_SNVS_HPRTC=y +CONFIG_IMXRT_USDHC=y +# CONFIG_IMXRT_GPIO_IRQ is not set + +# +# Memory Configuration +# +CONFIG_IMXRT_BOOT_OCRAM=y +CONFIG_IMXRT_OCRAM_PRIMARY=y + +# +# i.MX RT Heap Configuration +# + +# +# USDHC Configuration +# +CONFIG_IMXRT_USDHC_DMA=y +# CONFIG_IMXRT_USDHC_WIDTH_D1_ONLY is not set + +# +# RTC Configuration +# +CONFIG_IMXRT_RTC_MAGIC_REG=1 +CONFIG_IMXRT_RTC_MAGIC=0xfacefeed +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y +# CONFIG_ARCH_GNU_NO_WEAKFUNCTIONS is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_HAVE_IRQTRIGGER=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_PROGMEM is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_HAVE_FETCHADD=y +# CONFIG_ARCH_HAVE_RTC_SUBSECONDS is not set +# CONFIG_ARCH_HAVE_GARBAGE is not set +# CONFIG_ARCH_GLOBAL_IRQDISABLE is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set +# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=104926 + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=750 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20200000 +CONFIG_RAM_SIZE=1048576 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_IMXRT1060_EVK is not set +CONFIG_ARCH_BOARD_CUSTOM=y + +# +# Custom Board Configuration +# +CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" +CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" +CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y +CONFIG_BOARD_CUSTOM_LEDS=y +# CONFIG_BOARD_CUSTOM_BUTTONS is not set + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_NXP_FMURT1062_V3_HYPER_FLASH is not set +CONFIG_NXP_FMURT1062_V3_QSPI_FLASH=y +CONFIG_BOARD_CRASHDUMP=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_FINALINIT is not set +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_RESET_ON_ASSERT=2 +CONFIG_BOARD_ASSERT_RESET_VALUE=0 +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_CLOCK_MONOTONIC=y +# CONFIG_ARCH_HAVE_TIMEKEEPING is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2018 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=50 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=50 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_IRQCHAIN is not set +# CONFIG_IRQCOUNT is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_PRIORITY=100 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=24 +CONFIG_MAX_TASKS=32 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +CONFIG_NPTHREAD_KEYS=4 +# CONFIG_PTHREAD_MUTEX_TYPES is not set +CONFIG_PTHREAD_MUTEX_ROBUST=y +# CONFIG_PTHREAD_MUTEX_UNSAFE is not set +# CONFIG_PTHREAD_MUTEX_BOTH is not set +# CONFIG_PTHREAD_CLEANUP is not set +# CONFIG_CANCELLATION_POINTS is not set + +# +# Performance Monitoring +# +CONFIG_SCHED_SUSPENDSCHEDULER=y +CONFIG_SCHED_RESUMESCHEDULER=y +# CONFIG_SCHED_IRQMONITOR is not set +# CONFIG_SCHED_CRITMONITOR is not set +# CONFIG_SCHED_CPULOAD is not set +CONFIG_SCHED_INSTRUMENTATION=y +# CONFIG_SCHED_INSTRUMENTATION_PREEMPTION is not set +# CONFIG_SCHED_INSTRUMENTATION_CSECTION is not set +# CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS is not set +# CONFIG_SCHED_INSTRUMENTATION_BUFFER is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +CONFIG_FDCLONE_STDIO=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=54 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=0 +CONFIG_SEM_NNESTPRIO=8 + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +CONFIG_SCHED_ATEXIT=y +CONFIG_SCHED_ATEXIT_MAX=1 +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Configuration +# +# CONFIG_SIG_EVTHREAD is not set +CONFIG_SIG_DEFAULT=y + +# +# Per-signal Default Actions +# +CONFIG_SIG_SIGUSR1_ACTION=y +CONFIG_SIG_SIGUSR2_ACTION=y +CONFIG_SIG_SIGALRM_ACTION=y +CONFIG_SIG_SIGSTOP_ACTION=y +CONFIG_SIG_SIGKILL_ACTION=y + +# +# Signal Numbers +# + +# +# Standard Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALRM=3 +CONFIG_SIG_STOP=6 +CONFIG_SIG_STP=7 +CONFIG_SIG_CONT=8 +CONFIG_SIG_KILL=9 +CONFIG_SIG_INT=10 + +# +# Non-standard Signal Numbers +# +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=4 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPNTHREADS=1 +CONFIG_SCHED_HPWORKPRIORITY=249 +CONFIG_SCHED_HPWORKSTACKSIZE=1800 +# CONFIG_WQUEUE_NOTIFIER is not set +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPNTHREADS=1 +CONFIG_SCHED_LPWORKPRIORITY=50 +CONFIG_SCHED_LPWORKPRIOMAX=176 +CONFIG_SCHED_LPWORKSTACKSIZE=1800 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=750 +CONFIG_USERMAIN_STACKSIZE=2500 +CONFIG_PTHREAD_STACK_MIN=512 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set + +# +# I2C Multiplexer Support +# +# CONFIG_I2CMULTIPLEXER_PCA9540BDP is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y +# CONFIG_ARCH_HAVE_SPI_BITORDER is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CS_CONTROL is not set +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_SPI_TRIGGER is not set +# CONFIG_SPI_DRIVER is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_DRIVERS_AUDIO is not set +# CONFIG_FB_CMAP is not set +# CONFIG_FB_TRANSPARENCY is not set +# CONFIG_DRIVERS_VIDEO is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_LEDS_APA102 is not set +# CONFIG_LEDS_MAX7219 is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_ARCH_HAVE_SDIO_PREFLIGHT is not set +# CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +# CONFIG_MMCSD_HAVE_CARDDETECT is not set +# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set +# CONFIG_MMCSD_SPI is not set +CONFIG_SDIO_DMA=y +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_SDIO_WIDTH_D1_ONLY is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_PARTITION_NAMES is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_IS25XP is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_MX25L is not set +# CONFIG_MTD_MX35 is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set +# CONFIG_MTD_MX25RXX is not set +# CONFIG_MTD_SMART is not set +CONFIG_MTD_RAMTRON=y +CONFIG_RAMTRON_WRITEWAIT=y +CONFIG_RAMTRON_SETSPEED=y +# CONFIG_RAMTRON_CHUNKING is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_MTD_GD25 is not set +# CONFIG_EEPROM is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=70 +CONFIG_DEV_FIFO_SIZE=0 +# CONFIG_PM is not set +# CONFIG_DRIVERS_POWERLED is not set +# CONFIG_DRIVERS_SMPS is not set +# CONFIG_DRIVERS_MOTOR is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +CONFIG_SERIAL_IFLOWCONTROL=y +CONFIG_SERIAL_OFLOWCONTROL=y +# CONFIG_SERIAL_DMA is not set +CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y +CONFIG_SERIAL_IFLOWCONTROL_LOWER_WATERMARK=10 +CONFIG_SERIAL_IFLOWCONTROL_UPPER_WATERMARK=90 +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_SERIAL_TERMIOS=y +# CONFIG_TTY_SIGINT is not set +# CONFIG_TTY_SIGSTP is not set +# CONFIG_LPUART2_SERIAL_CONSOLE is not set +# CONFIG_LPUART3_SERIAL_CONSOLE is not set +# CONFIG_LPUART4_SERIAL_CONSOLE is not set +# CONFIG_LPUART5_SERIAL_CONSOLE is not set +# CONFIG_LPUART6_SERIAL_CONSOLE is not set +CONFIG_LPUART7_SERIAL_CONSOLE=y +# CONFIG_LPUART8_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_LPUART_SERIALDRIVER is not set +# CONFIG_LPUART0_SERIALDRIVER is not set +# CONFIG_LPUART1_SERIALDRIVER is not set +CONFIG_LPUART2_SERIALDRIVER=y +CONFIG_LPUART3_SERIALDRIVER=y +CONFIG_LPUART4_SERIALDRIVER=y +CONFIG_LPUART5_SERIALDRIVER=y +CONFIG_LPUART6_SERIALDRIVER=y +CONFIG_LPUART7_SERIALDRIVER=y +CONFIG_LPUART8_SERIALDRIVER=y + +# +# LPUART2 Configuration +# +CONFIG_LPUART2_RXBUFSIZE=600 +CONFIG_LPUART2_TXBUFSIZE=1500 +CONFIG_LPUART2_BAUD=57600 +CONFIG_LPUART2_BITS=8 +CONFIG_LPUART2_PARITY=0 +CONFIG_LPUART2_2STOP=0 +# CONFIG_LPUART2_IFLOWCONTROL is not set +# CONFIG_LPUART2_OFLOWCONTROL is not set +CONFIG_LPUART2_DMA=y + +# +# LPUART3 Configuration +# +CONFIG_LPUART3_RXBUFSIZE=600 +CONFIG_LPUART3_TXBUFSIZE=3000 +CONFIG_LPUART3_BAUD=57600 +CONFIG_LPUART3_BITS=8 +CONFIG_LPUART3_PARITY=0 +CONFIG_LPUART3_2STOP=0 +CONFIG_LPUART3_IFLOWCONTROL=y +CONFIG_LPUART3_OFLOWCONTROL=y +CONFIG_LPUART3_DMA=y + +# +# LPUART4 Configuration +# +CONFIG_LPUART4_RXBUFSIZE=600 +CONFIG_LPUART4_TXBUFSIZE=1500 +CONFIG_LPUART4_BAUD=57600 +CONFIG_LPUART4_BITS=8 +CONFIG_LPUART4_PARITY=0 +CONFIG_LPUART4_2STOP=0 +CONFIG_LPUART4_IFLOWCONTROL=y +CONFIG_LPUART4_OFLOWCONTROL=y +CONFIG_LPUART4_DMA=y + +# +# LPUART5 Configuration +# +CONFIG_LPUART5_RXBUFSIZE=600 +CONFIG_LPUART5_TXBUFSIZE=1500 +CONFIG_LPUART5_BAUD=57600 +CONFIG_LPUART5_BITS=8 +CONFIG_LPUART5_PARITY=0 +CONFIG_LPUART5_2STOP=0 +# CONFIG_LPUART5_IFLOWCONTROL is not set +# CONFIG_LPUART5_OFLOWCONTROL is not set +# CONFIG_LPUART5_DMA is not set + +# +# LPUART6 Configuration +# +CONFIG_LPUART6_RXBUFSIZE=600 +CONFIG_LPUART6_TXBUFSIZE=1500 +CONFIG_LPUART6_BAUD=57600 +CONFIG_LPUART6_BITS=8 +CONFIG_LPUART6_PARITY=0 +CONFIG_LPUART6_2STOP=0 +# CONFIG_LPUART6_IFLOWCONTROL is not set +# CONFIG_LPUART6_OFLOWCONTROL is not set +CONFIG_LPUART6_DMA=y + +# +# LPUART7 Configuration +# +CONFIG_LPUART7_RXBUFSIZE=120 +CONFIG_LPUART7_TXBUFSIZE=1500 +CONFIG_LPUART7_BAUD=57600 +CONFIG_LPUART7_BITS=8 +CONFIG_LPUART7_PARITY=0 +CONFIG_LPUART7_2STOP=0 +# CONFIG_LPUART7_IFLOWCONTROL is not set +# CONFIG_LPUART7_OFLOWCONTROL is not set +CONFIG_LPUART7_DMA=y + +# +# LPUART8 Configuration +# +CONFIG_LPUART8_RXBUFSIZE=600 +CONFIG_LPUART8_TXBUFSIZE=1500 +CONFIG_LPUART8_BAUD=57600 +CONFIG_LPUART8_BITS=8 +CONFIG_LPUART8_PARITY=0 +CONFIG_LPUART8_2STOP=0 +# CONFIG_LPUART8_IFLOWCONTROL is not set +# CONFIG_LPUART8_OFLOWCONTROL is not set +CONFIG_LPUART8_DMA=y +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_USART9_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_PSEUDOTERM is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +# CONFIG_USBDEV_SELFPOWERED is not set +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +# CONFIG_CDCACM_IFLOWCONTROL is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=600 +CONFIG_CDCACM_TXBUFSIZE=12000 +CONFIG_CDCACM_VENDORID=0x1FC9 +CONFIG_CDCACM_PRODUCTID=0x001d +CONFIG_CDCACM_VENDORSTR="NXP SEMICONDUCTORS" +CONFIG_CDCACM_PRODUCTSTR="PX4 FMURT1062 v1.x" +# CONFIG_USBMSC is not set +# CONFIG_RNDIS is not set +# CONFIG_DFU is not set +# CONFIG_NET_CDCECM is not set +# CONFIG_USBHOST is not set +# CONFIG_USBMISC is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set +# CONFIG_DRIVERS_CONTACTLESS is not set +# CONFIG_1WIRE is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +CONFIG_SYSLOG_WRITE=y +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_BUFFER is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_PREFIX is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET_WRITE_BUFFERS is not set +# CONFIG_NET_READAHEAD is not set +# CONFIG_NET_MCASTGROUP is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_PSEUDOFS_SOFTLINKS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_AIO is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set + +# +# Partition Table +# +# CONFIG_PTABLE_PARTITION is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FAT_LFN_ALIAS_HASH=y +CONFIG_FAT_LFN_ALIAS_TRAILCHARS=0 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +CONFIG_FAT_DMAMEMORY=y +CONFIG_FAT_DIRECT_RETRY=y +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +CONFIG_FS_CROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +CONFIG_FS_PROCFS_EXCLUDE_ENVIRON=y +CONFIG_FS_PROCFS_EXCLUDE_BLOCKS=y +CONFIG_FS_PROCFS_EXCLUDE_MOUNT=y +CONFIG_FS_PROCFS_EXCLUDE_USAGE=y +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +CONFIG_FS_PROCFS_EXCLUDE_VERSION=y +# CONFIG_FS_PROCFS_EXCLUDE_MEMINFO is not set +CONFIG_FS_PROCFS_EXCLUDE_MOUNTS=y +# CONFIG_FS_SPIFFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set +# CONFIG_NXFONTS is not set + +# +# Font Cache Pixel Depths +# +CONFIG_NXFONTS_DISABLE_1BPP=y +CONFIG_NXFONTS_DISABLE_2BPP=y +CONFIG_NXFONTS_DISABLE_4BPP=y +CONFIG_NXFONTS_DISABLE_8BPP=y +CONFIG_NXFONTS_DISABLE_16BPP=y +CONFIG_NXFONTS_DISABLE_24BPP=y +CONFIG_NXFONTS_DISABLE_32BPP=y +CONFIG_NXFONTS_PACKEDMSFIRST=y +# CONFIG_NXGLIB is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +CONFIG_GRAN=y +CONFIG_GRAN_INTR=y +# CONFIG_MM_FILL_ALLOCATIONS is not set + +# +# Common I/O Buffer Support +# +# CONFIG_MM_IOB is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_LOADABLE is not set +# CONFIG_PIC is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# + +# +# Standard C I/O +# +# CONFIG_STDIO_DISABLE_BUFFERING is not set +CONFIG_STDIO_BUFFER_SIZE=32 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_SCANSET is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y + +# +# Architecture-Specific Support +# +CONFIG_ARCH_LOWPUTC=y +# CONFIG_ARCH_ROMGETC is not set +CONFIG_LIBC_ARCH_MEMCPY=y +# CONFIG_LIBC_ARCH_MEMCMP is not set +# CONFIG_LIBC_ARCH_MEMMOVE is not set +# CONFIG_LIBC_ARCH_MEMSET is not set +# CONFIG_LIBC_ARCH_STRCHR is not set +# CONFIG_LIBC_ARCH_STRCMP is not set +# CONFIG_LIBC_ARCH_STRCPY is not set +# CONFIG_LIBC_ARCH_STRNCPY is not set +# CONFIG_LIBC_ARCH_STRLEN is not set +# CONFIG_LIBC_ARCH_STRNLEN is not set +# CONFIG_LIBC_ARCH_ELF is not set +CONFIG_ARMV7M_MEMCPY=y + +# +# stdlib Options +# +CONFIG_LIB_RAND_ORDER=1 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 + +# +# Program Execution Options +# +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 + +# +# errno Decode Support +# +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +# CONFIG_LIBC_PERROR_STDOUT is not set + +# +# memcpy/memset Options +# +CONFIG_MEMSET_OPTSPEED=y +CONFIG_MEMSET_64BIT=y +# CONFIG_LIBC_DLLFCN is not set +# CONFIG_LIBC_MODLIB is not set +# CONFIG_LIBC_WCHAR is not set +# CONFIG_LIBC_LOCALE is not set +CONFIG_LIBC_LZF=y +CONFIG_LIBC_LZF_SMALL=y +# CONFIG_LIBC_LZF_FAST is not set +# CONFIG_LIBC_LZF_FASTEST is not set +CONFIG_LIBC_LZF_HLOG=13 +CONFIG_LIBC_LZF_ALIGN=y + +# +# Time/Time Zone Support +# +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_TIME_EXTENDED=y +CONFIG_ARCH_HAVE_TLS=y + +# +# Thread Local Storage (TLS) +# +# CONFIG_TLS is not set + +# +# Network-Related Options +# +# CONFIG_LIBC_IPv4_ADDRCONV is not set +# CONFIG_LIBC_IPv6_ADDRCONV is not set +# CONFIG_LIBC_NETDB is not set + +# +# NETDB Support +# +# CONFIG_LIBC_GAISTRERROR is not set +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_ENVPATH is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +# CONFIG_CXX_NEWLONG is not set + +# +# LLVM C++ Library (libcxx) +# +# CONFIG_LIBCXX is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set +# CONFIG_LIBDSP is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_ADXL372_TEST is not set +# CONFIG_EXAMPLES_APA102 is not set +# CONFIG_EXAMPLES_BATTERY is not set +# CONFIG_EXAMPLES_CALIB_UDELAY is not set +# CONFIG_EXAMPLES_CCTYPE is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CROMFS is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DHTXX is not set +# CONFIG_EXAMPLES_DSPTEST is not set +# CONFIG_EXAMPLES_FLOWC is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_GPS is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_INA219 is not set +# CONFIG_EXAMPLES_INA226 is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_LSM330SPI_TEST is not set +# CONFIG_EXAMPLES_LVGLDEMO is not set +# CONFIG_EXAMPLES_MAX31855 is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MLX90614 is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXDEMO is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_OBD2 is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PDCURSES is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_POWERLED is not set +# CONFIG_EXAMPLES_POWERMONITOR is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMPS is not set +# CONFIG_EXAMPLES_STAT is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USERFS is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_XBC_TEST is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_MKFATFS=y +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_GRAPHICS_FT80X is not set +# CONFIG_GRAPHICS_LVGL is not set + +# +# NxWidgets/NxWM +# + +# +# NxWidgets +# + +# +# NxWM +# + +# +# Unit Tests +# +# CONFIG_GRAPHICS_PDCURSES is not set +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_PROMPT_STRING="nsh> " +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=128 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_QUOTE=y +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=12 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=8 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +# CONFIG_NSH_DISABLE_DATE is not set +CONFIG_NSH_DISABLE_DD=y +# CONFIG_NSH_DISABLE_DF is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_ENV is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_EXPORT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +CONFIG_NSH_DISABLE_MB=y +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKRD=y +CONFIG_NSH_DISABLE_MH=y +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PRINTF=y +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PSSTACKUSAGE=y +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_REBOOT=y +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +CONFIG_NSH_DISABLE_SHUTDOWN=y +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_TELNETD=y +CONFIG_NSH_DISABLE_TRUNCATE=y +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Configure Command Options +# +CONFIG_NSH_VARS=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +CONFIG_NSH_CROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=128 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=1 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set +CONFIG_HAVE_CXXINITIALIZE=y + +# +# System Libraries and NSH Add-Ons +# +CONFIG_SYSTEM_CDCACM=y +CONFIG_SYSTEM_CDCACM_DEVMINOR=0 +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_EMBEDLOG is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_LZF is not set +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NSH_PRIORITY=100 +CONFIG_SYSTEM_NSH_STACKSIZE=2048 +# CONFIG_SYSTEM_NSH_CXXINITIALIZE is not set +# CONFIG_SYSTEM_POPEN is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SETLOGMASK is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_SYSTEM is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_TERMCURSES is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set + +# +# Testing +# +# CONFIG_TESTING_OSTEST is not set +# CONFIG_TESTING_UNITY is not set + +# +# Wireless Libraries and NSH Add-Ons +# + +# +# Bluetooth applications +# +# CONFIG_BTSAK is not set + +# +# IEEE 802.15.4 applications +# +# CONFIG_IEEE802154_LIBMAC is not set +# CONFIG_IEEE802154_LIBUTILS is not set +# CONFIG_IEEE802154_I8SAK is not set diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/scripts/ld.script b/boards/nxp/fmurt1062-v1/nuttx-config/scripts/ld.script new file mode 100644 index 000000000000..613e943e98b3 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/nuttx-config/scripts/ld.script @@ -0,0 +1,178 @@ +/**************************************************************************** + * configs/nxp_fmurt1062-v1/scripts/flash.ld + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The FMURT1062 has 8MiB of QSPI FLASH beginning at address, + * 0x0060:0000, Upto 512Kb of DTCM RAM beginning at 0x2000:0000, and 1MiB OCRAM + * beginning at 0x2020:0000. Neither DTCM or SDRAM are used in this + * configuratin. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x60000000, LENGTH = 8M + sram (rwx) : ORIGIN = 0x20200000, LENGTH = 512M + itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 128K + dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +EXTERN(flash_config) +EXTERN(image_vector_table) +EXTERN(boot_data) + +ENTRY(_stext) + +SECTIONS +{ + /* Image Vector Table and Boot Data for booting from external flash */ + + .boot_hdr : ALIGN(4) + { + FILL(0xff) + __boot_hdr_start__ = ABSOLUTE(.) ; + KEEP(*(.boot_hdr.conf)) + . = 0x1000 ; + KEEP(*(.boot_hdr.ivt)) + . = 0x1020 ; + KEEP(*(.boot_hdr.boot_data)) + . = 0x1030 ; + KEEP(*(.boot_hdr.dcd_data)) + __boot_hdr_end__ = ABSOLUTE(.) ; + . = 0x2000 ; + } >flash + + .text : + { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + + /* + * This is a hack to make the newlib libm __errno() call + * use the NuttX get_errno_ptr() function. + */ + __errno = get_errno_ptr; + } > flash + + /* + * Init functions (static constructors and the like) + */ + + .init_section : + { + _sinit = ABSOLUTE(.); + KEEP(*(.init_array .init_array.*)) + _einit = ABSOLUTE(.); + } > flash + + /* + * Construction data for parameters. + */ + __param ALIGN(4): + { + __param_start = ABSOLUTE(.); + KEEP(*(__param*)) + __param_end = ABSOLUTE(.); + } > flash + + .ARM.extab : + { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + + .ARM.exidx : + { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .ramfunc ALIGN(4): + { + _sramfuncs = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfuncs = ABSOLUTE(.); + } > sram AT > flash + + _framfuncs = LOADADDR(.ramfunc); + + .bss : + { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/nxp/fmurt1062-v1/src/CMakeLists.txt b/boards/nxp/fmurt1062-v1/src/CMakeLists.txt new file mode 100644 index 000000000000..935ad0290337 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/CMakeLists.txt @@ -0,0 +1,55 @@ +############################################################################ +# +# Copyright (c) 2016, 2019 PX4 Development Team. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name PX4 nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +px4_add_library(drivers_board + autoleds.c + automount.c + can.c + init.c + led.c + sdhc.c + spi.c + timer_config.c + usb.c + manifest.c + imxrt_flexspi_nor_boot.c + imxrt_flexspi_nor_flash.c +) + +target_link_libraries(drivers_board + PRIVATE + drivers__led # drv_led_start + nuttx_arch # sdio + nuttx_drivers # sdio + px4_layer + ) \ No newline at end of file diff --git a/boards/nxp/fmurt1062-v1/src/autoleds.c b/boards/nxp/fmurt1062-v1/src/autoleds.c new file mode 100644 index 000000000000..ee0fd6eed634 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/autoleds.c @@ -0,0 +1,191 @@ +/**************************************************************************** + * + * Copyright (C) 2016-2018 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* + * This module shall be used during board bring up of Nuttx. + * + * The NXP FMUK66-V3 has a separate Red, Green and Blue LEDs driven by the K66 + * as follows: + * + * LED K66 + * ------ ------------------------------------------------------- + * RED FB_CS0_b/ UART2_CTS_b / ADC0_SE5b / SPI0_SCK / FTM3_CH1/ PTD1 + * GREEN FTM2_FLT0/ CMP0_IN3/ FB_AD6 / I2S0_RX_BCLK/ FTM3_CH5/ ADC1_SE5b/ PTC9 + * BLUE CMP0_IN2/ FB_AD7 / I2S0_MCLK/ FTM3_CH4/ ADC1_SE4b/ PTC8 + * + * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board + * the NXP fmurt1062-v1. The following definitions describe how NuttX controls + * the LEDs: + * + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ------------------- ----------------------- ----------------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + * LED_IRQSENABLED Interrupts enabled OFF OFF ON + * LED_STACKCREATED Idle stack created OFF ON OFF + * LED_INIRQ In an interrupt (no change) + * LED_SIGNAL In a signal handler (no change) + * LED_ASSERTION An assertion failed (no change) + * LED_PANIC The system has crashed FLASH OFF OFF + * LED_IDLE K66 is in sleep mode (Optional, not used) + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "imxrt_gpio.h" +#include "board_config.h" +#ifdef CONFIG_ARCH_LEDS +__BEGIN_DECLS +extern void led_init(void); +__END_DECLS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ +bool nuttx_owns_leds = true; +/**************************************************************************** + * Name: board_autoled_initialize + ****************************************************************************/ + +void board_autoled_initialize(void) +{ + led_init(); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ +void phy_set_led(int l, bool s) +{ + +} +void board_autoled_on(int led) +{ + if (!nuttx_owns_leds) { + return; + } + + switch (led) { + default: + break; + + case LED_HEAPALLOCATE: + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_IRQSENABLED: + phy_set_led(BOARD_LED_BLUE, false); + phy_set_led(BOARD_LED_GREEN, true); + break; + + case LED_STACKCREATED: + phy_set_led(BOARD_LED_GREEN, true); + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_INIRQ: + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_SIGNAL: + phy_set_led(BOARD_LED_GREEN, true); + break; + + case LED_ASSERTION: + phy_set_led(BOARD_LED_RED, true); + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_PANIC: + phy_set_led(BOARD_LED_RED, true); + break; + + case LED_IDLE : /* IDLE */ + phy_set_led(BOARD_LED_RED, true); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + if (!nuttx_owns_leds) { + return; + } + + switch (led) { + default: + break; + + case LED_SIGNAL: + phy_set_led(BOARD_LED_GREEN, false); + break; + + case LED_INIRQ: + phy_set_led(BOARD_LED_BLUE, false); + break; + + case LED_ASSERTION: + phy_set_led(BOARD_LED_RED, false); + phy_set_led(BOARD_LED_BLUE, false); + break; + + case LED_PANIC: + phy_set_led(BOARD_LED_RED, false); + break; + + case LED_IDLE : /* IDLE */ + phy_set_led(BOARD_LED_RED, false); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/boards/nxp/fmurt1062-v1/src/automount.c b/boards/nxp/fmurt1062-v1/src/automount.c new file mode 100644 index 000000000000..26d423384f46 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/automount.c @@ -0,0 +1,304 @@ +/************************************************************************************ + * + * Copyright (C) 2016-2018 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#if defined(CONFIG_FS_AUTOMOUNTER_DEBUG) && !defined(CONFIG_DEBUG_FS) +# define CONFIG_DEBUG_FS 1 +#endif + +#include +#include + +#include +#include +#include + +#include "board_config.h" +#ifdef HAVE_AUTOMOUNTER + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Types + ************************************************************************************/ +/* This structure represents the changeable state of the automounter */ + +struct fmuk66_automount_state_s { + volatile automount_handler_t handler; /* Upper half handler */ + FAR void *arg; /* Handler argument */ + bool enable; /* Fake interrupt enable */ + bool pending; /* Set if there an event while disabled */ +}; + +/* This structure represents the static configuration of an automounter */ + +struct fmuk66_automount_config_s { + /* This must be first thing in structure so that we can simply cast from struct + * automount_lower_s to struct fmuk66_automount_config_s + */ + + struct automount_lower_s lower; /* Publicly visible part */ + FAR struct fmuk66_automount_state_s *state; /* Changeable state */ +}; + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ + +static int fmuk66_attach(FAR const struct automount_lower_s *lower, automount_handler_t isr, FAR void *arg); +static void fmuk66_enable(FAR const struct automount_lower_s *lower, bool enable); +static bool fmuk66_inserted(FAR const struct automount_lower_s *lower); + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static struct fmuk66_automount_state_s g_sdhc_state; +static const struct fmuk66_automount_config_s g_sdhc_config = { + .lower = + { + .fstype = CONFIG_FMUK66_SDHC_AUTOMOUNT_FSTYPE, + .blockdev = CONFIG_FMUK66_SDHC_AUTOMOUNT_BLKDEV, + .mountpoint = CONFIG_FMUK66_SDHC_AUTOMOUNT_MOUNTPOINT, + .ddelay = MSEC2TICK(CONFIG_FMUK66_SDHC_AUTOMOUNT_DDELAY), + .udelay = MSEC2TICK(CONFIG_FMUK66_SDHC_AUTOMOUNT_UDELAY), + .attach = fmuk66_attach, + .enable = fmuk66_enable, + .inserted = fmuk66_inserted + }, + .state = &g_sdhc_state +}; + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: fmuk66_attach + * + * Description: + * Attach a new SDHC event handler + * + * Input Parameters: + * lower - An instance of the auto-mounter lower half state structure + * isr - The new event handler to be attach + * arg - Client data to be provided when the event handler is invoked. + * + * Returned Value: + * Always returns OK + * + ************************************************************************************/ + +static int fmuk66_attach(FAR const struct automount_lower_s *lower, automount_handler_t isr, FAR void *arg) +{ + FAR const struct fmuk66_automount_config_s *config; + FAR struct fmuk66_automount_state_s *state; + + /* Recover references to our structure */ + + config = (FAR struct fmuk66_automount_config_s *)lower; + DEBUGASSERT(config != NULL && config->state != NULL); + + state = config->state; + + /* Save the new handler info (clearing the handler first to eliminate race + * conditions). + */ + + state->handler = NULL; + state->pending = false; + state->arg = arg; + state->handler = isr; + return OK; +} + +/************************************************************************************ + * Name: fmuk66_enable + * + * Description: + * Enable card insertion/removal event detection + * + * Input Parameters: + * lower - An instance of the auto-mounter lower half state structure + * enable - True: enable event detection; False: disable + * + * Returned Value: + * None + * + ************************************************************************************/ + +static void fmuk66_enable(FAR const struct automount_lower_s *lower, bool enable) +{ + FAR const struct fmuk66_automount_config_s *config; + FAR struct fmuk66_automount_state_s *state; + irqstate_t flags; + + /* Recover references to our structure */ + + config = (FAR struct fmuk66_automount_config_s *)lower; + DEBUGASSERT(config != NULL && config->state != NULL); + + state = config->state; + + /* Save the fake enable setting */ + + flags = enter_critical_section(); + state->enable = enable; + + /* Did an interrupt occur while interrupts were disabled? */ + + if (enable && state->pending) { + /* Yes.. perform the fake interrupt if the interrutp is attached */ + + if (state->handler) { + bool inserted = fmuk66_cardinserted(); + (void)state->handler(&config->lower, state->arg, inserted); + } + + state->pending = false; + } + + leave_critical_section(flags); +} + +/************************************************************************************ + * Name: fmuk66_inserted + * + * Description: + * Check if a card is inserted into the slot. + * + * Input Parameters: + * lower - An instance of the auto-mounter lower half state structure + * + * Returned Value: + * True if the card is inserted; False otherwise + * + ************************************************************************************/ + +static bool fmuk66_inserted(FAR const struct automount_lower_s *lower) +{ + return fmuk66_cardinserted(); +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: fmuk66_automount_initialize + * + * Description: + * Configure auto-mounters for each enable and so configured SDHC + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ************************************************************************************/ + +void fmuk66_automount_initialize(void) +{ + FAR void *handle; + + finfo("Initializing automounter(s)\n"); + + /* Initialize the SDHC0 auto-mounter */ + + handle = automount_initialize(&g_sdhc_config.lower); + + if (!handle) { + ferr("ERROR: Failed to initialize auto-mounter for SDHC0\n"); + } +} + +/************************************************************************************ + * Name: fmuk66_automount_event + * + * Description: + * The SDHC card detection logic has detected an insertion or removal event. It + * has already scheduled the MMC/SD block driver operations. Now we need to + * schedule the auto-mount event which will occur with a substantial delay to make + * sure that everything has settle down. + * + * Input Parameters: + * slotno - Identifies the SDHC0 slot: SDHC0_SLOTNO or SDHC1_SLOTNO. There is a + * terminology problem here: Each SDHC supports two slots, slot A and slot B. + * Only slot A is used. So this is not a really a slot, but an HSCMI peripheral + * number. + * inserted - True if the card is inserted in the slot. False otherwise. + * + * Returned Value: + * None + * + * Assumptions: + * Interrupts are disabled. + * + ************************************************************************************/ + +void fmuk66_automount_event(bool inserted) +{ + FAR const struct fmuk66_automount_config_s *config = &g_sdhc_config; + FAR struct fmuk66_automount_state_s *state = &g_sdhc_state; + + /* Is the auto-mounter interrupt attached? */ + + if (state->handler) { + /* Yes.. Have we been asked to hold off interrupts? */ + + if (!state->enable) { + /* Yes.. just remember the there is a pending interrupt. We will + * deliver the interrupt when interrupts are "re-enabled." + */ + + state->pending = true; + + } else { + /* No.. forward the event to the handler */ + + (void)state->handler(&config->lower, state->arg, inserted); + } + } +} + +#endif /* HAVE_AUTOMOUNTER */ diff --git a/boards/nxp/fmurt1062-v1/src/board_config.h b/boards/nxp/fmurt1062-v1/src/board_config.h new file mode 100644 index 000000000000..234120ecd173 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/board_config.h @@ -0,0 +1,696 @@ +/**************************************************************************** + * + * Copyright (c) 2018-2019 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file board_config.h + * + * NXP fmukrt1062-v1 internal definitions + */ + +#pragma once + +#define ON_EVK // For Board Bring up before BIG Board on IMXRT1060-EVK + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include +#include + +#include "imxrt_gpio.h" +#include "imxrt_iomuxc.h" +#include "chip/imxrt_pinmux.h" + +#include + +/**************************************************************************************************** + * Definitions + ****************************************************************************************************/ +#if defined(ON_EVK) +//#define ON_EVK_SPI // Uses SDHC pins and requires R278-R281 +#define ON_EVK_SDIO // SPI2 is mapped on Pins and requires +//#define ON_EVK_I2C // I2C2 is mapped on Pins and requires R278-R281 +#endif + +/* PX4IO connection configuration */ + +#if 0 // There is no PX4 Support on first out +// This requires serial DMA driver +#define BOARD_USES_PX4IO_VERSION 2 +#define PX4IO_SERIAL_DEVICE "/dev/ttyS6" +#define PX4IO_SERIAL_TX_GPIO GPIO_LPUART8_TX_2 +#define PX4IO_SERIAL_RX_GPIO GPIO_LPUART8_RX_2 +#define PX4IO_SERIAL_BASE IMXRT_LPUART8_BASE +#define PX4IO_SERIAL_VECTOR IMXRT_IRQ_LPUART8 +#define PX4IO_SERIAL_TX_DMAMAP +#define PX4IO_SERIAL_RX_DMAMAP +#define PX4IO_SERIAL_RCC_REG +#define PX4IO_SERIAL_RCC_EN +#define PX4IO_SERIAL_CLOCK +#define PX4IO_SERIAL_BITRATE 1500000 /* 1.5Mbps -> max rate for IO */ +#endif + +/* Configuration ************************************************************************************/ + + +/* FMURT1062 GPIOs ***********************************************************************************/ +/* LEDs */ +/* An RGB LED is connected through GPIO as shown below: + */ +#define LED_IOMUX (IOMUX_OPENDRAIN | IOMUX_PULL_NONE | IOMUX_DRIVE_33OHM | IOMUX_SPEED_MEDIUM | IOMUX_SLEW_SLOW) +#define GPIO_nLED_RED (GPIO_PORT2 | GPIO_PIN0 | GPIO_OUTPUT | GPIO_OUTPUT_ZERO | LED_IOMUX) +#define GPIO_nLED_GREEN (GPIO_PORT2 | GPIO_PIN1 | GPIO_OUTPUT | GPIO_OUTPUT_ZERO | LED_IOMUX) +#define GPIO_nLED_BLUE (GPIO_PORT2 | GPIO_PIN24 | GPIO_OUTPUT | GPIO_OUTPUT_ZERO | LED_IOMUX) + +#define BOARD_HAS_CONTROL_STATUS_LEDS 1 +#define BOARD_OVERLOAD_LED LED_RED +#define BOARD_ARMED_STATE_LED LED_BLUE + +/* SENSORS are on SPI1, 3 + * MEMORY is on bus SPI2 + * MS5611 is on bus SPI4 + */ + +#define PX4_SPI_BUS_SENSORS 1 +#define PX4_SPI_BUS_MEMORY 2 +#define PX4_SPI_BUS_BARO 3 +#define PX4_SPI_BUS_EXTERNAL1 4 + +/* + * Define the ability to shut off off the sensor signals + * by changing the signals to inputs + */ + +#define _PIN_OFF(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT | IOMUX_PULL_DOWN_100K | IOMUX_CMOS_INPUT)) + +/* Define the Chip Selects, Data Ready and Control signals per SPI bus */ + +#define CS_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_UP_100K | IOMUX_DRIVE_33OHM | IOMUX_SPEED_LOW | IOMUX_SLEW_FAST) +#define OUT_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_UP_100K | IOMUX_DRIVE_50OHM | IOMUX_SPEED_MEDIUM | IOMUX_SLEW_FAST) + +/* SPI 1 CS */ +#if defined(ON_EVK) && defined(ON_EVK_SPI) +#define GPIO_SPI1_CS1_ICM20689 /* J24-3 POP R280 GPIO_SD_B0_01 */ (GPIO_PORT3 | GPIO_PIN13 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) +#else +#define GPIO_SPI1_CS1_ICM20689 (GPIO_PORT3 | GPIO_PIN26 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) +#define GPIO_SPI1_CS2_ICM20602 (GPIO_PORT3 | GPIO_PIN27 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) +#define GPIO_SPI1_CS3_BMI055_GYRO (GPIO_PORT2 | GPIO_PIN26 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) +#define GPIO_SPI1_CS4_BMI055_ACC (GPIO_PORT2 | GPIO_PIN31 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) +#endif + +/* Define the SPI1 Data Ready interrupts */ + +#define DRDY_IOMUX (IOMUX_SCHMITT_TRIGGER | IOMUX_PULL_UP_47K | IOMUX_DRIVE_HIZ) + +// todo add IRQ-ness! +#define GPIO_SPI1_DRDY1_ICM20689 (GPIO_PORT4 | GPIO_PIN15 | GPIO_INPUT | DRDY_IOMUX) +#define GPIO_SPI1_DRDY2_BMI055_GYRO (GPIO_PORT4 | GPIO_PIN16 | GPIO_INPUT | DRDY_IOMUX) +#define GPIO_SPI1_DRDY3_BMI055_ACC (GPIO_PORT3 | GPIO_PIN23 | GPIO_INPUT | DRDY_IOMUX) +#define GPIO_SPI1_DRDY4_ICM20602 (GPIO_PORT3 | GPIO_PIN27 | GPIO_INPUT | DRDY_IOMUX) +#define GPIO_SPI1_DRDY5_BMI055_GYRO (GPIO_PORT4 | GPIO_PIN13 | GPIO_INPUT | DRDY_IOMUX) +#define GPIO_SPI1_DRDY6_BMI055_ACC (GPIO_PORT2 | GPIO_PIN7 | GPIO_INPUT | DRDY_IOMUX) + +#define GPIO_SPIAUX_CS_MEM (GPIO_PORT5 | GPIO_PIN0 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) + +/* SPI1 off */ + +#define GPIO_SPI1_SCK_OFF _PIN_OFF(GPIO_LPSPI1_SCK) +#define GPIO_SPI1_MISO_OFF _PIN_OFF(GPIO_LPSPI1_MISO) +#define GPIO_SPI1_MOSI_OFF _PIN_OFF(GPIO_LPSPI1_MOSI) + +#define GPIO_DRDY_OFF_SPI1_DRDY1_ICM20689 _PIN_OFF(GPIO_SPI1_DRDY1_ICM20689) +#define GPIO_DRDY_OFF_SPI1_DRDY2_BMI055_GYRO _PIN_OFF(GPIO_SPI1_DRDY2_BMI055_GYRO) +#define GPIO_DRDY_OFF_SPI1_DRDY3_BMI055_ACC _PIN_OFF(GPIO_SPI1_DRDY3_BMI055_ACC) +#define GPIO_DRDY_OFF_SPI1_DRDY4_ICM20602 _PIN_OFF(GPIO_SPI1_DRDY4_ICM20602) +#define GPIO_DRDY_OFF_SPI1_DRDY5_BMI055_GYRO _PIN_OFF(GPIO_SPI1_DRDY5_BMI055_GYRO) +#define GPIO_DRDY_OFF_SPI1_DRDY6_BMI055_ACC _PIN_OFF(GPIO_SPI1_DRDY6_BMI055_ACC) + +/* SPI 2 CS */ + +#define GPIO_SPI2_CS_FRAM (GPIO_PORT3 | GPIO_PIN20 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) + +/* SPI 3 CS */ + +#define GPIO_SPI3_CS1_MS5611 (GPIO_PORT4 | GPIO_PIN14 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) + +/* SPI 4 CS */ + +#define SPI4_CS1_EXTERNAL1 (GPIO_PORT4 | GPIO_PIN7 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) +#define SPI4_CS2_EXTERNAL1 (GPIO_PORT2 | GPIO_PIN30 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) +#define SPI4_CS3_EXTERNAL1 (GPIO_PORT4 | GPIO_PIN11 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | CS_IOMUX) + +/* Define the SPI4 Data Ready and Control signals */ + +#define GPIO_SPI4_DRDY7_EXTERNAL1 (GPIO_PORT3 | GPIO_PIN21 | GPIO_INPUT | DRDY_IOMUX) +#define GPIO_nSPI4_RESET_EXTERNAL1 (GPIO_PORT2 | GPIO_PIN16 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | OUT_IOMUX) +#define GPIO_SPI4_SYNC_EXTERNAL1 (GPIO_PORT4 | GPIO_PIN5 | GPIO_OUTPUT | GPIO_OUTPUT_ONE | OUT_IOMUX) + +#define GPIO_DRDY_OFF_SPI4_DRDY7_EXTERNAL1 _PIN_OFF(GPIO_SPI4_DRDY7_EXTERNAL1) +#define GPIO_nSPI4_RESET_EXTERNAL1_OFF _PIN_OFF(GPIO_nSPI4_RESET_EXTERNAL1) +#define GPIO_SPI4_SYNC_EXTERNAL1_OFF _PIN_OFF(GPIO_SPI4_SYNC_EXTERNAL1) + + +/* v BEGIN Legacy SPI defines TODO: fix this with enumeration */ + +#define PX4_SPI_BUS_RAMTRON PX4_SPI_BUS_MEMORY +#define PX4_SPIDEV_BMA 0 +#define PX4_SPIDEV_BMI 0 + +/* ^ END Legacy SPI defines TODO: fix this with enumeration */ + +#define PX4_SPIDEV_ICM_20689 PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,0) +#define PX4_SPIDEV_ICM_20602 PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,1) +#define PX4_SPIDEV_BMI055_GYR PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,2) +#define PX4_SPIDEV_BMI055_ACC PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,3) +#define PX4_SPIDEV_AUX_MEM PX4_MK_SPI_SEL(PX4_SPI_BUS_SENSORS,4) + +#define PX4_SENSOR_BUS_CS_GPIO {GPIO_SPI1_CS1_ICM20689, GPIO_SPI1_CS2_ICM20602, GPIO_SPI1_CS3_BMI055_GYRO, GPIO_SPI1_CS4_BMI055_ACC, GPIO_SPIAUX_CS_MEM} +#define PX4_SENSORS_BUS_FIRST_CS PX4_SPIDEV_ICM_20689 +#define PX4_SENSORS_BUS_LAST_CS PX4_SPIDEV_AUX_MEM + +#define PX4_SPIDEV_MEMORY PX4_MK_SPI_SEL(PX4_SPI_BUS_MEMORY,0) +#define PX4_MEMORY_BUS_CS_GPIO {GPIO_SPI2_CS_FRAM} +#define PX4_MEMORY_BUS_FIRST_CS PX4_SPIDEV_MEMORY +#define PX4_MEMORY_BUS_LAST_CS PX4_SPIDEV_MEMORY + +#define PX4_SPIDEV_BARO PX4_MK_SPI_SEL(PX4_SPI_BUS_BARO,0) +#define PX4_BARO_BUS_CS_GPIO {GPIO_SPI3_CS1_MS5611} +#define PX4_BARO_BUS_FIRST_CS PX4_SPIDEV_BARO +#define PX4_BARO_BUS_LAST_CS PX4_SPIDEV_BARO + +#define PX4_SPIDEV_EXTERNAL1_1 PX4_MK_SPI_SEL(PX4_SPI_BUS_EXTERNAL1,0) +#define PX4_SPIDEV_EXTERNAL1_2 PX4_MK_SPI_SEL(PX4_SPI_BUS_EXTERNAL1,1) +#define PX4_SPIDEV_EXTERNAL1_3 PX4_MK_SPI_SEL(PX4_SPI_BUS_EXTERNAL1,2) +#define PX4_EXTERNAL1_BUS_CS_GPIO {SPI4_CS1_EXTERNAL1, SPI4_CS2_EXTERNAL1, SPI4_CS3_EXTERNAL1} +#define PX4_EXTERNAL1_BUS_FIRST_CS PX4_SPIDEV_EXTERNAL1_1 +#define PX4_EXTERNAL1_BUS_LAST_CS PX4_SPIDEV_EXTERNAL1_3 + +/* I2C busses */ + +/* I2C busses */ + +#define PX4_I2C_BUS_EXPANSION 1 +#define PX4_I2C_BUS_EXPANSION1 2 +#define PX4_I2C_BUS_ONBOARD 3 +#define PX4_I2C_BUS_LED PX4_I2C_BUS_EXPANSION + +#define BOARD_NUMBER_I2C_BUSES 3 +#define BOARD_I2C_BUS_CLOCK_INIT {100000, 100000, 100000} + + +#define ADC_IOMUX (IOMUX_CMOS_INPUT | IOMUX_PULL_NONE | IOMUX_DRIVE_HIZ) + +#define ADC1_CH(n) (n) +#define ADC1_GPIO(n, p) (GPIO_PORT1 | GPIO_PIN##p | ADC_IOMUX) // + +/* Define GPIO pins used as ADC N.B. Channel numbers are for reference, */ + +#if defined(ON_EVK) +#define PX4_ADC_GPIO \ + /* J23-2 BATTERY1_VOLTAGE GPIO_AD_B1_11 GPIO1 Pin 27 */ ADC1_GPIO(0, 27), \ + /* J23-3 HW_VER_SENSE GPIO_AD_B1_04 GPIO1 Pin 20 */ ADC1_GPIO(9, 20), \ + /* J23-4 SCALED_V5 GPIO_AD_B1_05 GPIO1 Pin 21 */ ADC1_GPIO(10, 21), \ + /* J22-4 HW_REV_SENSE GPIO_AD_B1_08 GPIO1 Pin 24 */ ADC1_GPIO(13, 24), \ + /* J23-1 RSSI_IN GPIO_AD_B1_10 GPIO1 Pin 26 */ ADC1_GPIO(15, 26) +#else +#define PX4_ADC_GPIO \ + /* BATTERY1_VOLTAGE GPIO_AD_B1_11 GPIO1 Pin 27 */ ADC1_GPIO(0, 27), \ + /* BATTERY1_CURRENT GPIO_AD_B0_12 GPIO1 Pin 12 */ ADC1_GPIO(1, 12), \ + /* BATTERY2_VOLTAGE GPIO_AD_B0_13 GPIO1 Pin 13 */ ADC1_GPIO(2, 13), \ + /* BATTERY2_CURRENT GPIO_AD_B0_14 GPIO1 Pin 14 */ ADC1_GPIO(3, 14), \ + /* SPARE_2_CHANNEL GPIO_AD_B0_15 GPIO1 Pin 15 */ ADC1_GPIO(4, 15), \ + /* HW_VER_SENSE GPIO_AD_B1_04 GPIO1 Pin 20 */ ADC1_GPIO(9, 20), \ + /* SCALED_V5 GPIO_AD_B1_05 GPIO1 Pin 21 */ ADC1_GPIO(10, 21), \ + /* SCALED_VDD_3V3_SENSORS GPIO_AD_B1_06 GPIO1 Pin 22 */ ADC1_GPIO(11, 22), \ + /* HW_REV_SENSE GPIO_AD_B1_08 GPIO1 Pin 24 */ ADC1_GPIO(13, 24), \ + /* SPARE_1 GPIO_AD_B1_09 GPIO1 Pin 25 */ ADC1_GPIO(14, 25), \ + /* RSSI_IN GPIO_AD_B1_10 GPIO1 Pin 26 */ ADC1_GPIO(15, 26) +#endif // defined(ON_EVK) + +/* Define Channel numbers must match above GPIO pin IN(n)*/ + +#define ADC_BATTERY1_VOLTAGE_CHANNEL /* GPIO_AD_B1_11 GPIO1 Pin 27 */ ADC1_CH(0) +#define ADC_BATTERY1_CURRENT_CHANNEL /* GPIO_AD_B0_12 GPIO1 Pin 12 */ ADC1_CH(1) +#define ADC_BATTERY2_VOLTAGE_CHANNEL /* GPIO_AD_B0_13 GPIO1 Pin 13 */ ADC1_CH(2) +#define ADC_BATTERY2_CURRENT_CHANNEL /* GPIO_AD_B0_14 GPIO1 Pin 14 */ ADC1_CH(3) +#define ADC1_SPARE_2_CHANNEL /* GPIO_AD_B0_15 GPIO1 Pin 15 */ ADC1_CH(4) +#define ADC_HW_VER_SENSE_CHANNEL /* GPIO_AD_B1_04 GPIO1 Pin 20 */ ADC1_CH(9) +#define ADC_SCALED_V5_CHANNEL /* GPIO_AD_B1_05 GPIO1 Pin 21 */ ADC1_CH(10) +#define ADC_SCALED_VDD_3V3_SENSORS_CHANNEL /* GPIO_AD_B1_06 GPIO1 Pin 22 */ ADC1_CH(11) +#define ADC_HW_REV_SENSE_CHANNEL /* GPIO_AD_B1_08 GPIO1 Pin 24 */ ADC1_CH(13) +#define ADC1_SPARE_1_CHANNEL /* GPIO_AD_B1_09 GPIO1 Pin 25 */ ADC1_CH(14) +#define ADC_RSSI_IN_CHANNEL /* GPIO_AD_B1_10 GPIO1 Pin 26 */ ADC1_CH(15) + +#if defined(ON_EVK) +#define ADC_CHANNELS \ + ((1 << ADC_BATTERY1_VOLTAGE_CHANNEL) | \ + (1 << ADC_RSSI_IN_CHANNEL) | \ + (1 << ADC_SCALED_V5_CHANNEL) | \ + (1 << ADC_HW_VER_SENSE_CHANNEL) | \ + (1 << ADC_HW_REV_SENSE_CHANNEL)) +#else +#define ADC_CHANNELS \ + ((1 << ADC_BATTERY1_VOLTAGE_CHANNEL) | \ + (1 << ADC_BATTERY1_CURRENT_CHANNEL) | \ + (1 << ADC_BATTERY2_VOLTAGE_CHANNEL) | \ + (1 << ADC_BATTERY2_CURRENT_CHANNEL) | \ + (1 << ADC1_SPARE_2_CHANNEL) | \ + (1 << ADC_RSSI_IN_CHANNEL) | \ + (1 << ADC_SCALED_V5_CHANNEL) | \ + (1 << ADC_SCALED_VDD_3V3_SENSORS_CHANNEL) | \ + (1 << ADC_HW_VER_SENSE_CHANNEL) | \ + (1 << ADC_HW_REV_SENSE_CHANNEL) | \ + (1 << ADC1_SPARE_1_CHANNEL)) +#endif +/* Define Battery 1 Voltage Divider and A per V + */ + +#define BOARD_BATTERY1_V_DIV (18.1f) /* measured with the provided PM board */ +#define BOARD_BATTERY1_A_PER_V (36.367515152f) + +/* HW has to large of R termination on ADC todo:change when HW value is chosen */ + +#define BOARD_ADC_OPEN_CIRCUIT_V (5.6f) + +/* HW Version and Revision drive signals Default to 1 to detect */ + +#define BOARD_HAS_HW_VERSIONING + +#define HW_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_NONE | IOMUX_DRIVE_33OHM | IOMUX_SPEED_MAX | IOMUX_SLEW_FAST) + +#define GPIO_HW_REV_DRIVE /* GPIO_AD_B0_00 GPIO1_IO00 */ (GPIO_PORT1 | GPIO_PIN0 | GPIO_OUTPUT | GPIO_OUTPUT_SET | HW_IOMUX) +#define GPIO_HW_REV_SENSE /* GPIO_AD_B1_08 GPIO1 Pin 24 */ ADC1_GPIO(13, 24) +#define GPIO_HW_VER_DRIVE /* GPIO_AD_B0_04 GPIO1_IO04 */ (GPIO_PORT1 | GPIO_PIN4 | GPIO_OUTPUT | GPIO_OUTPUT_SET | HW_IOMUX) +#define GPIO_HW_VER_SENSE /* GPIO_AD_B1_04 GPIO1 Pin 20 */ ADC1_GPIO(9, 20) +#define HW_INFO_INIT {'V','5','x', 'x',0} +#define HW_INFO_INIT_VER 2 +#define HW_INFO_INIT_REV 3 +/* CAN Silence + * + * Silent mode control \ ESC Mux select + */ + +#define SILENT_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_NONE | IOMUX_DRIVE_33OHM | IOMUX_SPEED_MAX | IOMUX_SLEW_FAST) +#define GPIO_CAN1_SILENT_S0 /* GPIO_AD_B0_10 GPIO1_IO10 */ (GPIO_PORT1 | GPIO_PIN10 | GPIO_OUTPUT | GPIO_OUTPUT_CLEAR | SILENT_IOMUX) +#define GPIO_CAN2_SILENT_S1 /* GPIO_EMC_06 GPIO4_IO06 */ (GPIO_PORT4 | GPIO_PIN6 | GPIO_OUTPUT | GPIO_OUTPUT_CLEAR | SILENT_IOMUX) +#define GPIO_CAN3_SILENT_S2 /* GPIO_EMC_09 GPIO4_IO09 */ (GPIO_PORT4 | GPIO_PIN9 | GPIO_OUTPUT | GPIO_OUTPUT_CLEAR | SILENT_IOMUX) + +/* HEATER + * PWM in future + */ +#define GPIO_HEATER_OUTPUT /* GPIO_B1_09 QTIMER2_TIMER3 GPIO2 Pin 25 */ GPIO_QTIMER2_TIMER3_1 + +/* PWM Capture + * + * 3 PWM Capture inputs are not supported + */ +#define DIRECT_PWM_CAPTURE_CHANNELS 0 + +/* PWM + * + * 8 PWM outputs are configured. + * + * Pins: + * + * FMU_CH1 : GPIO_B0_06 GPIO2 Pin 6 FLEXPWM2_PWMA0 + * FMU_CH2 : GPIO_EMC_08 GPIO4 Pin 8 FLEXPWM2_PWMA1 + * FMU_CH3 : GPIO_EMC_10 GPIO4 Pin 10 FLEXPWM2_PWMA2 + * FMU_CH4 : GPIO_AD_B0_09 GPIO1 Pin 9 FLEXPWM2_PWMA3 + * FMU_CH5 : GPIO_EMC_33 GPIO3 Pin 19 FLEXPWM3_PWMA2 + * FMU_CH6 : GPIO_EMC_30 GPIO4 Pin 30 FLEXPWM3_PWMB0 + * FMU_CH7 : GPIO_EMC_04 GPIO4 Pin 4 FLEXPWM4_PWMA2 + * FMU_CH8 : GPIO_EMC_01 GPIO4 Pin 1 FLEXPWM4_PWMB0 + * + */ +#define PWM_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_NONE | IOMUX_DRIVE_50OHM | IOMUX_SPEED_MEDIUM | IOMUX_SLEW_FAST) +#define PIN_FLEXPWM2_PWMA00 /* P2:6 PWM2 A0 FMU1 */ (PWM_IOMUX | GPIO_FLEXPWM2_PWMA00_2) +#define PIN_FLEXPWM2_PWMA01 /* P4:8 PWM2 A1 FMU2 */ (PWM_IOMUX | GPIO_FLEXPWM2_PWMA01_1) +#define PIN_FLEXPWM2_PWMA02 /* P4:10 PWM2 A2 FMU3 */ (PWM_IOMUX | GPIO_FLEXPWM2_PWMA02_1) +#define PIN_FLEXPWM2_PWMA03 /* P1:9 PWM2 A3 FMU4 */ (PWM_IOMUX | GPIO_FLEXPWM2_PWMA03_2) +#define PIN_FLEXPWM3_PWMA02 /* P3:19 PWM3 A2 FMU5 */ (PWM_IOMUX | GPIO_FLEXPWM3_PWMA02) +#define PIN_FLEXPWM3_PWMB00 /* P4:30 PWM3 B0 FMU6 */ (PWM_IOMUX | GPIO_FLEXPWM3_PWMB00) +#define PIN_FLEXPWM4_PWMA02 /* P4:4 PWM4 A2 FMU7 */ (PWM_IOMUX | GPIO_FLEXPWM4_PWMA02_2) +#define PIN_FLEXPWM4_PWMB00 /* P4:1 PWM4 B0 FMU8 */ (PWM_IOMUX | GPIO_FLEXPWM4_PWMB00) + +#define DIRECT_PWM_OUTPUT_CHANNELS 8 + +// Input Capture not supported on MVP + +#define DIRECT_INPUT_TIMER_CHANNELS 0 + +#define BOARD_HAS_LED_PWM 1 +#define BOARD_LED_PWM_DRIVE_ACTIVE_LOW 1 + +/* UI LEDs are driven by timer 4 the pins have no alternates + * + * nUI_LED_RED GPIO_B0_10 QTIMER4_TIMER1 + * nUI_LED_GREEN GPIO_B0_11 QTIMER4_TIMER2 + * nUI_LED_BLUE GPIO_B1_11 QTIMER4_TIMER3 + */ + + +/* User GPIOs + * + * GPIO- + * Define as GPIO input / GPIO outputs + */ + +#define FMU_INPUT_IOMUX (IOMUX_SCHMITT_TRIGGER | IOMUX_PULL_UP_47K | IOMUX_DRIVE_HIZ) + +#define _MK_GPIO_INPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_INPUT|FMU_INPUT_IOMUX)) + +#define GPIO_GPIO0_INPUT /* P2:6 PWM2 A0 FMU1 */ (GPIO_PORT2 | GPIO_PIN6 | GPIO_INPUT | FMU_INPUT_IOMUX) +#define GPIO_GPIO1_INPUT /* P4:8 PWM2 A1 FMU2 */ (GPIO_PORT4 | GPIO_PIN8 | GPIO_INPUT | FMU_INPUT_IOMUX) +#define GPIO_GPIO2_INPUT /* P4:10 PWM2 A2 FMU3 */ (GPIO_PORT4 | GPIO_PIN10 | GPIO_INPUT | FMU_INPUT_IOMUX) +#define GPIO_GPIO3_INPUT /* P1:9 PWM2 A3 FMU4 */ (GPIO_PORT1 | GPIO_PIN9 | GPIO_INPUT | FMU_INPUT_IOMUX) +#define GPIO_GPIO4_INPUT /* P3:19 PWM3 A2 FMU5 */ (GPIO_PORT3 | GPIO_PIN19 | GPIO_INPUT | FMU_INPUT_IOMUX) +#define GPIO_GPIO5_INPUT /* P4:30 PWM3 B0 FMU6 */ (GPIO_PORT4 | GPIO_PIN30 | GPIO_INPUT | FMU_INPUT_IOMUX) +#define GPIO_GPIO6_INPUT /* P4:4 PWM4 A2 FMU7 */ (GPIO_PORT4 | GPIO_PIN4 | GPIO_INPUT | FMU_INPUT_IOMUX) +#define GPIO_GPIO7_INPUT /* P4:1 PWM4 B0 FMU8 */ (GPIO_PORT1 | GPIO_PIN1 | GPIO_INPUT | FMU_INPUT_IOMUX) + +#define FMU_OUTPUT_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_KEEP | IOMUX_DRIVE_33OHM | IOMUX_SPEED_MEDIUM | IOMUX_SLEW_FAST) + +#define _MK_GPIO_OUTPUT(def) (((def) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | (GPIO_OUTPUT|GPIO_OUTPUT_CLEAR|FMU_OUTPUT_IOMUX)) + +#define GPIO_GPIO0_OUTPUT /* P2:6 PWM2 A0 FMU1 */ (GPIO_PORT2 | GPIO_PIN6 | GPIO_OUTPUT | FMU_OUTPUT_IOMUX) +#define GPIO_GPIO1_OUTPUT /* P4:8 PWM2 A1 FMU2 */ (GPIO_PORT4 | GPIO_PIN8 | GPIO_OUTPUT | FMU_OUTPUT_IOMUX) +#define GPIO_GPIO2_OUTPUT /* P4:10 PWM2 A2 FMU3 */ (GPIO_PORT4 | GPIO_PIN10 | GPIO_OUTPUT | FMU_OUTPUT_IOMUX) +#define GPIO_GPIO3_OUTPUT /* P1:9 PWM2 A3 FMU4 */ (GPIO_PORT1 | GPIO_PIN9 | GPIO_OUTPUT | FMU_OUTPUT_IOMUX) +#define GPIO_GPIO4_OUTPUT /* P3:19 PWM3 A2 FMU5 */ (GPIO_PORT3 | GPIO_PIN19 | GPIO_OUTPUT | FMU_OUTPUT_IOMUX) +#define GPIO_GPIO5_OUTPUT /* P4:30 PWM3 B0 FMU6 */ (GPIO_PORT4 | GPIO_PIN30 | GPIO_OUTPUT | FMU_OUTPUT_IOMUX) +#define GPIO_GPIO6_OUTPUT /* P4:4 PWM4 A2 FMU7 */ (GPIO_PORT4 | GPIO_PIN4 | GPIO_OUTPUT | FMU_OUTPUT_IOMUX) +#define GPIO_GPIO7_OUTPUT /* P4:1 PWM4 B0 FMU8 */ (GPIO_PORT1 | GPIO_PIN1 | GPIO_OUTPUT | FMU_OUTPUT_IOMUX) + +/* Power supply control and monitoring GPIOs */ + +#define GENERAL_INPUT_IOMUX (IOMUX_CMOS_INPUT | IOMUX_PULL_UP_47K | IOMUX_DRIVE_HIZ) +#define GENERAL_OUTPUT_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_KEEP | IOMUX_DRIVE_33OHM | IOMUX_SPEED_MEDIUM | IOMUX_SLEW_FAST) + +#define GPIO_nPOWER_IN_A /* GPIO_B0_12 GPIO2_IO12 */ (GPIO_PORT2 | GPIO_PIN12 | GPIO_INPUT | GENERAL_INPUT_IOMUX) +#define GPIO_nPOWER_IN_B /* GPIO_B0_13 GPIO2_IO13 */ (GPIO_PORT2 | GPIO_PIN13 | GPIO_INPUT | GENERAL_INPUT_IOMUX) +#define GPIO_nPOWER_IN_C /* GPIO_B0_14 GPIO2_IO14 */ (GPIO_PORT2 | GPIO_PIN14 | GPIO_INPUT | GENERAL_INPUT_IOMUX) + +#define GPIO_nVDD_BRICK1_VALID GPIO_nPOWER_IN_A /* Brick 1 Is Chosen */ +#define GPIO_nVDD_BRICK2_VALID GPIO_nPOWER_IN_B /* Brick 2 Is Chosen */ +#define BOARD_NUMBER_BRICKS 2 +#define GPIO_nVDD_USB_VALID GPIO_nPOWER_IN_C /* USB Is Chosen */ + +#define GPIO_nVDD_5V_PERIPH_EN /* GPIO_B1_03 GPIO2_IO19 */ (GPIO_PORT2 | GPIO_PIN19 | GPIO_OUTPUT | GENERAL_OUTPUT_IOMUX) +#define GPIO_nVDD_5V_PERIPH_OC /* GPIO_B1_04 GPIO2_IO20 */ (GPIO_PORT2 | GPIO_PIN20 | GPIO_INPUT | GENERAL_INPUT_IOMUX) +#define GPIO_nVDD_5V_HIPOWER_EN /* GPIO_B1_01 GPIO2_IO17 */ (GPIO_PORT2 | GPIO_PIN17 | GPIO_OUTPUT | GENERAL_OUTPUT_IOMUX) +#define GPIO_nVDD_5V_HIPOWER_OC /* GPIO_B1_02 GPIO2_IO18 */ (GPIO_PORT2 | GPIO_PIN18 | GPIO_INPUT | GENERAL_INPUT_IOMUX) +#define GPIO_VDD_3V3_SENSORS_EN /* PMIC_STBY_REQ GPIO5_IO02 */ (GPIO_PORT5 | GPIO_PIN2 | GPIO_OUTPUT | GENERAL_OUTPUT_IOMUX) +#define GPIO_VDD_3V3_SD_CARD_EN /* PMIC_ON_REQ GPIO5_IO01 */ (GPIO_PORT5 | GPIO_PIN1 | GPIO_OUTPUT | GENERAL_OUTPUT_IOMUX) + + +/* Define True logic Power Control in arch agnostic form */ + +#define VDD_5V_PERIPH_EN(on_true) px4_arch_gpiowrite(GPIO_nVDD_5V_PERIPH_EN, !(on_true)) +#define VDD_5V_HIPOWER_EN(on_true) px4_arch_gpiowrite(GPIO_nVDD_5V_HIPOWER_EN, !(on_true)) +#define VDD_3V3_SENSORS_EN(on_true) px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, (on_true)) +#define VDD_3V3_SD_CARD_EN(on_true) px4_arch_gpiowrite(GPIO_VDD_3V3_SD_CARD_EN, (on_true)) + +/* Tone alarm output */ +#if !defined(ON_EVK) +#define TONE_ALARM_TIMER 2 /* GPT 2 */ +#define TONE_ALARM_CHANNEL 3 /* GPIO_AD_B1_07 GPT2_COMPARE3 */ + +#define GPIO_BUZZER_1 /* GPIO_AD_B1_07 GPIO1 Pin 23 */ (GPIO_PORT1 | GPIO_PIN23 | GPIO_OUTPUT | GENERAL_OUTPUT_IOMUX) + +#define GPIO_TONE_ALARM_IDLE GPIO_BUZZER_1 +#define GPIO_TONE_ALARM GPIO_GPT2_COMPARE3 +#endif +/* USB OTG FS + * + * VBUS_VALID is detected in USB_ANALOG_USB1_VBUS_DETECT_STAT + */ + +/* High-resolution timer */ +#define HRT_TIMER 1 /* use GPT1 for the HRT */ +#define HRT_TIMER_CHANNEL 1 /* use capture/compare channel 1 */ + +#define HRT_PPM_CHANNEL /* GPT1_CAPTURE2 */ 2 /* use capture/compare channel 2 */ +#define GPIO_PPM_IN /* GPT1_CAPTURE2 */ GPIO_GPT1_CAPTURE2 +#if defined(ON_EVK) +#define BOARD_HAS_SINGLE_WIRE 1 /* HW is capable of Single Wire */ +#else +#define RC_UXART_BASE IMXRT_LPUART6_BASE +#define RC_SERIAL_PORT "/dev/ttyS4" +#define BOARD_HAS_SINGLE_WIRE 1 /* HW is capable of Single Wire */ +#define BOARD_HAS_SINGLE_WIRE_ON_TX 1 /* HW default is wired as Single Wire On TX pin */ +#define BOARD_HAS_RX_TX_SWAP 0 /* HW Can swap TX and RX */ +#define RC_SERIAL_PORT_IS_SWAPED 0 /* Board wired with RC's TX is on cpu RX */ +#endif + +/* PWM input driver. Use FMU AUX5 pins attached to GPIO_EMC_33 GPIO3 Pin 19 FLEXPWM3_PWMA2 */ + +#define PWMIN_TIMER /* FLEXPWM3_PWMA2 */ 3 +#define PWMIN_TIMER_CHANNEL /* FLEXPWM3_PWMA2 */ 2 +#define GPIO_PWM_IN /* GPIO_EMC_33 GPIO3 Pin 19 */ FLEXPWM3_PWMA2 + +/* Shared pins Both FMU and PX4IO control/monitor + * FMU Initializes these pins to passive input until it is known + * if we have and PX4IO on board + */ + +#define GPIO_RSSI_IN /* GPIO_AD_B1_10 GPIO1 Pin 26 */ (GPIO_PORT1 | GPIO_PIN26 | GPIO_INPUT | ADC_IOMUX) +#define GPIO_RSSI_IN_INIT /* GPIO1 Pin 26 */ 0 /* Using 0 will Leave as ADC RSSI_IN */ + +/* Safety Switch is HW version dependent on having an PX4IO + * So we init to a benign state with the _INIT definition + * and provide the the non _INIT one for the driver to make a run time + * decision to use it. + */ +#define SAFETY_INIT_IOMUX (IOMUX_CMOS_INPUT | IOMUX_PULL_NONE | IOMUX_DRIVE_HIZ) +#define SAFETY_IOMUX (IOMUX_CMOS_OUTPUT | IOMUX_PULL_NONE | IOMUX_DRIVE_33OHM | IOMUX_SPEED_MEDIUM | IOMUX_SLEW_SLOW) +#define SAFETY_SW_IOMUX (IOMUX_CMOS_INPUT | IOMUX_PULL_UP_22K | IOMUX_DRIVE_HIZ) + +#define GPIO_nSAFETY_SWITCH_LED_OUT_INIT /* GPIO_B0_15 GPIO2_IO15 */ (GPIO_PORT2 | GPIO_PIN15 | GPIO_INPUT | SAFETY_INIT_IOMUX) +#define GPIO_nSAFETY_SWITCH_LED_OUT /* GPIO_B0_15 GPIO2_IO15 */ (GPIO_PORT2 | GPIO_PIN15 | GPIO_OUTPUT | SAFETY_IOMUX) + +/* Enable the FMU to control it if there is no px4io fixme:This should be BOARD_SAFETY_LED(__ontrue) */ +#define GPIO_LED_SAFETY GPIO_nSAFETY_SWITCH_LED_OUT +#define GPIO_SAFETY_SWITCH_IN /* GPIO_AD_B1_12 GPIO1_IO28 */ (GPIO_PORT1 | GPIO_PIN28 | GPIO_INPUT | SAFETY_SW_IOMUX) +/* Enable the FMU to use the switch it if there is no px4io fixme:This should be BOARD_SAFTY_BUTTON() */ +#define GPIO_BTN_SAFETY GPIO_SAFETY_SWITCH_IN /* Enable the FMU to control it if there is no px4io */ + +/* + * FMUv5 has a separate RC_IN + * + * GPIO PPM_IN on GPIO_EMC_23 GPIO4 Pin 23 GPT1_CAPTURE2 + * Inversion is possible in the UART and can drive GPIO PPM_IN as an output + */ + +#define GPIO_PPM_IN_AS_OUT /* GPIO_EMC_23 GPIO4 Pin 23 GPT1_CAPTURE2 */ (GPIO_PORT4 | GPIO_PIN23 | GPIO_OUTPUT | GENERAL_OUTPUT_IOMUX) + +#define SDIO_SLOTNO 0 /* Only one slot */ +#define SDIO_MINOR 0 + +/* SD card bringup does not work if performed on the IDLE thread because it + * will cause waiting. Use either: + * + * CONFIG_LIB_BOARDCTL=y, OR + * CONFIG_BOARD_INITIALIZE=y && CONFIG_BOARD_INITTHREAD=y + */ + +#if defined(CONFIG_BOARD_INITIALIZE) && !defined(CONFIG_LIB_BOARDCTL) && \ + !defined(CONFIG_BOARD_INITTHREAD) +# warning SDIO initialization cannot be perfomed on the IDLE thread +#endif + +/* By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction) + * this board support the ADC system_power interface, and therefore + * provides the true logic GPIO BOARD_ADC_xxxx macros. + */ + +#define BOARD_ADC_USB_VALID (!px4_arch_gpioread(GPIO_nVDD_USB_VALID)) +#define BOARD_ADC_USB_CONNECTED (board_read_VBUS_state() == 0) + +/* FMUv5 never powers odd the Servo rail */ + +#define BOARD_ADC_SERVO_VALID (1) + +#define BOARD_ADC_BRICK1_VALID (!px4_arch_gpioread(GPIO_nVDD_BRICK1_VALID)) +#define BOARD_ADC_BRICK2_VALID (!px4_arch_gpioread(GPIO_nVDD_BRICK2_VALID)) + +#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_PERIPH_OC)) +#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_nVDD_5V_HIPOWER_OC)) + +#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS + +/* This board provides a DMA pool and APIs */ + +#define BOARD_DMA_ALLOC_POOL_SIZE 5120 + +/* This board provides the board_on_reset interface */ + +#define BOARD_HAS_ON_RESET 1 + +/* The list of GPIO that will be initialized */ + +#define PX4_GPIO_PWM_INIT_LIST { \ + GPIO_GPIO7_INPUT, \ + GPIO_GPIO6_INPUT, \ + GPIO_GPIO5_INPUT, \ + GPIO_GPIO4_INPUT, \ + GPIO_GPIO3_INPUT, \ + GPIO_GPIO2_INPUT, \ + GPIO_GPIO1_INPUT, \ + GPIO_GPIO0_INPUT, \ + } + +#if defined(ON_EVK) +#define PX4_GPIO_INIT_LIST { \ + PX4_ADC_GPIO, \ + } + +#else +#define PX4_GPIO_INIT_LIST { \ + PX4_ADC_GPIO, \ + GPIO_HW_REV_DRIVE, \ + GPIO_HW_VER_DRIVE, \ + GPIO_FLEXCAN1_TX, \ + GPIO_FLEXCAN1_RX, \ + GPIO_FLEXCAN2_TX, \ + GPIO_FLEXCAN2_RX, \ + GPIO_FLEXCAN3_TX, \ + GPIO_FLEXCAN3_RX, \ + GPIO_CAN1_SILENT_S0, \ + GPIO_CAN2_SILENT_S1, \ + GPIO_CAN3_SILENT_S2, \ + GPIO_HEATER_OUTPUT, \ + GPIO_nPOWER_IN_A, \ + GPIO_nPOWER_IN_B, \ + GPIO_nPOWER_IN_C, \ + GPIO_nVDD_5V_PERIPH_EN, \ + GPIO_nVDD_5V_PERIPH_OC, \ + GPIO_nVDD_5V_HIPOWER_EN, \ + GPIO_nVDD_5V_HIPOWER_OC, \ + GPIO_VDD_3V3_SENSORS_EN, \ + GPIO_VDD_3V3_SD_CARD_EN, \ + GPIO_TONE_ALARM_IDLE, \ + GPIO_RSSI_IN_INIT, \ + GPIO_nSAFETY_SWITCH_LED_OUT_INIT, \ + GPIO_SAFETY_SWITCH_IN \ + } +#endif //defined(ON_EVK) + +__BEGIN_DECLS + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +/**************************************************************************** + * Name: fmurt1062_usdhc_initialize + * + * Description: + * Initialize SDIO-based MMC/SD card support + * + ****************************************************************************/ + +int fmurt1062_usdhc_initialize(void); + +/**************************************************************************************************** + * Name: imxrt_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the PX4FMU board. + * + ****************************************************************************************************/ + +extern void imxrt_spidev_initialize(void); + +/************************************************************************************ + * Name: imxrt_spi_bus_initialize + * + * Description: + * Called to configure SPI Buses. + * + ************************************************************************************/ + +extern int imxrt1062_spi_bus_initialize(void); + +/************************************************************************************ + * Name: imxrt_usb_initialize + * + * Description: + * Called to configure USB. + * + ************************************************************************************/ + +extern int imxrt_usb_initialize(void); + +void board_spi_reset(int ms); + +extern void imxrt_usbinitialize(void); + +extern void board_peripheral_reset(int ms); + +extern void fmurt1062_timer_initialize(void); +/**************************************************************************** + * Name: nsh_archinitialize + * + * Description: + * Perform architecture specific initialization for NSH. + * + * CONFIG_NSH_ARCHINIT=y : + * Called from the NSH library + * + * CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, && + * CONFIG_NSH_ARCHINIT=n : + * Called from board_initialize(). + * + ****************************************************************************/ + +#ifdef CONFIG_NSH_LIBRARY +int nsh_archinitialize(void); +#endif + +#include + +#endif /* __ASSEMBLY__ */ + +__END_DECLS diff --git a/boards/nxp/fmurt1062-v1/src/can.c b/boards/nxp/fmurt1062-v1/src/can.c new file mode 100644 index 000000000000..efc1d7ad9b27 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/can.c @@ -0,0 +1,129 @@ +/**************************************************************************** + * + * Copyright (C) 2016, 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file can.c + * + * Board-specific CAN functions. + */ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include +#include "up_arch.h" + +#include "board_config.h" + +#ifdef CONFIG_CAN + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#if defined(CONFIG_IMXRT_FLEXCAN1) && defined(CONFIG_IMXRT_FLEXCAN2) \ + && defined(CONFIG_IMXRT_FLEXCAN3) +# warning "CAN1 and CAN2 and CAN2 are enabled. Assuming only CAN1." +#endif + +#ifdef CONFIG_IMXRT_FLEXCAN1 +# define CAN_PORT 1 +#else +# define CAN_PORT 2 +#endif + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +int can_devinit(void); + +/************************************************************************************ + * Name: can_devinit + * + * Description: + * All architectures must provide the following interface to work with + * examples/can. + * + ************************************************************************************/ + +int can_devinit(void) +{ + static bool initialized = false; + struct can_dev_s *can; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) { + + /* Call imxrt_caninitialize() to get an instance of the CAN interface */ + + can = imxrt_can_initialize(CAN_PORT); + + if (can == NULL) { + canerr("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + + /* Register the CAN driver at "/dev/can0" */ + + ret = can_register("/dev/can0", can); + + if (ret < 0) { + canerr("ERROR: can_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#endif diff --git a/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_boot.c b/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_boot.c new file mode 100644 index 000000000000..6ef051e9e010 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_boot.c @@ -0,0 +1,64 @@ +/**************************************************************************** + * config/imxrt1060-evk/src/imxrt_flexspi_nor_boot.c + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Author: Ivan Ucherdzhiev + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "imxrt_flexspi_nor_boot.h" + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +__attribute__((section(".boot_hdr.ivt"))) +const struct ivt_s image_vector_table = { + IVT_HEADER, /* IVT Header */ + 0x60002000, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t) &image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +const struct boot_data_s boot_data = { + FLASH_BASE, /* boot start location */ + (FLASH_END - FLASH_BASE), /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; diff --git a/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_boot.h b/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_boot.h new file mode 100644 index 000000000000..ebc39e8d7354 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_boot.h @@ -0,0 +1,147 @@ +/**************************************************************************** + * config/imxrt1060-evk/src/imxrt_flexspi_nor_boot.h + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Authors: Ivan Ucherdzhiev + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_BOOT_H +#define __CONFIGS_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_BOOT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* IVT Data */ + +#define IVT_MAJOR_VERSION 0x4 +#define IVT_MAJOR_VERSION_SHIFT 0x4 +#define IVT_MAJOR_VERSION_MASK 0xf +#define IVT_MINOR_VERSION 0x1 +#define IVT_MINOR_VERSION_SHIFT 0x0 +#define IVT_MINOR_VERSION_MASK 0xf + +#define IVT_VERSION(major, minor) \ + ((((major) & IVT_MAJOR_VERSION_MASK) << IVT_MAJOR_VERSION_SHIFT) | \ + (((minor) & IVT_MINOR_VERSION_MASK) << IVT_MINOR_VERSION_SHIFT)) + +#define IVT_TAG_HEADER (0xd1) /* Image Vector Table */ +#define IVT_SIZE 0x2000 +#define IVT_PAR IVT_VERSION(IVT_MAJOR_VERSION, IVT_MINOR_VERSION) + +#define IVT_HEADER (IVT_TAG_HEADER | (IVT_SIZE << 8) | (IVT_PAR << 24)) +#define IVT_RSVD (uint32_t)(0x00000000) + +/* DCD Data */ + +#define DCD_TAG_HEADER (0xd2) +#define DCD_TAG_HEADER_SHIFT (24) +#define DCD_VERSION (0x40) +#define DCD_ARRAY_SIZE 1 + +#define FLASH_BASE 0x60000000 +#define FLASH_END 0x7f7fffff +#define SCLK 1 + +#define DCD_ADDRESS 0 +#define BOOT_DATA_ADDRESS &boot_data +#define CSF_ADDRESS 0 +#define PLUGIN_FLAG (uint32_t)0 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* IVT Data */ + +struct ivt_s { + /* Header with tag #HAB_TAG_IVT, length and HAB version fields + * (see data) + */ + + uint32_t hdr; + + /* Absolute address of the first instruction to execute from the + * image + */ + + uint32_t entry; + + /* Reserved in this version of HAB: should be NULL. */ + + uint32_t reserved1; + + /* Absolute address of the image DCD: may be NULL. */ + + uint32_t dcd; + + /* Absolute address of the Boot Data: may be NULL, but not interpreted + * any further by HAB + */ + + uint32_t boot_data; + + /* Absolute address of the IVT.*/ + + uint32_t self; + + /* Absolute address of the image CSF.*/ + + uint32_t csf; + + /* Reserved in this version of HAB: should be zero. */ + + uint32_t reserved2; +}; + +/* Boot Data */ + +struct boot_data_s { + uint32_t start; /* boot start location */ + uint32_t size; /* size */ + uint32_t plugin; /* plugin flag - 1 if downloaded application is plugin */ + uint32_t placeholder; /* placehoder to make even 0x10 size */ +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +extern const struct boot_data_s boot_data; + +#endif /* __CONFIGS_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_BOOT_H */ diff --git a/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_flash.c b/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_flash.c new file mode 100644 index 000000000000..44db12862860 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_flash.c @@ -0,0 +1,198 @@ +/**************************************************************************** + * config/imxrt1060-evk/src/imxrt_flexspi_nor_flash.c + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Authors: Ivan Ucherdzhiev + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/******************************************************************************* + * Included Files + ******************************************************************************/ + + +#include "imxrt_flexspi_nor_flash.h" + +/******************************************************************************* + * Public Data + ******************************************************************************/ + +#if defined (CONFIG_NXP_FMURT1062_V3_HYPER_FLASH) +__attribute__((section(".boot_hdr.conf"))) +const struct flexspi_nor_config_s flash_config = { + .mem_config = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .read_sample_clksrc = FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD, + .cs_hold_time = 3u, + .cs_setup_time = 3u, + .column_address_width = 3u, + + /* Enable DDR mode, Word addassable, Safe configuration, Differential clock */ + + .controller_misc_option = (1u << FLEXSPIMISC_OFFSET_DDR_MODE_EN) | + (1u << FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN) | + (1u << FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN) | + (1u << FLEXSPIMISC_OFFSET_DIFFCLKEN), + .sflash_pad_type = SERIAL_FLASH_8PADS, + .serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_133MHz, + .sflash_a1size = 64u * 1024u * 1024u, + .data_valid_time = {16u, 16u}, + .lookup_table = + { + /* Read LUTs */ + + FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18), + FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06), + FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0), + }, + }, + .page_size = 512u, + .sector_size = 256u * 1024u, + .blocksize = 256u * 1024u, + .is_uniform_blocksize = 1, +}; + +#elif defined (CONFIG_NXP_FMURT1062_V3_QSPI_FLASH) +__attribute__((section(".boot_hdr.conf"))) +const struct flexspi_nor_config_s flash_config = { + .mem_config = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .read_sample_clksrc = FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD, + .cs_hold_time = 3u, + .cs_setup_time = 3u, + .column_address_width = 0u, + .device_type = FLEXSPI_DEVICE_TYPE_SERIAL_NOR, + .sflash_pad_type = SERIAL_FLASH_4PADS, + .serial_clk_freq = FLEXSPI_SERIAL_CLKFREQ_60MHz, + .sflash_a1size = 8u * 1024u * 1024u, + .data_valid_time = {16u, 16u}, + .lookup_table = + { + /* LUTs */ + /* 0 Fast read Quad IO DTR Mode Operation in SPI Mode (normal read)*/ + + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xED, RADDR_DDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_DDR, FLEXSPI_4PAD, 0x0C, READ_DDR, FLEXSPI_4PAD, 0x08), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + + /* 1 Read Status */ + + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x1), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + + /* 2 */ + + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + + /* 3 */ + + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + + /* 4 */ + + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + + /* 5 Erase Sector */ + + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD7, RADDR_SDR, FLEXSPI_1PAD, 0x18), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + + /* 6 */ + + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + + /* 7 */ + + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + + /* 8 */ + + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + + /* 9 Page Program */ + + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18), + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x8, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + + /* 10 */ + + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + + /* 11 Chip Erase */ + + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xC7, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x0, STOP, FLEXSPI_1PAD, 0x0), + + }, + }, + + .page_size = 256u, + .sector_size = 4u * 1024u, + .blocksize = 32u * 1024u, + .is_uniform_blocksize = false, +}; +#else +# error Boot Flash type not chosen! +#endif diff --git a/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_flash.h b/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_flash.h new file mode 100644 index 000000000000..b99c135ea37a --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/imxrt_flexspi_nor_flash.h @@ -0,0 +1,349 @@ +/**************************************************************************** + * config/imxrt1060-evk/src/imxrt_flexspi_nor_flash.h + * + * Copyright (C) 2018 Gregory Nutt. All rights reserved. + * Authors: Ivan Ucherdzhiev + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_FLASH_H +#define __CONFIGS_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_FLASH_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* FLEXSPI memory config block related defintions */ + +#define FLEXSPI_CFG_BLK_TAG (0x42464346ul) +#define FLEXSPI_CFG_BLK_VERSION (0x56010400ul) +#define FLEXSPI_CFG_BLK_SIZE (512) + +/* FLEXSPI Feature related definitions */ + +#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1 + +/* Lookup table related defintions */ + +#define CMD_INDEX_READ 0 +#define CMD_INDEX_READSTATUS 1 +#define CMD_INDEX_WRITEENABLE 2 +#define CMD_INDEX_WRITE 4 + +#define CMD_LUT_SEQ_IDX_READ 0 +#define CMD_LUT_SEQ_IDX_READSTATUS 1 +#define CMD_LUT_SEQ_IDX_WRITEENABLE 3 +#define CMD_LUT_SEQ_IDX_WRITE 9 + +#define CMD_SDR 0x01 +#define CMD_DDR 0x21 +#define RADDR_SDR 0x02 +#define RADDR_DDR 0x22 +#define CADDR_SDR 0x03 +#define CADDR_DDR 0x23 +#define MODE1_SDR 0x04 +#define MODE1_DDR 0x24 +#define MODE2_SDR 0x05 +#define MODE2_DDR 0x25 +#define MODE4_SDR 0x06 +#define MODE4_DDR 0x26 +#define MODE8_SDR 0x07 +#define MODE8_DDR 0x27 +#define WRITE_SDR 0x08 +#define WRITE_DDR 0x28 +#define READ_SDR 0x09 +#define READ_DDR 0x29 +#define LEARN_SDR 0x0a +#define LEARN_DDR 0x2a +#define DATSZ_SDR 0x0b +#define DATSZ_DDR 0x2b +#define DUMMY_SDR 0x0c +#define DUMMY_DDR 0x2c +#define DUMMY_RWDS_SDR 0x0d +#define DUMMY_RWDS_DDR 0x2d +#define JMP_ON_CS 0x1f +#define STOP 0 + +#define FLEXSPI_1PAD 0 +#define FLEXSPI_2PAD 1 +#define FLEXSPI_4PAD 2 +#define FLEXSPI_8PAD 3 + +#define FLEXSPI_LUT_OPERAND0_MASK (0xffu) +#define FLEXSPI_LUT_OPERAND0_SHIFT (0U) +#define FLEXSPI_LUT_OPERAND0(x) (((uint32_t) \ + (((uint32_t)(x)) << FLEXSPI_LUT_OPERAND0_SHIFT)) & \ + FLEXSPI_LUT_OPERAND0_MASK) +#define FLEXSPI_LUT_NUM_PADS0_MASK (0x300u) +#define FLEXSPI_LUT_NUM_PADS0_SHIFT (8u) +#define FLEXSPI_LUT_NUM_PADS0(x) (((uint32_t) \ + (((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS0_SHIFT)) & \ + FLEXSPI_LUT_NUM_PADS0_MASK) +#define FLEXSPI_LUT_OPCODE0_MASK (0xfc00u) +#define FLEXSPI_LUT_OPCODE0_SHIFT (10u) +#define FLEXSPI_LUT_OPCODE0(x) (((uint32_t) \ + (((uint32_t)(x)) << FLEXSPI_LUT_OPCODE0_SHIFT)) & \ + FLEXSPI_LUT_OPCODE0_MASK) +#define FLEXSPI_LUT_OPERAND1_MASK (0xff0000u) +#define FLEXSPI_LUT_OPERAND1_SHIFT (16U) +#define FLEXSPI_LUT_OPERAND1(x) (((uint32_t) \ + (((uint32_t)(x)) << FLEXSPI_LUT_OPERAND1_SHIFT)) & \ + FLEXSPI_LUT_OPERAND1_MASK) +#define FLEXSPI_LUT_NUM_PADS1_MASK (0x3000000u) +#define FLEXSPI_LUT_NUM_PADS1_SHIFT (24u) +#define FLEXSPI_LUT_NUM_PADS1(x) (((uint32_t) \ + (((uint32_t)(x)) << FLEXSPI_LUT_NUM_PADS1_SHIFT)) & \ + FLEXSPI_LUT_NUM_PADS1_MASK) +#define FLEXSPI_LUT_OPCODE1_MASK (0xfc000000u) +#define FLEXSPI_LUT_OPCODE1_SHIFT (26u) +#define FLEXSPI_LUT_OPCODE1(x) (((uint32_t)(((uint32_t)(x)) << FLEXSPI_LUT_OPCODE1_SHIFT)) & \ + FLEXSPI_LUT_OPCODE1_MASK) + +#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) \ + (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | \ + FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \ + FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + +/* */ + +#define NOR_CMD_INDEX_READ CMD_INDEX_READ +#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS +#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE +#define NOR_CMD_INDEX_ERASESECTOR 3 +#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE +#define NOR_CMD_INDEX_CHIPERASE 5 +#define NOR_CMD_INDEX_DUMMY 6 +#define NOR_CMD_INDEX_ERASEBLOCK 7 + +/* READ LUT sequence id in lookupTable stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ + +/* Read Status LUT sequence id in lookupTable stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS CMD_LUT_SEQ_IDX_READSTATUS + +/* 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI 2 + +/* 3 Write Enable sequence id in lookupTable stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE CMD_LUT_SEQ_IDX_WRITEENABLE + +/* 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI 4 + +/* 5 Erase Sector sequence id in lookupTable stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 + +/* 8 Erase Block sequence id in lookupTable stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8 + +/* 9 Program sequence id in lookupTable stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM CMD_LUT_SEQ_IDX_WRITE + +/* 11 Chip Erase sequence in lookupTable id stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 + +/* 13 Read SFDP sequence in lookupTable id stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 + +/* 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */ + +#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD 14 + +/* 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk */ + +#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD 15 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* Definitions for FlexSPI Serial Clock Frequency */ + +enum flexspi_serial_clkfreq_e { + FLEXSPI_SERIAL_CLKFREQ_30MHz = 1, + FLEXSPI_SERIAL_CLKFREQ_50MHz = 2, + FLEXSPI_SERIAL_CLKFREQ_60MHz = 3, + FLEXSPI_SERIAL_CLKFREQ_75MHz = 4, + FLEXSPI_SERIAL_CLKFREQ_80MHz = 5, + FLEXSPI_SERIAL_CLKFREQ_100MHz = 6, + FLEXSPI_SERIAL_CLKFREQ_133MHz = 7, + FLEXSPI_SERIAL_CLKFREQ_166MHz = 8, + FLEXSPI_SERIAL_CLKFREQ_200MHz = 9, +}; + +/* FlexSPI clock configuration type*/ + +enum flexspi_serial_clockmode_e { + FLEXSPI_CLKMODE_SDR, + FLEXSPI_CLKMODE_DDR, +}; + +/* FlexSPI Read Sample Clock Source definition */ + +enum flash_read_sample_clk_e { + FLASH_READ_SAMPLE_CLK_LOOPBACK_INTERNELLY = 0, + FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_DQSPAD = 1, + FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD = 2, + FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD = 3, +}; + +/* Misc feature bit definitions */ + +enum flash_misc_feature_e { + FLEXSPIMISC_OFFSET_DIFFCLKEN = 0, /* Bit for Differential clock enable */ + FLEXSPIMISC_OFFSET_CK2EN = 1, /* Bit for CK2 enable */ + FLEXSPIMISC_OFFSET_PARALLELEN = 2, /* Bit for Parallel mode enable */ + FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN = 3, /* Bit for Word Addressable enable */ + FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN = 4, /* Bit for Safe Configuration Frequency enable */ + FLEXSPIMISC_OFFSET_PAD_SETTING_OVERRIDE_EN = 5, /* Bit for Pad setting override enable */ + FLEXSPIMISC_OFFSET_DDR_MODE_EN = 6, /* Bit for DDR clock confiuration indication. */ +}; + +/* Flash Type Definition */ + +enum flash_flash_type_e { + FLEXSPI_DEVICE_TYPE_SERIAL_NOR = 1, /* Flash devices are Serial NOR */ + FLEXSPI_DEVICE_TYPE_SERIAL_NAND = 2, /* Flash devices are Serial NAND */ + FLEXSPI_DEVICE_TYPE_SERIAL_RAM = 3, /* Flash devices are Serial RAM/HyperFLASH */ + FLEXSPI_DEVICE_TYPE_MCP_NOR_NAND = 0x12, /* Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND */ + FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs */ +}; + +/* Flash Pad Definitions */ + +enum flash_flash_pad_e { + SERIAL_FLASH_1PAD = 1, + SERIAL_FLASH_2PADS = 2, + SERIAL_FLASH_4PADS = 4, + SERIAL_FLASH_8PADS = 8, +}; + +/* Flash Configuration Command Type */ + +enum flash_config_cmd_e { + DEVICE_CONFIG_CMD_TYPE_GENERIC, /* Generic command, for example: configure dummy cycles, drive strength, etc */ + DEVICE_CONFIG_CMD_TYPE_QUADENABLE, /* Quad Enable command */ + DEVICE_CONFIG_CMD_TYPE_SPI2XPI, /* Switch from SPI to DPI/QPI/OPI mode */ + DEVICE_CONFIG_CMD_TYPE_XPI2SPI, /* Switch from DPI/QPI/OPI to SPI mode */ + DEVICE_CONFIG_CMD_TYPE_SPI2NO_CMD, /* Switch to 0-4-4/0-8-8 mode */ + DEVICE_CONFIG_CMD_TYPE_RESET, /* Reset device command */ +}; + +/* FlexSPI LUT Sequence structure */ + +struct flexspi_lut_seq_s { + uint8_t seq_num; /* Sequence Number, valid number: 1-16 */ + uint8_t seq_id; /* Sequence Index, valid number: 0-15 */ + uint16_t reserved; +}; + +/* FlexSPI Memory Configuration Block */ + +struct flexspi_mem_config_s { + uint32_t tag; + uint32_t version; + uint32_t reserved0; + uint8_t read_sample_clksrc; + uint8_t cs_hold_time; + uint8_t cs_setup_time; + uint8_t column_address_width; /* [0x00f-0x00f] Column Address with, for + * HyperBus protocol, it is fixed to 3, For + * Serial NAND, need to refer to datasheet */ + uint8_t device_mode_cfg_enable; + uint8_t device_mode_type; + uint16_t wait_time_cfg_commands; + struct flexspi_lut_seq_s device_mode_seq; + uint32_t device_mode_arg; + uint8_t config_cmd_enable; + uint8_t config_mode_type[3]; + struct flexspi_lut_seq_s config_cmd_seqs[3]; + uint32_t reserved1; + uint32_t config_cmd_args[3]; + uint32_t reserved2; + uint32_t controller_misc_option; + uint8_t device_type; + uint8_t sflash_pad_type; + uint8_t serial_clk_freq; + uint8_t lut_custom_seq_enable; + uint32_t reserved3[2]; + uint32_t sflash_a1size; + uint32_t sflash_a2size; + uint32_t sflash_b1size; + uint32_t sflash_b2size; + uint32_t cspad_setting_override; + uint32_t sclkpad_setting_override; + uint32_t datapad_setting_override; + uint32_t dqspad_setting_override; + uint32_t timeout_in_ms; + uint32_t command_interval; + uint16_t data_valid_time[2]; + uint16_t busy_offset; + uint16_t busybit_polarity; + uint32_t lookup_table[64]; + struct flexspi_lut_seq_s lut_customseq[12]; + uint32_t reserved4[4]; +}; + +/* Serial NOR configuration block */ + +struct flexspi_nor_config_s { + struct flexspi_mem_config_s mem_config; /* Common memory configuration info via FlexSPI */ + uint32_t page_size; /* Page size of Serial NOR */ + uint32_t sector_size; /* Sector size of Serial NOR */ + uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */ + uint8_t is_uniform_blocksize; /* Sector/Block size is the same */ + uint8_t reserved0[2]; /* Reserved for future use */ + uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */ + uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other IP command */ + uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read command: true/false */ + uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP commmand execution */ + uint32_t blocksize; /* Block size */ + uint32_t reserve2[11]; /* Reserved for future use */ +}; + +#endif /* __CONFIGS_IMXRT1060_EVK_SRC_IMXRT_FLEXSPI_NOR_FLASH_H */ diff --git a/boards/nxp/fmurt1062-v1/src/init.c b/boards/nxp/fmurt1062-v1/src/init.c new file mode 100644 index 000000000000..982321015d61 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/init.c @@ -0,0 +1,350 @@ +/**************************************************************************** + * + * Copyright (c) 2018-2019 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file init.c + * + * NXP imxrt1062-v1 specific early startup code. This file implements the + * board_app_initialize() function that is called early by nsh during startup. + * + * Code here is run before the rcS script is invoked; it should start required + * subsystems and perform board-specific initialization. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include +#include "board_config.h" + +#include + +#include + +#include +#include + +#include + +#include + +#include "up_internal.h" + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* + * Ideally we'd be able to get these from up_internal.h, + * but since we want to be able to disable the NuttX use + * of leds for system indication at will and there is no + * separate switch, we need to build independent of the + * CONFIG_ARCH_LEDS configuration switch. + */ +__BEGIN_DECLS +extern void led_init(void); +extern void led_on(int led); +extern void led_off(int led); +__END_DECLS + +/************************************************************************************ + * Name: board_rc_input + * + * Description: + * All boards my optionally provide this API to invert the Serial RC input. + * This is needed on SoCs that support the notion RXINV or TXINV as apposed to + * and external XOR controlled by a GPIO + * + ************************************************************************************/ + +__EXPORT void board_rc_input(bool invert_on, uint32_t uxart_base) +{ + + irqstate_t irqstate = px4_enter_critical_section(); + + uint32_t cr = getreg32(IMXRT_LPUART_CTRL_OFFSET + uxart_base); + uint32_t sr = getreg32(IMXRT_LPUART_STAT_OFFSET + uxart_base); + uint32_t regval = cr; + + /* RXINV bit field can only be written when the receiver is disabled (RE=0). */ + + regval &= ~LPUART_CTRL_RE; + + putreg32(regval, IMXRT_LPUART_CTRL_OFFSET + uxart_base); + + if (invert_on) { + cr |= LPUART_CTRL_TXINV; + sr |= LPUART_STAT_RXINV; + + } else { + cr &= ~LPUART_CTRL_TXINV; + sr &= ~LPUART_STAT_RXINV; + } + + putreg32(sr, IMXRT_LPUART_STAT_OFFSET + uxart_base); + putreg32(cr, IMXRT_LPUART_CTRL_OFFSET + uxart_base); + + leave_critical_section(irqstate); +} + +/************************************************************************************ + * Name: board_peripheral_reset + * + * Description: + * + ************************************************************************************/ +__EXPORT void board_peripheral_reset(int ms) +{ + /* set the peripheral rails off */ + + VDD_5V_PERIPH_EN(false); + VDD_3V3_SENSORS_EN(false); + + /* wait for the peripheral rail to reach GND */ + usleep(ms * 1000); + syslog(LOG_DEBUG, "reset done, %d ms", ms); + + /* re-enable power */ + + /* switch the peripheral rail back on */ + VDD_3V3_SENSORS_EN(true); + VDD_5V_PERIPH_EN(true); + +} +/************************************************************************************ + * Name: board_on_reset + * + * Description: + * Optionally provided function called on entry to board_system_reset + * It should perform any house keeping prior to the rest. + * + * status - 1 if resetting to boot loader + * 0 if just resetting + * + ************************************************************************************/ + +__EXPORT void board_on_reset(int status) +{ + /* configure the GPIO pins to outputs and keep them low */ + + const uint32_t gpio[] = PX4_GPIO_PWM_INIT_LIST; + board_gpio_init(gpio, arraySize(gpio)); + + if (status >= 0) { + up_mdelay(6); + } +} + +/**************************************************************************** + * Name: imxrt_boardinitialize + * + * Description: + * All i.MX RT architectures must provide the following entry point. This + * entry point is called early in the initialization -- after clocking and + * memory have been configured but before caches have been enabled and + * before any devices have been initialized. + * + ****************************************************************************/ + +__EXPORT void imxrt_boardinitialize(void) +{ + board_on_reset(-1); /* Reset PWM first thing */ + + /* configure LEDs */ + + board_autoled_initialize(); + + /* configure pins */ + + const uint32_t gpio[] = PX4_GPIO_INIT_LIST; + board_gpio_init(gpio, arraySize(gpio)); + + /* configure SPI interfaces */ + + imxrt_spidev_initialize(); + + imxrt_usb_initialize(); + + fmurt1062_timer_initialize(); +} + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +__EXPORT int board_app_initialize(uintptr_t arg) +{ + + /* Power on Interfaces */ + + VDD_3V3_SD_CARD_EN(true); + VDD_5V_PERIPH_EN(true); + VDD_5V_HIPOWER_EN(true); + VDD_3V3_SENSORS_EN(true); + + if (OK == board_determine_hw_info()) { + syslog(LOG_INFO, "[boot] Rev 0x%1x : Ver 0x%1x %s\n", board_get_hw_revision(), board_get_hw_version(), + board_get_hw_type_name()); + + } else { + syslog(LOG_ERR, "[boot] Failed to read HW revision and version\n"); + } + + + px4_platform_init(); + + /* configure the DMA allocator */ + + if (board_dma_alloc_init() < 0) { + PX4_ERR("DMA alloc FAILED"); + } + + /* set up the serial DMA polling */ +#ifdef SERIAL_HAVE_DMA + static struct hrt_call serial_dma_call; + struct timespec ts; + + /* + * Poll at 1ms intervals for received bytes that have not triggered + * a DMA event. + */ + ts.tv_sec = 0; + ts.tv_nsec = 1000000; + + hrt_call_every(&serial_dma_call, + ts_to_abstime(&ts), + ts_to_abstime(&ts), + (hrt_callout)imxrt_serial_dma_poll, + NULL); +#endif + + /* initial LED state */ + drv_led_start(); + led_off(LED_RED); + led_off(LED_GREEN); + led_off(LED_BLUE); + +#if defined(ON_EVK_SDIO) && defined(CONFIG_IMXRT_USDHC) + int ret = fmurt1062_usdhc_initialize(); + + if (ret != OK) { + board_autoled_on(LED_RED); + return ret; + } + +#endif +#if defined(ON_EVK_SPI) + /* Configure SPI-based devices */ + + ret = imxrt1062_spi_bus_initialize(); + + if (ret != OK) { + board_autoled_on(LED_RED); + return ret + } + +#endif + + return OK; +} + +// USB Stubs +#include +void up_usbinitialize(void) +{ +} + +int usbdev_register(struct usbdevclass_driver_s *driver) +{ + return -EINVAL; +} +int usbdev_unregister(struct usbdevclass_driver_s *driver) +{ + return -EINVAL; +} + +#if defined(ON_EVK) +# if !defined(CONFIG_IMXRT_LPI2C) +FAR struct i2c_master_s *imxrt_i2cbus_initialize(int port) +{ + return 0; +} +int imxrt_i2cbus_uninitialize(FAR struct i2c_master_s *dev) +{ + return 0; +} +# endif +#endif diff --git a/boards/nxp/fmurt1062-v1/src/led.c b/boards/nxp/fmurt1062-v1/src/led.c new file mode 100644 index 000000000000..a03d51778283 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/led.c @@ -0,0 +1,115 @@ +/**************************************************************************** + * + * Copyright (c) 2016, 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file led.c + * + * NXP fmurt1062-v1 LED backend. + */ + +#include + +#include + +#include "chip.h" +#include +#include "board_config.h" + +#include + +/* + * Ideally we'd be able to get these from up_internal.h, + * but since we want to be able to disable the NuttX use + * of leds for system indication at will and there is no + * separate switch, we need to build independent of the + * CONFIG_ARCH_LEDS configuration switch. + */ +__BEGIN_DECLS +extern void led_init(void); +extern void led_on(int led); +extern void led_off(int led); +extern void led_toggle(int led); +__END_DECLS + + +static uint32_t g_ledmap[] = { + 0, // Indexed by LED_BLUE + GPIO_nLED_RED, // Indexed by LED_RED, LED_AMBER + GPIO_LED_SAFETY, // Indexed by LED_SAFETY + GPIO_nLED_GREEN, // Indexed by LED_GREEN +}; + +__EXPORT void led_init(void) +{ + /* Configure LED GPIOs for output */ + for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) { + if (g_ledmap[l] != 0) { + imxrt_config_gpio(g_ledmap[l]); + } + } +} + +static void phy_set_led(int led, bool state) +{ + /* Drive High to switch on */ + + if (g_ledmap[led] != 0) { + imxrt_gpio_write(g_ledmap[led], state); + } +} + +static bool phy_get_led(int led) +{ + + if (g_ledmap[led] != 0) { + return imxrt_gpio_read(g_ledmap[led]); + } + + return false; +} + +__EXPORT void led_on(int led) +{ + phy_set_led(led, true); +} + +__EXPORT void led_off(int led) +{ + phy_set_led(led, false); +} + +__EXPORT void led_toggle(int led) +{ + + phy_set_led(led, !phy_get_led(led)); +} diff --git a/boards/nxp/fmurt1062-v1/src/manifest.c b/boards/nxp/fmurt1062-v1/src/manifest.c new file mode 100644 index 000000000000..a8b77fcd585a --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/manifest.c @@ -0,0 +1,157 @@ +/**************************************************************************** + * + * Copyright (c) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file manifest.c + * + * This module supplies the interface to the manifest of hardware that is + * optional and dependent on the HW REV and HW VER IDs + * + * The manifest allows the system to know whether a hardware option + * say for example the PX4IO is an no-pop option vs it is broken. + * + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include "systemlib/px4_macros.h" +#include "px4_log.h" + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +typedef struct { + uint32_t hw_ver_rev; /* the version and revision */ + const px4_hw_mft_item_t *mft; /* The first entry */ + uint32_t entries; /* the lenght of the list */ +} px4_hw_mft_list_entry_t; + +typedef px4_hw_mft_list_entry_t *px4_hw_mft_list_entry; +#define px4_hw_mft_list_uninitialized (px4_hw_mft_list_entry) -1 + +static const px4_hw_mft_item_t device_unsupported = {0, 0, 0}; + +// List of components on a specific board configuration +// The index of those components is given by the enum (px4_hw_mft_item_id_t) +// declared in board_common.h +static const px4_hw_mft_item_t hw_mft_list_v0500[] = { + { + .present = 1, + .mandatory = 1, + .connection = px4_hw_con_onboard, + }, +}; + +static const px4_hw_mft_item_t hw_mft_list_v0540[] = { + { + .present = 0, + .mandatory = 0, + .connection = px4_hw_con_unknown, + }, +}; + +static px4_hw_mft_list_entry_t mft_lists[] = { + {0x0000, hw_mft_list_v0500, arraySize(hw_mft_list_v0500)}, + {0x0400, hw_mft_list_v0540, arraySize(hw_mft_list_v0540)}, +#if defined(ON_EVK) + {0x0804, hw_mft_list_v0540, arraySize(hw_mft_list_v0540)}, + {0x0807, hw_mft_list_v0540, arraySize(hw_mft_list_v0540)}, + {0x0404, hw_mft_list_v0540, arraySize(hw_mft_list_v0540)}, +#endif + +}; + + +/************************************************************************************ + * Name: board_rc_input + * + * Description: + * All boards my optionally provide this API to invert the Serial RC input. + * This is needed on SoCs that support the notion RXINV or TXINV as opposed to + * and external XOR controlled by a GPIO + * + ************************************************************************************/ +__EXPORT bool board_supports_single_wire(uint32_t uxart_base) +{ + return uxart_base == RC_UXART_BASE; +} + +/************************************************************************************ + * Name: board_query_manifest + * + * Description: + * Optional returns manifest item. + * + * Input Parameters: + * manifest_id - the ID for the manifest item to retrieve + * + * Returned Value: + * 0 - item is not in manifest => assume legacy operations + * pointer to a manifest item + * + ************************************************************************************/ + +__EXPORT px4_hw_mft_item board_query_manifest(px4_hw_mft_item_id_t id) +{ + static px4_hw_mft_list_entry boards_manifest = px4_hw_mft_list_uninitialized; + + if (boards_manifest == px4_hw_mft_list_uninitialized) { + uint32_t ver_rev = board_get_hw_version() << 8; + ver_rev |= board_get_hw_revision(); + + for (unsigned i = 0; i < arraySize(mft_lists); i++) { + if (mft_lists[i].hw_ver_rev == ver_rev) { + boards_manifest = &mft_lists[i]; + break; + } + } + + if (boards_manifest == px4_hw_mft_list_uninitialized) { + PX4_ERR("Board %4x is not supported!", ver_rev); + } + } + + px4_hw_mft_item rv = &device_unsupported; + + if (boards_manifest != px4_hw_mft_list_uninitialized && + id < boards_manifest->entries) { + rv = &boards_manifest->mft[id]; + } + + return rv; +} diff --git a/boards/nxp/fmurt1062-v1/src/sdhc.c b/boards/nxp/fmurt1062-v1/src/sdhc.c new file mode 100644 index 000000000000..75e010ea602b --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/sdhc.c @@ -0,0 +1,127 @@ +/**************************************************************************** + * + * Copyright (C) 2016-2018 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ +/* A micro Secure Digital (SD) card slot is available on the board connected to + * the SD Host Controller (USDHC1) signals of the MCU. This slot will accept + * micro format SD memory cards. + * + * ------------ ------------- -------- + * SD Card Slot Board Signal IMXRT Pin + * ------------ ------------- -------- + * DAT0 USDHC1_DATA0 GPIO_SD_B0_02 + * DAT1 USDHC1_DATA1 GPIO_SD_B0_03 + * DAT2 USDHC1_DATA2 GPIO_SD_B0_04 + * CD/DAT3 USDHC1_DATA3 GPIO_SD_B0_05 + * CMD USDHC1_CMD GPIO_SD_B0_00 + * CLK USDHC1_CLK GPIO_SD_B0_01 + * ------------ ------------- -------- + * + * There are no Write Protect or Card detection pins available to the IMXRT. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "imxrt_usdhc.h" + +#include "board_config.h" + +#ifdef CONFIG_IMXRT_USDHC +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/**************************************************************************** + * Private Data + ****************************************************************************/ +/**************************************************************************** + * Private Functions + ****************************************************************************/ +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: fmurt1062_usdhc_initialize + * + * Description: + * Inititialize the SDHC SD card slot + * + ****************************************************************************/ + +int fmurt1062_usdhc_initialize(void) +{ + int ret; + + /* Mount the SDHC-based MMC/SD block driver */ + /* First, get an instance of the SDHC interface */ + + struct sdio_dev_s *sdhc = imxrt_usdhc_initialize(CONFIG_NSH_MMCSDSLOTNO); + + if (!sdhc) { + PX4_ERR("ERROR: Failed to initialize SDHC slot %d\n", CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDHC interface to the MMC/SD driver */ + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, sdhc); + + if (ret != OK) { + PX4_ERR("ERROR: Failed to bind SDHC to the MMC/SD driver: %d\n", ret); + return ret; + } + + syslog(LOG_INFO, "Successfully bound SDHC to the MMC/SD driver\n"); + + return OK; +} +#endif /* CONFIG_IMXRT_USDHC */ diff --git a/boards/nxp/fmurt1062-v1/src/spi.c b/boards/nxp/fmurt1062-v1/src/spi.c new file mode 100644 index 000000000000..49c06ed492c6 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/spi.c @@ -0,0 +1,413 @@ +/************************************************************************************ + * + * Copyright (C) 2016, 2018 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include +#include +#include "imxrt_lpspi.h" +#include "imxrt_gpio.h" +#include "board_config.h" +#include + +#if defined(CONFIG_IMXRT_LPSPI1) || defined(CONFIG_IMXRT_LPSPI2) || \ + defined(CONFIG_IMXRT_LPSPI3) || defined(CONFIG_IMXRT_LPSPI4) + +/* Define CS GPIO array */ + +#if defined(CONFIG_IMXRT_LPSPI1) +static const uint32_t spi1selects_gpio[] = PX4_SENSOR_BUS_CS_GPIO; +#endif +#if defined(CONFIG_IMXRT_LPSPI2) +static const uint32_t spi2selects_gpio[] = PX4_MEMORY_BUS_CS_GPIO; +#endif +#if defined(CONFIG_IMXRT_LPSPI3) +static const uint32_t spi3selects_gpio[] = PX4_BARO_BUS_CS_GPIO; +#endif +#if defined(CONFIG_IMXRT_LPSPI4) +static const uint32_t spi4selects_gpio[] = PX4_EXTERNAL1_BUS_CS_GPIO; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +/************************************************************************************ + * Name: fmurt1062_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the NXP FMUKRT1062-V1 board. + * + ************************************************************************************/ + +void imxrt_spidev_initialize(void) +{ +#if defined(CONFIG_IMXRT_LPSPI1) + board_gpio_init(spi1selects_gpio, arraySize(spi1selects_gpio)); +#endif +#if defined(CONFIG_IMXRT_LPSPI2) + board_gpio_init(spi2selects_gpio, arraySize(spi2selects_gpio)); +#endif +#if defined(CONFIG_IMXRT_LPSPI3) + board_gpio_init(spi3selects_gpio, arraySize(spi3selects_gpio)); +#endif +#if defined(CONFIG_IMXRT_LPSPI4) + board_gpio_init(spi4selects_gpio, arraySize(spi4selects_gpio)); +#endif +} + +/************************************************************************************ + * Name: imxrt_spi_bus_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the NXP FMUKRT1062-V1 board. + * + ************************************************************************************/ +static struct spi_dev_s *spi_sensors; +static struct spi_dev_s *spi_memory; +static struct spi_dev_s *spi_baro; +static struct spi_dev_s *spi_ext; + +__EXPORT int imxrt1062_spi_bus_initialize(void) +{ + /* Configure SPI-based devices */ + + spi_sensors = px4_spibus_initialize(PX4_SPI_BUS_SENSORS); + + if (!spi_sensors) { + PX4_ERR("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_SENSORS); + return -ENODEV; + } + + /* Default PX4_SPI_BUS_SENSORS to 1MHz and de-assert the known chip selects. + */ + + SPI_SETFREQUENCY(spi_sensors, 1 * 1000 * 1000); + SPI_SETBITS(spi_sensors, 8); + SPI_SETMODE(spi_sensors, SPIDEV_MODE3); + + for (int cs = PX4_SENSORS_BUS_FIRST_CS; cs <= PX4_SENSORS_BUS_LAST_CS; cs++) { + SPI_SELECT(spi_sensors, cs, false); + } + + /* Get the SPI port for the Memory */ + + spi_memory = px4_spibus_initialize(PX4_SPI_BUS_MEMORY); + + if (!spi_memory) { + PX4_ERR("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_MEMORY); + return -ENODEV; + } + + /* Default PX4_SPI_BUS_MEMORY to 12MHz and de-assert the known chip selects. + */ + + SPI_SETFREQUENCY(spi_memory, 12 * 1000 * 1000); + SPI_SETBITS(spi_memory, 8); + SPI_SETMODE(spi_memory, SPIDEV_MODE3); + + for (int cs = PX4_MEMORY_BUS_FIRST_CS; cs <= PX4_MEMORY_BUS_LAST_CS; cs++) { + SPI_SELECT(spi_memory, cs, false); + } + + /* Get the SPI port for the BARO */ + + spi_ext = px4_spibus_initialize(PX4_SPI_BUS_BARO); + + if (!spi_baro) { + PX4_ERR("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_BARO); + return -ENODEV; + } + + /* MS5611 has max SPI clock speed of 20MHz + */ + + SPI_SETFREQUENCY(spi_baro, 20 * 1000 * 1000); + SPI_SETBITS(spi_baro, 8); + SPI_SETMODE(spi_baro, SPIDEV_MODE3); + + for (int cs = PX4_BARO_BUS_FIRST_CS; cs <= PX4_BARO_BUS_LAST_CS; cs++) { + SPI_SELECT(spi_baro, cs, false); + } + + /* Get the SPI port for the PX4_SPI_EXTERNAL1 */ + + spi_ext = px4_spibus_initialize(PX4_SPI_BUS_EXTERNAL1); + + if (!spi_ext) { + PX4_ERR("[boot] FAILED to initialize SPI port %d\n", PX4_SPI_BUS_EXTERNAL1); + return -ENODEV; + } + + /* Default PX4_SPI_BUS_SENSORS to 1MHz and de-assert the known chip selects. + */ + + SPI_SETFREQUENCY(spi_ext, 8 * 1000 * 1000); + SPI_SETBITS(spi_ext, 8); + SPI_SETMODE(spi_ext, SPIDEV_MODE3); + + for (int cs = PX4_EXTERNAL1_BUS_FIRST_CS; cs <= PX4_EXTERNAL1_BUS_LAST_CS; cs++) { + SPI_SELECT(spi_ext, cs, false); + } + + return OK; + +} + +/**************************************************************************** + * Name: imxrt_lpspi1/2/3select and imxrt_lpspi1/2/3status + * + * Description: + * The external functions, imxrt_lpspi1/2/3select and imxrt_lpspi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including imxrt_lpspibus_initialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in imxrt_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide imxrt_lpspi1/2/3select() and imxrt_lpspi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to imxrt_lpspibus_initialize() in your low level application + * initialization logic + * 4. The handle returned by imxrt_lpspibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#if defined(CONFIG_IMXRT_LPSPI1) +__EXPORT void imxrt_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected) +{ + /* SPI select is active low, so write !selected to select the device */ + + int sel = (int) devid; + ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_SENSORS); + + /* Making sure the other peripherals are not selected */ + + for (size_t cs = 0; arraySize(spi1selects_gpio) > 1 && cs < arraySize(spi1selects_gpio); cs++) { + if (spi1selects_gpio[cs] != 0) { + imxrt_gpio_write(spi1selects_gpio[cs], 1); + } + } + + uint32_t gpio = spi1selects_gpio[PX4_SPI_DEV_ID(sel)]; + + if (gpio) { + imxrt_gpio_write(gpio, !selected); + } +} + +__EXPORT uint8_t imxrt_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#if defined(CONFIG_IMXRT_LPSPI2) +__EXPORT void imxrt_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected) +{ + /* SPI select is active low, so write !selected to select the device */ + + int sel = (int) devid; + + if (devid == SPIDEV_FLASH(0)) { + sel = PX4_SPIDEV_MEMORY; + } + + ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_MEMORY); + + /* Making sure the other peripherals are not selected */ + + for (int cs = 0; arraySize(spi2selects_gpio) > 1 && cs < arraySize(spi2selects_gpio); cs++) { + if (spi2selects_gpio[cs] != 0) { + imxrt_gpio_write(spi2selects_gpio[cs], 1); + } + } + + uint32_t gpio = spi2selects_gpio[PX4_SPI_DEV_ID(sel)]; + + if (gpio) { + imxrt_gpio_write(gpio, !selected); + } +} + +__EXPORT uint8_t imxrt_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#if defined(CONFIG_IMXRT_LPSPI3) +__EXPORT void imxrt_lpspi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected) +{ + /* SPI select is active low, so write !selected to select the device */ + + int sel = (int) devid; + ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_BARO); + + /* Making sure the other peripherals are not selected */ + + for (int cs = 0; arraySize(spi3selects_gpio) > 1 && cs < arraySize(spi3selects_gpio); cs++) { + if (spi3selects_gpio[cs] != 0) { + imxrt_gpio_write(spi3selects_gpio[cs], 1); + } + } + + uint32_t gpio = spi3selects_gpio[PX4_SPI_DEV_ID(sel)]; + + if (gpio) { + imxrt_gpio_write(gpio, !selected); + } +} + +__EXPORT uint8_t imxrt_lpspi3status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +#if defined(CONFIG_IMXRT_LPSPI4) +__EXPORT void imxrt_lpspi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected) +{ + int sel = (int) devid; + + ASSERT(PX4_SPI_BUS_ID(sel) == PX4_SPI_BUS_BARO); + + /* Making sure the other peripherals are not selected */ + for (size_t cs = 0; arraySize(spi4selects_gpio) > 1 && cs < arraySize(spi4selects_gpio); cs++) { + imxrt_gpio_write(spi4selects_gpio[cs], 1); + } + + uint32_t gpio = spi4selects_gpio[PX4_SPI_DEV_ID(sel)]; + + if (gpio) { + imxrt_gpio_write(gpio, !selected); + } +} + +__EXPORT uint8_t imxrt_lpspi4status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return SPI_STATUS_PRESENT; +} +#endif + +/************************************************************************************ + * Name: board_spi_reset + * + * Description: + * + * + ************************************************************************************/ + +__EXPORT void board_spi_reset(int ms) +{ +#ifdef CONFIG_IMXRT_LPSPI1 + + /* Goal not to back feed the chips on the bus via IO lines */ + for (size_t cs = 0; arraySize(spi1selects_gpio) > 1 && cs < arraySize(spi1selects_gpio); cs++) { + if (spi1selects_gpio[cs] != 0) { + imxrt_config_gpio(_PIN_OFF(spi1selects_gpio[cs])); + } + } + + imxrt_config_gpio(GPIO_SPI1_SCK_OFF); + imxrt_config_gpio(GPIO_SPI1_MISO_OFF); + imxrt_config_gpio(GPIO_SPI1_MOSI_OFF); + + +# if BOARD_USE_DRDY + imxrt_config_gpio(GPIO_DRDY_OFF_SPI1_DRDY1_ICM20689); + imxrt_config_gpio(GPIO_DRDY_OFF_SPI1_DRDY2_BMI055_GYRO); + imxrt_config_gpio(GPIO_DRDY_OFF_SPI1_DRDY3_BMI055_ACC); + imxrt_config_gpio(GPIO_DRDY_OFF_SPI1_DRDY4_ICM20602); + imxrt_config_gpio(GPIO_DRDY_OFF_SPI1_DRDY5_BMI055_GYRO); + imxrt_config_gpio(GPIO_DRDY_OFF_SPI1_DRDY6_BMI055_ACC); +# endif + /* set the sensor rail off */ + imxrt_gpio_write(GPIO_VDD_3V3_SENSORS_EN, 0); + + /* wait for the sensor rail to reach GND */ + usleep(ms * 1000); + warnx("reset done, %d ms", ms); + + /* re-enable power */ + + /* switch the sensor rail back on */ + imxrt_gpio_write(GPIO_VDD_3V3_SENSORS_EN, 1); + + /* wait a bit before starting SPI, different times didn't influence results */ + usleep(100); + + /* reconfigure the SPI pins */ + for (size_t cs = 0; arraySize(spi1selects_gpio) > 1 && cs < arraySize(spi1selects_gpio); cs++) { + if (spi1selects_gpio[cs] != 0) { + imxrt_config_gpio(spi1selects_gpio[cs]); + } + } + + imxrt_config_gpio(GPIO_LPSPI1_SCK); + imxrt_config_gpio(GPIO_LPSPI1_MISO); + imxrt_config_gpio(GPIO_LPSPI1_MOSI); + +# if BOARD_USE_DRDY + imxrt_config_gpio(GPIO_SPI1_DRDY1_ICM20689); + imxrt_config_gpio(GPIO_SPI1_DRDY2_BMI055_GYRO); + imxrt_config_gpio(GPIO_SPI1_DRDY3_BMI055_ACC); + imxrt_config_gpio(GPIO_SPI1_DRDY4_ICM20602); + imxrt_config_gpio(GPIO_SPI1_DRDY5_BMI055_GYRO); + imxrt_config_gpio(GPIO_SPI1_DRDY6_BMI055_ACC); +# endif +#endif /* CONFIG_IMXRT_LPSPI1 */ + +} + +#endif /* CONFIG_IMXRT_LPSPI1 || CONFIG_IMXRT_LPSPI2 || CONFIG_IMXRT_LPSPI3 || CONFIG_IMXRT_LPSPI4 */ diff --git a/boards/nxp/fmurt1062-v1/src/timer_config.c b/boards/nxp/fmurt1062-v1/src/timer_config.c new file mode 100644 index 000000000000..f17ed6e46f8c --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/timer_config.c @@ -0,0 +1,250 @@ +/**************************************************************************** + * + * Copyright (C) 2016, 2018-2019 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* + * @file timer_config.c + * + * Configuration data for the imxrt pwm_servo, input capture and pwm input driver. + * + * Note that these arrays must always be fully-sized. + */ + +// TODO:Stubbed out for now +#include + +#include +#include "chip/imxrt_tmr.h" +#include "chip/imxrt_flexpwm.h" +#include "imxrt_gpio.h" +#include "imxrt_iomuxc.h" +#include "chip/imxrt_pinmux.h" +#include "imxrt_xbar.h" +#include "imxrt_periphclks.h" +#include +#include + +#include "up_arch.h" +#include "board_config.h" + +/**************************************************************************************************** + * Definitions + ****************************************************************************************************/ + +#if defined(ON_EVK) +//# define DEBUG_CLOCK_EVK 1 +#endif + +/* Register accessors */ + +#define _REG(_addr) (*(volatile uint16_t *)(_addr)) + +/* QTimer3 register accessors */ + +#define REG(_reg) _REG(IMXRT_QTIMER3_BASE + IMXRT_TMR_OFFSET(IMXRT_TMR_CH0,(_reg))) + +#define rCOMP1 REG(IMXRT_TMR_COMP1_OFFSET) +#define rCOMP2 REG(IMXRT_TMR_COMP2_OFFSET) +#define rCAPT REG(IMXRT_TMR_CAPT_OFFSET) +#define rLOAD REG(IMXRT_TMR_LOAD_OFFSET) +#define rHOLD REG(IMXRT_TMR_HOLD_OFFSET) +#define rCNTR REG(IMXRT_TMR_CNTR_OFFSET) +#define rCTRL REG(IMXRT_TMR_CTRL_OFFSET) +#define rSCTRL REG(IMXRT_TMR_SCTRL_OFFSET) +#define rCMPLD1 REG(IMXRT_TMR_CMPLD1_OFFSET) +#define rCMPLD2 REG(IMXRT_TMR_CMPLD2_OFFSET) +#define rCSCTRL REG(IMXRT_TMR_CSCTRL_OFFSET) +#define rFILT REG(IMXRT_TMR_FILT_OFFSET) +#define rDMA REG(IMXRT_TMR_DMA_OFFSET) +#define rENBL REG(IMXRT_TMR_ENBL_OFFSET) + +__EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = { + { + .base = IMXRT_FLEXPWM2_BASE, + .first_channel_index = 0, + .last_channel_index = 3, + }, + + { + .base = IMXRT_FLEXPWM3_BASE, + .first_channel_index = 4, + .last_channel_index = 5, + }, + { + .base = IMXRT_FLEXPWM4_BASE, + .first_channel_index = 6, + .last_channel_index = 7, + }, +}; + +__EXPORT const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = { + { + /* FMU_CH1 : GPIO_B0_06 GPIO2 Pin 6 FLEXPWM2_PWMA0 */ + .gpio_out = PIN_FLEXPWM2_PWMA00, + .timer_index = 0, + .val_offset = PWMA_VAL, + .sub_module = SM0, + .sub_module_bits = MCTRL_LDOK(1 << SM0), + + }, + { + /* FMU_CH2 : GPIO_EMC_08 GPIO4 Pin 8 FLEXPWM2_PWMA1 */ + .gpio_out = PIN_FLEXPWM2_PWMA01, + .timer_index = 0, + .val_offset = PWMA_VAL, + .sub_module = SM1, + .sub_module_bits = MCTRL_LDOK(1 << SM1), + + }, + { + /* FMU_CH3 : GPIO_EMC_10 GPIO4 Pin 10 FLEXPWM2_PWMA2 */ + .gpio_out = PIN_FLEXPWM2_PWMA02, + .timer_index = 0, + .val_offset = PWMA_VAL, + .sub_module = SM2, + .sub_module_bits = MCTRL_LDOK(1 << SM2), + + }, + { + /* FMU_CH4 : GPIO_AD_B0_09 GPIO1 Pin 9 FLEXPWM2_PWMA3 */ + .gpio_out = PIN_FLEXPWM2_PWMA03, + .timer_index = 0, + .val_offset = PWMA_VAL, + .sub_module = SM3, + .sub_module_bits = MCTRL_LDOK(1 << SM3), + }, + + { + /* FMU_CH5 : GPIO_EMC_33 GPIO3 Pin 19 FLEXPWM3_PWMA2 */ + .gpio_out = PIN_FLEXPWM3_PWMA02, + .timer_index = 1, + .val_offset = PWMA_VAL, + .sub_module = SM2, + .sub_module_bits = MCTRL_LDOK(1 << SM2), + }, + { + /* FMU_CH6 : GPIO_EMC_30 GPIO4 Pin 30 FLEXPWM3_PWMB0 */ + .gpio_out = PIN_FLEXPWM3_PWMB00, + .timer_index = 1, + .val_offset = PWMB_VAL, + .sub_module = SM0, + .sub_module_bits = MCTRL_LDOK(1 << SM0), + + }, + + { + /* FMU_CH7 : GPIO_EMC_04 GPIO4 Pin 4 FLEXPWM4_PWMA2 */ + .gpio_out = PIN_FLEXPWM4_PWMA02, + .timer_index = 2, + .val_offset = PWMA_VAL, + .sub_module = SM2, + .sub_module_bits = MCTRL_LDOK(1 << SM2), + + }, + { + /* FMU_CH8 : GPIO_EMC_01 GPIO4 Pin 1 FLEXPWM4_PWMB0 */ + .gpio_out = PIN_FLEXPWM4_PWMB00, + .timer_index = 2, + .val_offset = PWMB_VAL, + .sub_module = SM0, + .sub_module_bits = MCTRL_LDOK(1 << SM0), + + }, + +}; + +__EXPORT const struct io_timers_t led_pwm_timers[MAX_LED_TIMERS] = { +}; + +__EXPORT const struct timer_io_channels_t led_pwm_channels[MAX_TIMER_LED_CHANNELS] = { +}; + + +__EXPORT void fmurt1062_timer_initialize(void) +{ + /* We must configure Qtimer 3 as the IPG divide by to yield 16 Mhz + * and deliver that clock to the eFlexPWM234 via XBAR + * + * IPG = 144 Mhz + * 16Mhz = 144 / 9 + * COMP 1 = 5, COMP2 = 4 + * + * */ + + /* Enable Block Clocks for Qtimer and XBAR1 */ + + imxrt_clockall_timer3(); + imxrt_clockall_xbar1(); + + /* Disable Timer */ + + rCTRL = 0; + rCOMP1 = 5 - 1; // N - 1 + rCOMP2 = 4 - 1; + + rCAPT = 0; + rLOAD = 0; + rCNTR = 0; + + rSCTRL = TMR_SCTRL_OEN; + + rCMPLD1 = 0; + rCMPLD2 = 0; + rCSCTRL = 0; + rFILT = 0; + rDMA = 0; + + /* Count rising edges of primary source, + * Prescaler is /1 + * Count UP until compare, then re-initialize. a successful compare occurs when the counter reaches a COMP1 value. + * Toggle OFLAG output using alternating compare registers + */ + rCTRL = (TMR_CTRL_CM_MODE1 | TMR_CTRL_PCS_DIV1 | TMR_CTRL_LENGTH | TMR_CTRL_OUTMODE_TOG_ALT); + + /* QTIMER3_TIMER0 -> Flexpwm234ExtClk */ + + imxrt_xbar_connect(IMXRT_XBARA1_OUT_FLEXPWM234_EXT_CLK_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT); + + +#if defined(DEBUG_CLOCK_EVK) + + /* Make it Scope-able on J24-1 */ + + imxrt_xbar_connect(IMXRT_XBARA1_OUT_IOMUX_XBAR_IO17_SEL_OFFSET, IMXRT_XBARA1_IN_QTIMER3_TMR0_OUT); + + imxrt_config_gpio(GPIO_XBAR1_INOUT17_1 | (IOMUX_CMOS_OUTPUT | IOMUX_DRIVE_60OHM | IOMUX_SPEED_MAX | + IOMUX_SLEW_FAST)); + modifyreg32(IMXRT_IOMUXC_GPR_GPR6, 0, GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK); +#endif /* DEBUG_CLOCK_EVK */ + + +} diff --git a/boards/nxp/fmurt1062-v1/src/usb.c b/boards/nxp/fmurt1062-v1/src/usb.c new file mode 100644 index 000000000000..ccfa95b77c71 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/src/usb.c @@ -0,0 +1,129 @@ +/**************************************************************************** + * + * Copyright (C) 2016, 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file usb.c + * + * Board-specific USB functions. + */ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include "board_config.h" +#include "imxrt_periphclks.h" + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ +int imxrt_usb_initialize(void) +{ + imxrt_clockall_usboh3(); + return 0; +} +/************************************************************************************ + * Name: imxrt_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide imxrt_usbpullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +__EXPORT +int imxrt_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); + + return OK; +} + +/************************************************************************************ + * Name: imxrt_usbsuspend + * + * Description: + * Board logic must provide the imxrt_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +__EXPORT +void imxrt_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + uinfo("resume: %d\n", resume); +} + +/************************************************************************************ + * Name: board_read_VBUS_state + * + * Description: + * All boards must provide a way to read the state of VBUS, this my be simple + * digital input on a GPIO. Or something more complicated like a Analong input + * or reading a bit from a USB controller register. + * + * Returns - 0 if connected. + * + ************************************************************************************/ + +int board_read_VBUS_state(void) +{ + + return (getreg32(IMXRT_USB_ANALOG_USB1_VBUS_DETECT_STAT) & USB_ANALOG_USB_VBUS_DETECT_STAT_VBUS_VALID) ? 0 : 1; +} diff --git a/src/drivers/boards/common/CMakeLists.txt b/src/drivers/boards/common/CMakeLists.txt index d8f9b08239b8..b0d9f0941169 100644 --- a/src/drivers/boards/common/CMakeLists.txt +++ b/src/drivers/boards/common/CMakeLists.txt @@ -43,6 +43,8 @@ if ((${PX4_PLATFORM} MATCHES "nuttx") AND NOT ${PX4_BOARD} MATCHES "io") if (${CONFIG_ARCH_CHIP} MATCHES "kinetis") add_subdirectory(kinetis) + elseif (${CONFIG_ARCH_CHIP} MATCHES "imxrt") + add_subdirectory(imxrt) elseif (${CONFIG_ARCH_CHIP} MATCHES "stm32") add_subdirectory(stm32) endif() diff --git a/src/drivers/boards/common/imxrt/CMakeLists.txt b/src/drivers/boards/common/imxrt/CMakeLists.txt new file mode 100644 index 000000000000..63d74df96bbf --- /dev/null +++ b/src/drivers/boards/common/imxrt/CMakeLists.txt @@ -0,0 +1,41 @@ +############################################################################ +# +# Copyright (c) 2019 PX4 Development Team. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name PX4 nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +add_library(drivers_boards_common_arch + board_identity.c + board_mcu_version.c + board_hw_rev_ver.c + board_reset.c + ) +add_dependencies(drivers_boards_common_arch prebuild_targets) +target_link_libraries(drivers_boards_common_arch PRIVATE nuttx_arch) diff --git a/src/drivers/boards/common/imxrt/board_hw_rev_ver.c b/src/drivers/boards/common/imxrt/board_hw_rev_ver.c new file mode 100644 index 000000000000..cb248194a62a --- /dev/null +++ b/src/drivers/boards/common/imxrt/board_hw_rev_ver.c @@ -0,0 +1,345 @@ +/**************************************************************************** + * + * Copyright (C) 2019 PX4 Development Team. All rights reserved. + * Author: @author David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file board_hw_rev_ver.c + * Implementation of IMXRT based Board Hardware Revision and Version ID API + */ + +#include +#include +#include "board_config.h" + +#include "../board_internal_common.h" + +#include + +#if defined(BOARD_HAS_HW_VERSIONING) +/**************************************************************************** + * Private Data + ****************************************************************************/ +static int hw_version = 0; +static int hw_revision = 0; +static char hw_info[] = HW_INFO_INIT; + +/**************************************************************************** + * Protected Functions + ****************************************************************************/ +/**************************************************************************** + * Name: determin_hw_version + * + * Description: + * + * This function fist determines if revision and version resistors are in place. + * if they it will read the ADC channels and decode the DN to ordinal numbers + * that will be returned by board_get_hw_version and board_get_hw_revision API + * + * This will return OK on success and -1 on not supported +* + * + ****************************************************************************/ + +static int dn_to_ordinal(uint16_t dn) +{ + + const struct { + uint16_t low; // High(n-1) + 1 + uint16_t high; // Average High(n)+Low(n+1) EX. 1356 = AVRG(1331,1382) + } dn2o[] = { + // R1(up) R2(down) V min V Max DN Min DN Max + {0, 0 }, // 0 No Resistors + {1, 579 }, // 1 24.9K 442K 0.166255191 0.44102252 204 553 + {580, 967 }, // 2 32.4K 174K 0.492349322 0.770203609 605 966 + {968, 1356}, // 3 38.3K 115K 0.787901749 1.061597759 968 1331 + {1357, 1756}, // 4 46.4K 84.5K 1.124833577 1.386007306 1382 1738 + {1757, 2137}, // 5 51.1K 61.9K 1.443393279 1.685367869 1774 2113 + {2138, 2519}, // 6 61.9K 51.1K 1.758510242 1.974702534 2161 2476 + {2520, 2919}, // 7 84.5K 46.4K 2.084546498 2.267198261 2562 2842 + {2920, 3308}, // 8 115K 38.3K 2.437863827 2.57656294 2996 3230 + {3309, 3699}, // 9 174K 32.4K 2.755223792 2.847933804 3386 3571 + {3700, 4095}, // 10 442K 24.9K 3.113737849 3.147347506 3827 3946 + }; + + for (unsigned int i = 0; i < arraySize(dn2o); i++) { + if (dn >= dn2o[i].low && dn <= dn2o[i].high) { + return i; + } + } + + return -1; +} + +/************************************************************************************ + * Name: read_id_dn + * + * Description: + * Read the HW sense set to get a DN of the value formed by + * 0 VDD + * | + * / + * \ R1 + * / + * | + * +--------------- GPIO_HW_xxx_SENCE | ADC channel N + * | + * / + * \ R2 + * / + * | + * | + * +--------------- GPIO_HW_xxx_DRIVE + * + * Input Parameters: + * id - pointer to receive the dn for the id set + * gpio_drive - gpio that is the drive + * gpio_sense - gpio that is the sence + * adc_channel - the Channel number associated with gpio_sense + * + * Returned Value: + * 0 - Success and id is set + * -EIO - FAiled to init or read the ADC + * + ************************************************************************************/ + +static int read_id_dn(int *id, uint32_t gpio_drive, uint32_t gpio_sense, int adc_channel) +{ + int rv = -EIO; + const unsigned int samples = 16; + /* + * Step one is there resistors? + * + * If we set the mid-point of the ladder which is the ADC input to an + * output, then whatever state is driven out should be seen by the GPIO + * that is on the bottom of the ladder that is switched to an input. + * The SENCE line is effectively an output with a high value pullup + * resistor on it driving an input through a series resistor with a pull up. + * If present the series resistor will form a low pass filter due to stray + * capacitance, but this is fine as long as we give it time to settle. + */ + + /* Turn the drive lines to digital inputs with No pull up */ + + imxrt_config_gpio(_MK_GPIO_INPUT(gpio_drive) & ~IOMUX_PULL_MASK); + + /* Turn the sense lines to digital outputs LOW */ + + imxrt_config_gpio(_MK_GPIO_OUTPUT(gpio_sense)); + + + up_udelay(100); /* About 10 TC assuming 485 K */ + + /* Read Drive lines while sense are driven low */ + + int low = imxrt_gpio_read(_MK_GPIO_INPUT(gpio_drive)); + + + /* Write the sense lines HIGH */ + + imxrt_gpio_write(_MK_GPIO_OUTPUT(gpio_sense), 1); + + up_udelay(100); /* About 10 TC assuming 485 K */ + + /* Read Drive lines while sense are driven high */ + + int high = imxrt_gpio_read(_MK_GPIO_INPUT(gpio_drive)); + + /* restore the pins to ANALOG */ + + imxrt_config_gpio(gpio_sense); + + /* Turn the drive lines to digital outputs LOW */ + + imxrt_config_gpio(gpio_drive ^ GPIO_OUTPUT_SET); + + up_udelay(100); /* About 10 TC assuming 485 K */ + + /* Are Resistors in place ?*/ + + uint32_t dn_sum = 0; + uint16_t dn = 0; +#if defined(ON_EVK) + + if (1 || high || low) { // no if +#else + if ((high ^ low) && low == 0) { +#endif + /* Yes - Fire up the ADC (it has once control) */ + + if (board_adc_init() == OK) { + + /* Read the value */ + for (unsigned av = 0; av < samples; av++) { + dn = board_adc_sample(adc_channel); + + if (dn == 0xffff) { + break; + } + + dn_sum += dn; + } + + if (dn != 0xffff) { + *id = dn_sum / samples; + rv = OK; + } + } + + } else { + /* No - No Resistors is ID 0 */ + *id = 0; + rv = OK; + } + + /* Turn the drive lines to digital outputs High */ + + imxrt_config_gpio(gpio_drive); + return rv; +} + + +static int determine_hw_info(int *revision, int *version) +{ + int dn; + int rv = read_id_dn(&dn, GPIO_HW_REV_DRIVE, GPIO_HW_REV_SENSE, ADC_HW_REV_SENSE_CHANNEL); + + if (rv == OK) { + *revision = dn_to_ordinal(dn); + rv = read_id_dn(&dn, GPIO_HW_VER_DRIVE, GPIO_HW_VER_SENSE, ADC_HW_VER_SENSE_CHANNEL); + + if (rv == OK) { + *version = dn_to_ordinal(dn); + } + } + + return rv; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ +/************************************************************************************ + * Name: board_get_hw_type + * + * Description: + * Optional returns a 0 terminated string defining the HW type. + * + * Input Parameters: + * None + * + * Returned Value: + * a 0 terminated string defining the HW type. This my be a 0 length string "" + * + ************************************************************************************/ + +__EXPORT const char *board_get_hw_type_name() +{ + return (const char *) hw_info; +} + +/************************************************************************************ + * Name: board_get_hw_version + * + * Description: + * Optional returns a integer HW version + * + * Input Parameters: + * None + * + * Returned Value: + * An integer value of this boards hardware version. + * A value of -1 is the default for boards not supporting the BOARD_HAS_VERSIONING API. + * A value of 0 is the default for boards supporting the API but not having version. + * + ************************************************************************************/ + +__EXPORT int board_get_hw_version() +{ + return hw_version; +} + +/************************************************************************************ + * Name: board_get_hw_revision + * + * Description: + * Optional returns a integer HW revision + * + * Input Parameters: + * None + * + * Returned Value: + * An integer value of this boards hardware revision. + * A value of -1 is the default for boards not supporting the BOARD_HAS_VERSIONING API. + * A value of 0 is the default for boards supporting the API but not having revision. + * + ************************************************************************************/ + +__EXPORT int board_get_hw_revision() +{ + return hw_revision; +} + +/************************************************************************************ + * Name: board_determine_hw_info + * + * Description: + * Uses the HW revision and version detection added in FMUv5. + * See https://docs.google.com/spreadsheets/d/1-n0__BYDedQrc_2NHqBenG1DNepAgnHpSGglke-QQwY + * HW REV and VER ID tab. + * + * Input Parameters: + * None + * + * Returned Value: + * 0 - on success or negated errono + * 1) The values for integer value of this boards hardware revision is set + * 2) The integer value of this boards hardware version is set. + * 3) hw_info is populated + * + * A value of 0 is the default for boards supporting the BOARD_HAS_HW_VERSIONING API. + * but not having R1 and R2. + * + ************************************************************************************/ + +int board_determine_hw_info() +{ + int rv = determine_hw_info(&hw_revision, &hw_version); + + if (rv == OK) { + hw_info[HW_INFO_INIT_REV] = board_get_hw_revision() + '0'; + hw_info[HW_INFO_INIT_VER] = board_get_hw_version() + '0'; + } + + return rv; +} +#endif diff --git a/src/drivers/boards/common/imxrt/board_identity.c b/src/drivers/boards/common/imxrt/board_identity.c new file mode 100644 index 000000000000..4139799a1822 --- /dev/null +++ b/src/drivers/boards/common/imxrt/board_identity.c @@ -0,0 +1,172 @@ +/**************************************************************************** + * + * Copyright (C) 2018 PX4 Development Team. All rights reserved. + * Author: @author David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file board_identity.c + * Implementation of imxrt based Board identity API + */ + +#include +#include +#include +#include + +#include "board_config.h" +#include +#include "up_arch.h" + +#define CPU_UUID_BYTE_FORMAT_ORDER {3, 2, 1, 0, 7, 6, 5, 4} +#define SWAP_UINT32(x) (((x) >> 24) | (((x) & 0x00ff0000) >> 8) | (((x) & 0x0000ff00) << 8) | ((x) << 24)) + + +static const uint16_t soc_arch_id = PX4_SOC_ARCH_ID; + +/* A type suitable for holding the reordering array for the byte format of the UUID + */ + +typedef const uint8_t uuid_uint8_reorder_t[PX4_CPU_UUID_BYTE_LENGTH]; + +void board_get_uuid(uuid_byte_t uuid_bytes) +{ + uuid_uint8_reorder_t reorder = CPU_UUID_BYTE_FORMAT_ORDER; + + union { + uuid_byte_t b; + uuid_uint32_t w; + } id; + + /* Copy the serial from the OCOTP */ + + board_get_uuid32(id.w); + + /* swap endianess */ + + for (int i = 0; i < PX4_CPU_UUID_BYTE_LENGTH; i++) { + uuid_bytes[i] = id.b[reorder[i]]; + } +} + +void board_get_uuid32(uuid_uint32_t uuid_words) +{ + /* IMXRT_OCOTP_CFG1:0x420[10:0], IMXRT_OCOTP_CFG0:0x410[31:0] LOT_NO_ENC[42:0](SJC_CHALL/UNIQUE_ID[42:0]) + * 43 bits FSL-wide unique,encoded LOT ID STD II/SJC CHALLENGE/ Unique ID + * 0x420[15:11] WAFER_NO[4:0]( SJC_CHALL[47:43] /UNIQUE_ID[47:43]) + * 5 bits The wafer number of the wafer on which the device was fabricated/SJC CHALLENGE/ Unique ID + * 0x420[23:16] DIE-YCORDINATE[7:0]( SJC_CHALL[55:48] /UNIQUE_ID[55:48]) + * 8 bits The Y-coordinate of the die location on the wafer/SJC CHALLENGE/Unique ID + * 0x420[31:24] DIE-XCORDINATE[7:0]( SJC_CHALL[63:56] /UNIQUE_ID[63:56] ) + * 8 bits The X-coordinate of the die location on the wafer/SJC CHALLENGE/Unique ID + * + * word [0] word[1] + * SJC_CHALL[63:32] [31:00] + */ + + uuid_words[0] = getreg32(IMXRT_OCOTP_CFG1); + uuid_words[1] = getreg32(IMXRT_OCOTP_CFG0); +} + +int board_get_uuid32_formated(char *format_buffer, int size, + const char *format, + const char *seperator) +{ + uuid_uint32_t uuid; + board_get_uuid32(uuid); + + int offset = 0; + int sep_size = seperator ? strlen(seperator) : 0; + + for (unsigned int i = 0; i < PX4_CPU_UUID_WORD32_LENGTH; i++) { + offset += snprintf(&format_buffer[offset], size - ((i * 2 * sizeof(uint32_t)) + 1), format, uuid[i]); + + if (sep_size && i < PX4_CPU_UUID_WORD32_LENGTH - 1) { + strcat(&format_buffer[offset], seperator); + offset += sep_size; + } + } + + return 0; +} + +int board_get_mfguid(mfguid_t mfgid) +{ + board_get_uuid(* (uuid_byte_t *) mfgid); + return PX4_CPU_MFGUID_BYTE_LENGTH; +} + +int board_get_mfguid_formated(char *format_buffer, int size) +{ + mfguid_t mfguid; + + board_get_mfguid(mfguid); + int offset = 0; + + for (unsigned int i = 0; i < PX4_CPU_MFGUID_BYTE_LENGTH; i++) { + offset += snprintf(&format_buffer[offset], size - offset, "%02x", mfguid[i]); + } + + return offset; +} + +int board_get_px4_guid(px4_guid_t px4_guid) +{ + uint8_t *pb = (uint8_t *) &px4_guid[0]; + *pb++ = (soc_arch_id >> 8) & 0xff; + *pb++ = (soc_arch_id & 0xff); + + for (unsigned i = 0; i < PX4_GUID_BYTE_LENGTH - (sizeof(soc_arch_id) + PX4_CPU_UUID_BYTE_LENGTH); i++) { + *pb++ = 0; + } + + board_get_uuid(pb); + return PX4_GUID_BYTE_LENGTH; +} + +int board_get_px4_guid_formated(char *format_buffer, int size) +{ + px4_guid_t px4_guid; + board_get_px4_guid(px4_guid); + int offset = 0; + + /* size should be 2 per byte + 1 for termination + * So it needs to be odd + */ + size = size & 1 ? size : size - 1; + + /* Discard from MSD */ + for (unsigned i = PX4_GUID_BYTE_LENGTH - size / 2; offset < size && i < PX4_GUID_BYTE_LENGTH; i++) { + offset += snprintf(&format_buffer[offset], size - offset, "%02x", px4_guid[i]); + } + + return offset; +} diff --git a/src/drivers/boards/common/imxrt/board_mcu_version.c b/src/drivers/boards/common/imxrt/board_mcu_version.c new file mode 100644 index 000000000000..70660f729f5e --- /dev/null +++ b/src/drivers/boards/common/imxrt/board_mcu_version.c @@ -0,0 +1,76 @@ +/**************************************************************************** + * + * Copyright (C) 2018, 2019 PX4 Development Team. All rights reserved. + * Author: @author David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file board_mcu_version.c + * Implementation of imxrt based SoC version API + */ + +#include +#include + +#include +#include +#include "up_arch.h" + +#define DIGPROG_MINOR_SHIFT 0 +#define DIGPROG_MINOR_MASK (0xff << DIGPROG_MINOR_SHIFT) +#define DIGPROG_MINOR(info) (((info) & DIGPROG_MINOR_MASK) >> DIGPROG_MINOR_SHIFT) +#define DIGPROG_MAJOR_LOWER_SHIFT 8 +#define DIGPROG_MAJOR_LOWER_MASK (0xff << DIGPROG_MAJOR_LOWER_SHIFT) +#define DIGPROG_MAJOR_LOWER(info) (((info) & DIGPROG_MAJOR_LOWER_MASK) >> DIGPROG_MAJOR_LOWER_SHIFT) +#define DIGPROG_MAJOR_UPPER_SHIFT 16 +#define DIGPROG_MAJOR_UPPER_MASK (0xff << DIGPROG_MAJOR_UPPER_SHIFT) +#define DIGPROG_MAJOR_UPPER(info) (((info) & DIGPROG_MAJOR_UPPER_MASK) >> DIGPROG_MAJOR_UPPER_SHIFT) +// 876543210 +#define CHIP_TAG "i.MX RT10?2 r?.?" +#define CHIP_TAG_LEN sizeof(CHIP_TAG)-1 + +int board_mcu_version(char *rev, const char **revstr, const char **errata) +{ + uint32_t info = getreg32(IMXRT_USB_ANALOG_DIGPROG); + static char chip[sizeof(CHIP_TAG)] = CHIP_TAG; + + chip[CHIP_TAG_LEN - 1] = '0' + DIGPROG_MINOR(info); + chip[CHIP_TAG_LEN - 3] = '1' + DIGPROG_MAJOR_LOWER(info); + chip[CHIP_TAG_LEN - 7] = DIGPROG_MAJOR_UPPER(info) == 0x6a ? '5' : '6'; + *revstr = chip; + *rev = '0' + DIGPROG_MINOR(info); + + if (errata) { + *errata = NULL; + } + + return 0; +} diff --git a/src/drivers/boards/common/imxrt/board_reset.c b/src/drivers/boards/common/imxrt/board_reset.c new file mode 100644 index 000000000000..4fa762646942 --- /dev/null +++ b/src/drivers/boards/common/imxrt/board_reset.c @@ -0,0 +1,79 @@ +/**************************************************************************** + * + * Copyright (C) 2017 PX4 Development Team. All rights reserved. + * Author: @author David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file board_reset.c + * Implementation of kinetis based Board RESET API + */ + +#include +#include +#include +#include +#include + +#define PX4_IMXRT_RTC_REBOOT_REG 3 // Must be common with bootloader and: + +#if CONFIG_IMXRT_RTC_MAGIC_REG == PX4_IMXRT_RTC_REBOOT_REG +# error CONFIG_IMXRT_RTC_MAGIC_REG can nt have the save value as PX4_IMXRT_RTC_REBOOT_REG +#endif + +int board_set_bootload_mode(board_reset_e mode) +{ + uint32_t regvalue = 0; + + switch (mode) { + case board_reset_normal: + case board_reset_extended: + break; + + case board_reset_enter_bootloader: + regvalue = 0xb007b007; + break; + + default: + return -EINVAL; + } + + putreg32(regvalue, IMXRT_SNVS_LPGPR(PX4_IMXRT_RTC_REBOOT_REG)); + return OK; +} + + +void board_system_reset(int status) +{ + board_reset(status); + + while (1); +} diff --git a/src/drivers/imxrt/CMakeLists.txt b/src/drivers/imxrt/CMakeLists.txt new file mode 100644 index 000000000000..db26cf675d00 --- /dev/null +++ b/src/drivers/imxrt/CMakeLists.txt @@ -0,0 +1,43 @@ +############################################################################ +# +# Copyright (c) 2016-2019 PX4 Development Team. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name PX4 nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +add_library(drivers_arch + drv_hrt.c + drv_io_timer.c + drv_pwm_servo.c + drv_pwm_trigger.c + drv_input_capture.c + drv_led_pwm.cpp +) +add_dependencies(drivers_arch prebuild_targets) +target_link_libraries(drivers_arch PRIVATE drivers_board) diff --git a/src/drivers/imxrt/adc/CMakeLists.txt b/src/drivers/imxrt/adc/CMakeLists.txt new file mode 100644 index 000000000000..bf0eca22c49f --- /dev/null +++ b/src/drivers/imxrt/adc/CMakeLists.txt @@ -0,0 +1,39 @@ +############################################################################ +# +# Copyright (c) 2016 PX4 Development Team. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name PX4 nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +px4_add_module( + MODULE drivers__adc + MAIN adc + SRCS + adc.cpp + ) diff --git a/src/drivers/imxrt/adc/adc.cpp b/src/drivers/imxrt/adc/adc.cpp new file mode 100644 index 000000000000..636de96f79d7 --- /dev/null +++ b/src/drivers/imxrt/adc/adc.cpp @@ -0,0 +1,570 @@ +/**************************************************************************** + * + * Copyright (C) 2018-2019 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file adc.cpp + * + * Driver for the imxrt ADC. + * + * This is a low-rate driver, designed for sampling things like voltages + * and so forth. It avoids the gross complexity of the NuttX ADC driver. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include "imxrt_periphclks.h" + +#include + +#include +#include + +#if defined(ADC_CHANNELS) + +typedef uint32_t adc_chan_t; +#define ADC_TOTAL_CHANNELS 16 + +#define _REG(_addr) (*(volatile uint32_t *)(_addr)) + +/* ADC register accessors */ + +#define REG(a, _reg) _REG(IMXRT_ADC##a##_BASE + (_reg)) + +#define rHC0(adc) REG(adc, IMXRT_ADC_HC0_OFFSET) /* Control register for hardware triggers */ +#define rHC1(adc) REG(adc, IMXRT_ADC_HC1_OFFSET) /* Control register for hardware triggers */ +#define rHC2(adc) REG(adc, IMXRT_ADC_HC2_OFFSET) /* Control register for hardware triggers */ +#define rHC3(adc) REG(adc, IMXRT_ADC_HC3_OFFSET) /* Control register for hardware triggers */ +#define rHC4(adc) REG(adc, IMXRT_ADC_HC4_OFFSET) /* Control register for hardware triggers */ +#define rHC5(adc) REG(adc, IMXRT_ADC_HC5_OFFSET) /* Control register for hardware triggers */ +#define rHC6(adc) REG(adc, IMXRT_ADC_HC6_OFFSET) /* Control register for hardware triggers */ +#define rHC7(adc) REG(adc, IMXRT_ADC_HC7_OFFSET) /* Control register for hardware triggers */ +#define rHS(adc) REG(adc, IMXRT_ADC_HS_OFFSET) /* Status register for HW triggers */ +#define rR0(adc) REG(adc, IMXRT_ADC_R0_OFFSET) /* Data result register for HW triggers */ +#define rR1(adc) REG(adc, IMXRT_ADC_R1_OFFSET) /* Data result register for HW triggers */ +#define rR2(adc) REG(adc, IMXRT_ADC_R2_OFFSET) /* Data result register for HW triggers */ +#define rR3(adc) REG(adc, IMXRT_ADC_R3_OFFSET) /* Data result register for HW triggers */ +#define rR4(adc) REG(adc, IMXRT_ADC_R4_OFFSET) /* Data result register for HW triggers */ +#define rR5(adc) REG(adc, IMXRT_ADC_R5_OFFSET) /* Data result register for HW triggers */ +#define rR6(adc) REG(adc, IMXRT_ADC_R6_OFFSET) /* Data result register for HW triggers */ +#define rR7(adc) REG(adc, IMXRT_ADC_R7_OFFSET) /* Data result register for HW triggers */ +#define rCFG(adc) REG(adc, IMXRT_ADC_CFG_OFFSET) /* Configuration register */ +#define rGC(adc) REG(adc, IMXRT_ADC_GC_OFFSET) /* General control register */ +#define rGS(adc) REG(adc, IMXRT_ADC_GS_OFFSET) /* General status register */ +#define rCV(adc) REG(adc, IMXRT_ADC_CV_OFFSET) /* Compare value register */ +#define rOFS(adc) REG(adc, IMXRT_ADC_OFS_OFFSET) /* Offset correction value register */ +#define rCAL(adc) REG(adc, IMXRT_ADC_CAL_OFFSET) /* Calibration value register */ + +class ADC : public device::CDev +{ +public: + ADC(adc_chan_t channels); + ~ADC(); + + virtual int init(); + + virtual int ioctl(file *filp, int cmd, unsigned long arg); + virtual ssize_t read(file *filp, char *buffer, size_t len); + +protected: + virtual int open_first(struct file *filp); + virtual int close_last(struct file *filp); + +private: + static const hrt_abstime _tickrate = 10000; /**< 100Hz base rate */ + + hrt_call _call; + perf_counter_t _sample_perf; + + adc_chan_t _channels; /**< bits set for channels */ + unsigned _channel_count; + adc_msg_s *_samples; /**< sample buffer */ + + orb_advert_t _to_system_power; + orb_advert_t _to_adc_report; + + /** work trampoline */ + static void _tick_trampoline(void *arg); + + /** worker function */ + void _tick(); + + /** + * Sample a single channel and return the measured value. + * + * @param channel The channel to sample. + * @return The sampled value, or 0xffff if + * sampling failed. + */ + uint16_t _sample(unsigned channel); + + // update system_power ORB topic, only on FMUv2 + void update_system_power(hrt_abstime now); + + void update_adc_report(hrt_abstime now); +}; + +ADC::ADC(adc_chan_t channels) : + CDev("adc", ADC0_DEVICE_PATH), + _sample_perf(perf_alloc(PC_ELAPSED, "adc_samples")), + _channels(channels), + _channel_count(0), + _samples(nullptr), + _to_system_power(nullptr), + _to_adc_report(nullptr) +{ + _debug_enabled = true; + + /* allocate the sample array */ + for (unsigned i = 0; i < ADC_TOTAL_CHANNELS; i++) { + if (channels & (1 << i)) { + _channel_count++; + } + } + + _samples = new adc_msg_s[_channel_count]; + + /* prefill the channel numbers in the sample array */ + + if (_samples != nullptr) { + unsigned index = 0; + + for (unsigned i = 0; i < ADC_TOTAL_CHANNELS; i++) { + if (channels & (1 << i)) { + _samples[index].am_channel = i; + _samples[index].am_data = 0; + index++; + } + } + } +} + +ADC::~ADC() +{ + if (_samples != nullptr) { + delete _samples; + } + + imxrt_clockoff_adc1(); +} + +int board_adc_init() +{ + static bool once = false; + + if (!once) { + + once = true; + + /* Input is Buss Clock 56 Mhz We will use /8 for 7 Mhz */ + + irqstate_t flags = px4_enter_critical_section(); + + imxrt_clockall_adc1(); + + rCFG(1) = ADC_CFG_ADICLK_IPGDIV2 | ADC_CFG_MODE_12BIT | \ + ADC_CFG_ADIV_DIV8 | ADC_CFG_ADLSMP | ADC_CFG_ADSTS_6_20 | \ + ADC_CFG_AVGS_4SMPL | ADC_CFG_OVWREN; + px4_leave_critical_section(flags); + + /* Clear the CALF and begin the calibration */ + + rGS(1) = ADC_GS_CALF; + rGC(1) = ADC_GC_CAL; + + uint32_t guard = 100; + + while (guard != 0 && (rGS(1) & ADC_GC_CAL) == 0) { + guard--; + usleep(1); + } + + while ((rGS(1) & ADC_GC_CAL) == ADC_GC_CAL) { + + usleep(100); + + if (rGS(1) & ADC_GS_CALF) { + return -1; + } + } + + if ((rHS(1) & ADC_HS_COCO0) == 0) { + return -2; + } + + if (rGS(1) & ADC_GS_CALF) { + return -3; + } + + /* dummy read to clear COCO of calibration */ + + int32_t r = rR0(1); + UNUSED(r); + + /* kick off a sample and wait for it to complete */ + hrt_abstime now = hrt_absolute_time(); + rGC(1) = ADC_GC_AVGE; + rHC0(1) = 0xd; // VREFSH = internal channel, for ADC self-test, hard connected to VRH internally + + while (!(rHS(1) & ADC_HS_COCO0)) { + + /* don't wait for more than 500us, since that means something broke - + * should reset here if we see this + */ + + if ((hrt_absolute_time() - now) > 500) { + return -4; + } + } + + r = rR0(1); + } // once + + return OK; +} + +int +ADC::init() +{ + int rv = board_adc_init(); + + if (rv < 0) { + PX4_DEBUG("sample timeout"); + return rv; + } + + /* create the device node */ + + return CDev::init(); +} + +int +ADC::ioctl(file *filp, int cmd, unsigned long arg) +{ + return -ENOTTY; +} + +ssize_t +ADC::read(file *filp, char *buffer, size_t len) +{ + const size_t maxsize = sizeof(adc_msg_s) * _channel_count; + + if (len > maxsize) { + len = maxsize; + } + + /* block interrupts while copying samples to avoid racing with an update */ + irqstate_t flags = px4_enter_critical_section(); + memcpy(buffer, _samples, len); + px4_leave_critical_section(flags); + + return len; +} + +int +ADC::open_first(struct file *filp) +{ + /* get fresh data */ + _tick(); + + /* and schedule regular updates */ + hrt_call_every(&_call, _tickrate, _tickrate, _tick_trampoline, this); + + return 0; +} + +int +ADC::close_last(struct file *filp) +{ + hrt_cancel(&_call); + return 0; +} + +void +ADC::_tick_trampoline(void *arg) +{ + (reinterpret_cast(arg))->_tick(); +} + +void +ADC::_tick() +{ + hrt_abstime now = hrt_absolute_time(); + + /* scan the channel set and sample each */ + for (unsigned i = 0; i < _channel_count; i++) { + _samples[i].am_data = _sample(_samples[i].am_channel); + } + + update_adc_report(now); + update_system_power(now); +} + +void +ADC::update_adc_report(hrt_abstime now) +{ + adc_report_s adc = {}; + adc.timestamp = now; + + unsigned max_num = _channel_count; + + if (max_num > (sizeof(adc.channel_id) / sizeof(adc.channel_id[0]))) { + max_num = (sizeof(adc.channel_id) / sizeof(adc.channel_id[0])); + } + + for (unsigned i = 0; i < max_num; i++) { + adc.channel_id[i] = _samples[i].am_channel; + adc.channel_value[i] = _samples[i].am_data * 3.3f / 4096.0f; + } + + int instance; + orb_publish_auto(ORB_ID(adc_report), &_to_adc_report, &adc, &instance, ORB_PRIO_HIGH); +} + +void +ADC::update_system_power(hrt_abstime now) +{ +#if defined (BOARD_ADC_USB_CONNECTED) + system_power_s system_power = {}; + system_power.timestamp = now; + + system_power.voltage5v_v = 0; + system_power.voltage3v3_v = 0; + system_power.v3v3_valid = 0; + + /* Assume HW provides only ADC_SCALED_V5_SENSE */ + int cnt = 1; + /* HW provides both ADC_SCALED_V5_SENSE and ADC_SCALED_V3V3_SENSORS_SENSE */ +# if defined(ADC_SCALED_V5_SENSE) && defined(ADC_SCALED_V3V3_SENSORS_SENSE) + cnt++; +# endif + + for (unsigned i = 0; i < _channel_count; i++) { +# if defined(ADC_SCALED_V5_SENSE) + + if (_samples[i].am_channel == ADC_SCALED_V5_SENSE) { + // it is 2:1 scaled + system_power.voltage5v_v = _samples[i].am_data * (ADC_V5_V_FULL_SCALE / 4096.0f); + cnt--; + + } else +# endif +# if defined(ADC_SCALED_V3V3_SENSORS_SENSE) + { + if (_samples[i].am_channel == ADC_SCALED_V3V3_SENSORS_SENSE) { + // it is 2:1 scaled + system_power.voltage3v3_v = _samples[i].am_data * (ADC_3V3_SCALE * (3.3f / 4096.0f)); + system_power.v3v3_valid = 1; + cnt--; + } + } + +# endif + + if (cnt == 0) { + break; + } + } + + /* Note once the board_config.h provides BOARD_ADC_USB_CONNECTED, + * It must provide the true logic GPIO BOARD_ADC_xxxx macros. + */ + // these are not ADC related, but it is convenient to + // publish these to the same topic + + system_power.usb_connected = BOARD_ADC_USB_CONNECTED; + /* If provided used the Valid signal from HW*/ +#if defined(BOARD_ADC_USB_VALID) + system_power.usb_valid = BOARD_ADC_USB_VALID; +#else + /* If not provided then use connected */ + system_power.usb_valid = system_power.usb_connected; +#endif + + /* The valid signals (HW dependent) are associated with each brick */ + + bool valid_chan[BOARD_NUMBER_BRICKS] = BOARD_BRICK_VALID_LIST; + system_power.brick_valid = 0; + + for (int b = 0; b < BOARD_NUMBER_BRICKS; b++) { + system_power.brick_valid |= valid_chan[b] ? 1 << b : 0; + } + + system_power.servo_valid = BOARD_ADC_SERVO_VALID; + + // OC pins are active low + system_power.periph_5v_oc = BOARD_ADC_PERIPH_5V_OC; + system_power.hipower_5v_oc = BOARD_ADC_HIPOWER_5V_OC; + + /* lazily publish */ + if (_to_system_power != nullptr) { + orb_publish(ORB_ID(system_power), _to_system_power, &system_power); + + } else { + _to_system_power = orb_advertise(ORB_ID(system_power), &system_power); + } + +#endif // BOARD_ADC_USB_CONNECTED +} + +uint16_t board_adc_sample(unsigned channel) +{ + + /* clear any previous COCO0 */ + + uint16_t result = rR0(1); + + rHC0(1) = channel; + + /* wait for the conversion to complete */ + hrt_abstime now = hrt_absolute_time(); + + while (!(rHS(1) & ADC_HS_COCO0)) { + /* don't wait for more than 50us, since that means something broke + * should reset here if we see this + */ + if ((hrt_absolute_time() - now) > 50) { + return 0xffff; + } + } + + /* read the result and clear COCO0 */ + result = rR0(1); + return result; +} + +uint16_t +ADC::_sample(unsigned channel) +{ + perf_begin(_sample_perf); + + uint16_t result = board_adc_sample(channel); + + if (result == 0xffff) { + PX4_ERR("sample timeout"); + } + + perf_end(_sample_perf); + return result; +} + +/* + * Driver 'main' command. + */ +extern "C" __EXPORT int adc_main(int argc, char *argv[]); + +namespace +{ +ADC *g_adc; + +void +test(void) +{ + + int fd = open(ADC0_DEVICE_PATH, O_RDONLY); + + if (fd < 0) { + PX4_ERR("can't open ADC device %d", errno); + exit(1); + } + + for (unsigned i = 0; i < 50; i++) { + adc_msg_s data[ADC_TOTAL_CHANNELS]; + ssize_t count = read(fd, data, sizeof(data)); + + if (count < 0) { + PX4_ERR("read error"); + exit(1); + } + + unsigned channels = count / sizeof(data[0]); + + for (unsigned j = 0; j < channels; j++) { + printf("%d: %u ", data[j].am_channel, data[j].am_data); + } + + printf("\n"); + usleep(500000); + } + + exit(0); +} +} + +int +adc_main(int argc, char *argv[]) +{ + if (g_adc == nullptr) { + /* XXX this hardcodes the default channel set for the board in board_config.h - should be configurable */ + g_adc = new ADC(ADC_CHANNELS); + + if (g_adc == nullptr) { + PX4_ERR("couldn't allocate the ADC driver"); + exit(1); + } + + if (g_adc->init() != OK) { + delete g_adc; + PX4_ERR("ADC init failed"); + exit(1); + } + } + + if (argc > 1) { + if (!strcmp(argv[1], "test")) { + test(); + } + } + + exit(0); +} +#endif diff --git a/src/drivers/imxrt/drv_hrt.c b/src/drivers/imxrt/drv_hrt.c new file mode 100644 index 000000000000..198f17f5db81 --- /dev/null +++ b/src/drivers/imxrt/drv_hrt.c @@ -0,0 +1,875 @@ +/**************************************************************************** + * + * Copyright (c) 2018-2019 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file drv_hrt.c + * Author: David Sidrane + * + * High-resolution timer callouts and timekeeping. + * + * This can use any GPT timer. + * + * Note that really, this could use systick too, but that's + * monopolised by NuttX and stealing it would just be awkward. + * + * We don't use the NuttX Kinetis driver per se; rather, we + * claim the timer and then drive it directly. + */ + +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + + +#include "chip.h" +#include "chip/imxrt_gpt.h" +#include "imxrt_periphclks.h" + +#undef PPM_DEBUG + +#ifdef CONFIG_DEBUG_HRT +# define hrtinfo _info +#else +# define hrtinfo(x...) +#endif + +#define CAT3_(A, B, C) A##B##C +#define CAT3(A, B, C) CAT3_(A, B, C) + +#ifdef HRT_TIMER + +#define HRT_TIMER_FREQ 1000000 + +/* HRT configuration */ + +#define HRT_TIMER_CLOCK BOARD_GPT_FREQUENCY /* The input clock frequency to the GPT block */ +#define HRT_TIMER_BASE CAT3(IMXRT_GPT, HRT_TIMER,_BASE) /* The Base address of the GPT */ +#define HRT_TIMER_VECTOR CAT(IMXRT_IRQ_GPT, HRT_TIMER) /* The GPT Interrupt vector */ + +#if HRT_TIMER == 1 +# define HRT_CLOCK_ALL() imxrt_clockall_gpt_bus() /* The Clock Gating macro for this GPT */ +#elif HRT_TIMER == 2 +# define HRT_CLOCK_ALL() imxrt_clockall_gpt2_bus() /* The Clock Gating macro for this GPT */ +#endif + +#if HRT_TIMER == 1 && defined(CONFIG_IMXRT_GPT1) +# error must not set CONFIG_IMXRT_GPT1=y and HRT_TIMER=1 +#elif HRT_TIMER == 2 && defined(CONFIG_IMXRT_GPT2) +# error must not set CONFIG_IMXRT_GPT2=y and HRT_TIMER=2 +#endif + +/* +* HRT clock must be a multiple of 1MHz greater than 1MHz +*/ +#if (HRT_TIMER_CLOCK % HRT_TIMER_FREQ) != 0 +# error HRT_TIMER_CLOCK must be a multiple of 1MHz +#endif +#if HRT_TIMER_CLOCK <= HRT_TIMER_FREQ +# error HRT_TIMER_CLOCK must be greater than 1MHz +#endif + +/** +* Minimum/maximum deadlines. +* +* These are suitable for use with a 32-bit timer/counter clocked +* at 1MHz. The high-resolution timer need only guarantee that it +* not wrap more than once in the 4294.967296s period for absolute +* time to be consistently maintained. +* +* The minimum deadline must be such that the time taken between +* reading a time and writing a deadline to the timer cannot +* result in missing the deadline. +*/ +#define HRT_INTERVAL_MIN 5 +#define HRT_INTERVAL_MAX 4294000000 + +/* +* Period of the free-running counter, in microseconds. +*/ +#define HRT_COUNTER_PERIOD 4294967296LL + +/* +* Scaling factor(s) for the free-running counter; convert an input +* in counts to a time in microseconds. +*/ +#define HRT_COUNTER_SCALE(_c) (_c) + +/* Register accessors */ + +#define _REG(_addr) (*(volatile uint32_t *)(_addr)) + +/* Timer register accessors */ + +#define REG(_reg) _REG(HRT_TIMER_BASE + (_reg)) + +#define rCR REG(IMXRT_GPT_CR_OFFSET) +#define rPR REG(IMXRT_GPT_PR_OFFSET) +#define rSR REG(IMXRT_GPT_SR_OFFSET) +#define rIR REG(IMXRT_GPT_IR_OFFSET) +#define rOCR1 REG(IMXRT_GPT_OCR1_OFFSET) +#define rOCR2 REG(IMXRT_GPT_OCR2_OFFSET) +#define rOCR3 REG(IMXRT_GPT_OCR3_OFFSET) +#define rICR1 REG(IMXRT_GPT_ICR1_OFFSET) +#define rICR2 REG(IMXRT_GPT_ICR2_OFFSET) +#define rCNT REG(IMXRT_GPT_CNT_OFFSET) + +/* +* Specific registers and bits used by HRT sub-functions +*/ + +# define rOCR_HRT CAT(rOCR, HRT_TIMER_CHANNEL) /* GPT Output Compare Register used by HRT */ +# define STATUS_HRT CAT(GPT_SR_OF, HRT_TIMER_CHANNEL) /* OF Output Compare Flag */ +# define OFIE_HRT CAT3(GPT_IR_OF, HRT_TIMER_CHANNEL,IE) /* Output Compare Interrupt Enable */ + +#if (HRT_TIMER_CHANNEL > 1) || (HRT_TIMER_CHANNEL > 3) +# error HRT_TIMER_CHANNEL must be a value between 1 and 3 +#endif + +/* + * Queue of callout entries. + */ +static struct sq_queue_s callout_queue; + +/* latency baseline (last compare value applied) */ +static uint32_t latency_baseline; + +/* timer count at interrupt (for latency purposes) */ +static uint32_t latency_actual; + +/* timer-specific functions */ +static void hrt_tim_init(void); +static int hrt_tim_isr(int irq, void *context, void *args); +static void hrt_latency_update(void); + +/* callout list manipulation */ +static void hrt_call_internal(struct hrt_call *entry, hrt_abstime deadline, hrt_abstime interval, hrt_callout callout, + void *arg); +static void hrt_call_enter(struct hrt_call *entry); +static void hrt_call_reschedule(void); +static void hrt_call_invoke(void); + +#if !defined(HRT_PPM_CHANNEL) + +/* When HRT_PPM_CHANNEL is not used provide null operations */ + +# define GPT_CR_IM_BOTH 0 +# define STATUS_PPM 0 +# define IFIE_PPM 0 + +#else + +/* Specific registers and bits used by PPM sub-functions */ + +# define rICR_PPM CAT(rICR, HRT_PPM_CHANNEL) /* GPT Input Capture Register used by PPL */ +# define GPT_CR_IM_BOTH CAT3(GPT_CR_IM, HRT_PPM_CHANNEL, _BOTH) /* GPT Capture mode both */ +# define STATUS_PPM CAT(GPT_SR_IF, HRT_PPM_CHANNEL) /* IF Input capture Flag */ +# define IFIE_PPM CAT3(GPT_IR_IF, HRT_PPM_CHANNEL,IE) /* Output Compare Interrupt Enable */ + +/* Sanity checking */ + +# if (HRT_PPM_CHANNEL != 1) && (HRT_PPM_CHANNEL != 2) +# error HRT_PPM_CHANNEL must be a value of 1 or 2 +# endif + +# if (HRT_PPM_CHANNEL == HRT_TIMER_CHANNEL) +# error HRT_PPM_CHANNEL must not be the same as HRT_TIMER_CHANNEL +# endif +/* + * PPM decoder tuning parameters + */ +# define PPM_MIN_PULSE_WIDTH 200 /**< minimum width of a valid first pulse */ +# define PPM_MAX_PULSE_WIDTH 600 /**< maximum width of a valid first pulse */ +# define PPM_MIN_CHANNEL_VALUE 800 /**< shortest valid channel signal */ +# define PPM_MAX_CHANNEL_VALUE 2200 /**< longest valid channel signal */ +# define PPM_MIN_START 2300 /**< shortest valid start gap (only 2nd part of pulse) */ + +/* decoded PPM buffer */ + +# define PPM_MIN_CHANNELS 5 +# define PPM_MAX_CHANNELS 20 + +/** Number of same-sized frames required to 'lock' */ + +# define PPM_CHANNEL_LOCK 4 /**< should be less than the input timeout */ + +__EXPORT uint16_t ppm_buffer[PPM_MAX_CHANNELS]; +__EXPORT uint16_t ppm_frame_length = 0; +__EXPORT unsigned ppm_decoded_channels = 0; +__EXPORT uint64_t ppm_last_valid_decode = 0; + + +# if defined(PPM_DEBUG) + +# define EDGE_BUFFER_COUNT 32 + +/* PPM edge history */ + +__EXPORT uint32_t ppm_edge_history[EDGE_BUFFER_COUNT]; +unsigned ppm_edge_next; + +/* PPM pulse history */ + +__EXPORT uint32_t ppm_pulse_history[EDGE_BUFFER_COUNT]; +unsigned ppm_pulse_next; +# endif + +static uint32_t ppm_temp_buffer[PPM_MAX_CHANNELS]; + +/** PPM decoder state machine */ +struct { + uint32_t last_edge; /**< last capture time */ + uint32_t last_mark; /**< last significant edge */ + uint32_t frame_start; /**< the frame width */ + unsigned next_channel; /**< next channel index */ + enum { + UNSYNCH = 0, + ARM, + ACTIVE, + INACTIVE + } phase; +} ppm; + +static void hrt_ppm_decode(uint32_t status); +#endif /* HRT_PPM_CHANNEL */ + +/** + * Initialize the timer we are going to use. + */ +static void hrt_tim_init(void) +{ + /* Enable the Module clock */ + + HRT_CLOCK_ALL(); + + + /* claim our interrupt vector */ + + irq_attach(HRT_TIMER_VECTOR, hrt_tim_isr, NULL); + + /* disable and configure the timer */ + + rCR = 0; + + rCR = GPT_CR_OM1_DIS | GPT_CR_OM2_DIS | GPT_CR_OM3_DIS | + GPT_CR_IM_BOTH | GPT_CR_FRR | GPT_CR_CLKSRC_IPG | GPT_CR_ENMOD; + + /* CLKSRC field is divided by [PRESCALER + 1] */ + + rPR = (HRT_TIMER_CLOCK / HRT_TIMER_FREQ) - 1; + + /* set an initial capture a little ways off */ + + rOCR_HRT = 1000; + + /* enable interrupts */ + up_enable_irq(HRT_TIMER_VECTOR); + + rIR = IFIE_PPM | OFIE_HRT; + + /* enable the timer */ + + rCR |= GPT_CR_EN; + +} + +#ifdef HRT_PPM_CHANNEL +/** + * Handle the PPM decoder state machine. + */ +static void hrt_ppm_decode(uint32_t status) +{ + uint32_t count = rICR_PPM; + uint32_t width; + uint32_t interval; + unsigned i; + + /* how long since the last edge? - this handles counter wrapping implicitly. */ + width = count - ppm.last_edge; + +#if PPM_DEBUG + ppm_edge_history[ppm_edge_next++] = width; + + if (ppm_edge_next >= EDGE_BUFFER_COUNT) { + ppm_edge_next = 0; + } + +#endif + + /* + * if this looks like a start pulse, then push the last set of values + * and reset the state machine + */ + if (width >= PPM_MIN_START) { + + /* + * If the number of channels changes unexpectedly, we don't want + * to just immediately jump on the new count as it may be a result + * of noise or dropped edges. Instead, take a few frames to settle. + */ + if (ppm.next_channel != ppm_decoded_channels) { + static unsigned new_channel_count; + static unsigned new_channel_holdoff; + + if (new_channel_count != ppm.next_channel) { + /* start the lock counter for the new channel count */ + new_channel_count = ppm.next_channel; + new_channel_holdoff = PPM_CHANNEL_LOCK; + + } else if (new_channel_holdoff > 0) { + /* this frame matched the last one, decrement the lock counter */ + new_channel_holdoff--; + + } else { + /* we have seen PPM_CHANNEL_LOCK frames with the new count, accept it */ + ppm_decoded_channels = new_channel_count; + new_channel_count = 0; + } + + } else { + /* frame channel count matches expected, let's use it */ + if (ppm.next_channel >= PPM_MIN_CHANNELS) { + for (i = 0; i < ppm.next_channel; i++) { + ppm_buffer[i] = ppm_temp_buffer[i]; + } + + ppm_last_valid_decode = hrt_absolute_time(); + + } + } + + /* reset for the next frame */ + ppm.next_channel = 0; + + /* next edge is the reference for the first channel */ + ppm.phase = ARM; + + ppm.last_edge = count; + return; + } + + switch (ppm.phase) { + case UNSYNCH: + /* we are waiting for a start pulse - nothing useful to do here */ + break; + + case ARM: + + /* we expect a pulse giving us the first mark */ + if (width < PPM_MIN_PULSE_WIDTH || width > PPM_MAX_PULSE_WIDTH) { + goto error; /* pulse was too short or too long */ + } + + /* record the mark timing, expect an inactive edge */ + ppm.last_mark = ppm.last_edge; + + /* frame length is everything including the start gap */ + ppm_frame_length = (uint16_t)(ppm.last_edge - ppm.frame_start); + ppm.frame_start = ppm.last_edge; + ppm.phase = ACTIVE; + break; + + case INACTIVE: + + /* we expect a short pulse */ + if (width < PPM_MIN_PULSE_WIDTH || width > PPM_MAX_PULSE_WIDTH) { + goto error; /* pulse was too short or too long */ + } + + /* this edge is not interesting, but now we are ready for the next mark */ + ppm.phase = ACTIVE; + break; + + case ACTIVE: + /* determine the interval from the last mark */ + interval = count - ppm.last_mark; + ppm.last_mark = count; + +#if PPM_DEBUG + ppm_pulse_history[ppm_pulse_next++] = interval; + + if (ppm_pulse_next >= EDGE_BUFFER_COUNT) { + ppm_pulse_next = 0; + } + +#endif + + /* if the mark-mark timing is out of bounds, abandon the frame */ + if ((interval < PPM_MIN_CHANNEL_VALUE) || (interval > PPM_MAX_CHANNEL_VALUE)) { + goto error; + } + + /* if we have room to store the value, do so */ + if (ppm.next_channel < PPM_MAX_CHANNELS) { + ppm_temp_buffer[ppm.next_channel++] = interval; + } + + ppm.phase = INACTIVE; + break; + + } + + ppm.last_edge = count; + return; + + /* the state machine is corrupted; reset it */ + +error: + /* we don't like the state of the decoder, reset it and try again */ + ppm.phase = UNSYNCH; + ppm_decoded_channels = 0; + +} +#endif /* HRT_PPM_CHANNEL */ + +/** + * Handle the compare interrupt by calling the callout dispatcher + * and then re-scheduling the next deadline. + */ +static int +hrt_tim_isr(int irq, void *context, void *arg) +{ + /* grab the timer for latency tracking purposes */ + + latency_actual = rCNT; + + /* copy interrupt status */ + uint32_t status = rSR; + + /* ack the interrupts we just read */ + + rSR = status; + +#ifdef HRT_PPM_CHANNEL + + /* was this a PPM edge? */ + if (status & (STATUS_PPM)) { + hrt_ppm_decode(status); + } + +#endif + + /* was this a timer tick? */ + if (status & STATUS_HRT) { + + /* do latency calculations */ + hrt_latency_update(); + + /* run any callouts that have met their deadline */ + hrt_call_invoke(); + + /* and schedule the next interrupt */ + hrt_call_reschedule(); + } + + return OK; +} + +/** + * Fetch a never-wrapping absolute time value in microseconds from + * some arbitrary epoch shortly after system start. + */ +hrt_abstime +hrt_absolute_time(void) +{ + hrt_abstime abstime; + uint32_t count; + irqstate_t flags; + + /* + * Counter state. Marked volatile as they may change + * inside this routine but outside the irqsave/restore + * pair. Discourage the compiler from moving loads/stores + * to these outside of the protected range. + */ + static volatile hrt_abstime base_time; + static volatile uint32_t last_count; + + /* prevent re-entry */ + flags = px4_enter_critical_section(); + + /* get the current counter value */ + count = rCNT; + + /* + * Determine whether the counter has wrapped since the + * last time we're called. + * + * This simple test is sufficient due to the guarantee that + * we are always called at least once per counter period. + */ + if (count < last_count) { + base_time += HRT_COUNTER_PERIOD; + } + + /* save the count for next time */ + last_count = count; + + /* compute the current time */ + abstime = HRT_COUNTER_SCALE(base_time + count); + + px4_leave_critical_section(flags); + + return abstime; +} + +/** + * Convert a timespec to absolute time + */ +hrt_abstime +ts_to_abstime(const struct timespec *ts) +{ + hrt_abstime result; + + result = (hrt_abstime)(ts->tv_sec) * 1000000; + result += ts->tv_nsec / 1000; + + return result; +} + +/** + * Convert absolute time to a timespec. + */ +void +abstime_to_ts(struct timespec *ts, hrt_abstime abstime) +{ + ts->tv_sec = abstime / 1000000; + abstime -= ts->tv_sec * 1000000; + ts->tv_nsec = abstime * 1000; +} + +/** + * Compare a time value with the current time as atomic operation. + */ +hrt_abstime +hrt_elapsed_time_atomic(const volatile hrt_abstime *then) +{ + irqstate_t flags = px4_enter_critical_section(); + + hrt_abstime delta = hrt_absolute_time() - *then; + + px4_leave_critical_section(flags); + + return delta; +} + +/** + * Store the absolute time in an interrupt-safe fashion + */ +hrt_abstime +hrt_store_absolute_time(volatile hrt_abstime *now) +{ + irqstate_t flags = px4_enter_critical_section(); + + hrt_abstime ts = hrt_absolute_time(); + + px4_leave_critical_section(flags); + + return ts; +} + +/** + * Initialize the high-resolution timing module. + */ +void +hrt_init(void) +{ + sq_init(&callout_queue); + hrt_tim_init(); + +#ifdef HRT_PPM_CHANNEL + /* configure the PPM input pin */ + px4_arch_configgpio(GPIO_PPM_IN); +#endif +} + +/** + * Call callout(arg) after interval has elapsed. + */ +void +hrt_call_after(struct hrt_call *entry, hrt_abstime delay, hrt_callout callout, void *arg) +{ + hrt_call_internal(entry, + hrt_absolute_time() + delay, + 0, + callout, + arg); +} + +/** + * Call callout(arg) at calltime. + */ +void +hrt_call_at(struct hrt_call *entry, hrt_abstime calltime, hrt_callout callout, void *arg) +{ + hrt_call_internal(entry, calltime, 0, callout, arg); +} + +/** + * Call callout(arg) every period. + */ +void +hrt_call_every(struct hrt_call *entry, hrt_abstime delay, hrt_abstime interval, hrt_callout callout, void *arg) +{ + hrt_call_internal(entry, + hrt_absolute_time() + delay, + interval, + callout, + arg); +} + +static void +hrt_call_internal(struct hrt_call *entry, hrt_abstime deadline, hrt_abstime interval, hrt_callout callout, void *arg) +{ + irqstate_t flags = px4_enter_critical_section(); + + /* if the entry is currently queued, remove it */ + /* note that we are using a potentially uninitialized + entry->link here, but it is safe as sq_rem() doesn't + dereference the passed node unless it is found in the + list. So we potentially waste a bit of time searching the + queue for the uninitialized entry->link but we don't do + anything actually unsafe. + */ + if (entry->deadline != 0) { + sq_rem(&entry->link, &callout_queue); + } + + entry->deadline = deadline; + entry->period = interval; + entry->callout = callout; + entry->arg = arg; + + hrt_call_enter(entry); + + px4_leave_critical_section(flags); +} + +/** + * If this returns true, the call has been invoked and removed from the callout list. + * + * Always returns false for repeating callouts. + */ +bool +hrt_called(struct hrt_call *entry) +{ + return (entry->deadline == 0); +} + +/** + * Remove the entry from the callout list. + */ +void +hrt_cancel(struct hrt_call *entry) +{ + irqstate_t flags = px4_enter_critical_section(); + + sq_rem(&entry->link, &callout_queue); + entry->deadline = 0; + + /* if this is a periodic call being removed by the callout, prevent it from + * being re-entered when the callout returns. + */ + entry->period = 0; + + px4_leave_critical_section(flags); +} + +static void +hrt_call_enter(struct hrt_call *entry) +{ + struct hrt_call *call, *next; + + call = (struct hrt_call *)sq_peek(&callout_queue); + + if ((call == NULL) || (entry->deadline < call->deadline)) { + sq_addfirst(&entry->link, &callout_queue); + hrtinfo("call enter at head, reschedule\n"); + /* we changed the next deadline, reschedule the timer event */ + hrt_call_reschedule(); + + } else { + do { + next = (struct hrt_call *)sq_next(&call->link); + + if ((next == NULL) || (entry->deadline < next->deadline)) { + hrtinfo("call enter after head\n"); + sq_addafter(&call->link, &entry->link, &callout_queue); + break; + } + } while ((call = next) != NULL); + } + + hrtinfo("scheduled\n"); +} + +static void +hrt_call_invoke(void) +{ + struct hrt_call *call; + hrt_abstime deadline; + + while (true) { + /* get the current time */ + hrt_abstime now = hrt_absolute_time(); + + call = (struct hrt_call *)sq_peek(&callout_queue); + + if (call == NULL) { + break; + } + + if (call->deadline > now) { + break; + } + + sq_rem(&call->link, &callout_queue); + hrtinfo("call pop\n"); + + /* save the intended deadline for periodic calls */ + deadline = call->deadline; + + /* zero the deadline, as the call has occurred */ + call->deadline = 0; + + /* invoke the callout (if there is one) */ + if (call->callout) { + hrtinfo("call %p: %p(%p)\n", call, call->callout, call->arg); + call->callout(call->arg); + } + + /* if the callout has a non-zero period, it has to be re-entered */ + if (call->period != 0) { + // re-check call->deadline to allow for + // callouts to re-schedule themselves + // using hrt_call_delay() + if (call->deadline <= now) { + call->deadline = deadline + call->period; + } + + hrt_call_enter(call); + } + } +} + +/** + * Reschedule the next timer interrupt. + * + * This routine must be called with interrupts disabled. + */ +static void +hrt_call_reschedule() +{ + hrt_abstime now = hrt_absolute_time(); + struct hrt_call *next = (struct hrt_call *)sq_peek(&callout_queue); + hrt_abstime deadline = now + HRT_INTERVAL_MAX; + + /* + * Determine what the next deadline will be. + * + * Note that we ensure that this will be within the counter + * period, so that when we truncate all but the low 16 bits + * the next time the compare matches it will be the deadline + * we want. + * + * It is important for accurate timekeeping that the compare + * interrupt fires sufficiently often that the base_time update in + * hrt_absolute_time runs at least once per timer period. + */ + if (next != NULL) { + hrtinfo("entry in queue\n"); + + if (next->deadline <= (now + HRT_INTERVAL_MIN)) { + hrtinfo("pre-expired\n"); + /* set a minimal deadline so that we call ASAP */ + deadline = now + HRT_INTERVAL_MIN; + + } else if (next->deadline < deadline) { + hrtinfo("due soon\n"); + deadline = next->deadline; + } + } + + hrtinfo("schedule for %ul at %ul\n", (unsigned long)(deadline & 0xffffffff), (unsigned long)(now & 0xffffffff)); + + /* set the new compare value and remember it for latency tracking */ + + rOCR_HRT = latency_baseline = deadline; + +} + +static void +hrt_latency_update(void) +{ + uint16_t latency = latency_actual - latency_baseline; + unsigned index; + + /* bounded buckets */ + for (index = 0; index < LATENCY_BUCKET_COUNT; index++) { + if (latency <= latency_buckets[index]) { + latency_counters[index]++; + return; + } + } + + /* catch-all at the end */ + latency_counters[index]++; +} + +void +hrt_call_init(struct hrt_call *entry) +{ + memset(entry, 0, sizeof(*entry)); +} + +void +hrt_call_delay(struct hrt_call *entry, hrt_abstime delay) +{ + entry->deadline = hrt_absolute_time() + delay; +} + +#endif /* HRT_TIMER */ diff --git a/src/drivers/imxrt/drv_input_capture.c b/src/drivers/imxrt/drv_input_capture.c new file mode 100644 index 000000000000..528e0dfc0846 --- /dev/null +++ b/src/drivers/imxrt/drv_input_capture.c @@ -0,0 +1,332 @@ +/**************************************************************************** + * + * Copyright (C) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* + * @file drv_input_capture.c + * + * Servo driver supporting input capture connected to imxrt timer blocks. + * + * Works with any FLEXPWN that have input pins. + * + * Require an interrupt. + * + * + */ + +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "drv_io_timer.h" + +#include "drv_input_capture.h" + +#include +#include "chip/imxrt_flexpwm.h" + +#define MAX_CHANNELS_PER_TIMER 2 + +#define SM_SPACING (IMXRT_FLEXPWM_SM1CNT_OFFSET-IMXRT_FLEXPWM_SM0CNT_OFFSET) + +#define _REG(_addr) (*(volatile uint16_t *)(_addr)) +#define _REG16(_base, _reg) (*(volatile uint16_t *)(_base + _reg)) +#define REG(_tmr, _sm, _reg) _REG16(io_timers[(_tmr)].base + ((_sm) * SM_SPACING), (_reg)) + +static input_capture_stats_t channel_stats[MAX_TIMER_IO_CHANNELS]; + +static struct channel_handler_entry { + capture_callback_t callback; + void *context; +} channel_handlers[MAX_TIMER_IO_CHANNELS]; + +static void input_capture_chan_handler(void *context, const io_timers_t *timer, uint32_t chan_index, + const timer_io_channels_t *chan, + hrt_abstime isrs_time, uint16_t isrs_rcnt, + uint16_t capture) +{ + channel_stats[chan_index].last_edge = px4_arch_gpioread(chan->gpio_in); + + if ((isrs_rcnt - capture) > channel_stats[chan_index].latnecy) { + channel_stats[chan_index].latnecy = (isrs_rcnt - capture); + } + + channel_stats[chan_index].chan_in_edges_out++; + channel_stats[chan_index].last_time = isrs_time - (isrs_rcnt - capture); + uint32_t overflow = 0;//_REG32(timer, KINETIS_FTM_CSC_OFFSET(chan->timer_channel - 1)) & FTM_CSC_CHF; + + if (overflow) { + + /* Error we has a second edge before we cleared CCxR */ + + channel_stats[chan_index].overflows++; + } + + if (channel_handlers[chan_index].callback) { + channel_handlers[chan_index].callback(channel_handlers[chan_index].context, chan_index, + channel_stats[chan_index].last_time, + channel_stats[chan_index].last_edge, overflow); + } +} + +static void input_capture_bind(unsigned channel, capture_callback_t callback, void *context) +{ + irqstate_t flags = px4_enter_critical_section(); + channel_handlers[channel].callback = callback; + channel_handlers[channel].context = context; + px4_leave_critical_section(flags); +} + +static void input_capture_unbind(unsigned channel) +{ + input_capture_bind(channel, NULL, NULL); +} + +int up_input_capture_set(unsigned channel, input_capture_edge edge, capture_filter_t filter, + capture_callback_t callback, void *context) +{ + if (edge > Both) { + return -EINVAL; + } + + int rv = io_timer_validate_channel_index(channel); + + if (rv == 0) { + + if (edge == Disabled) { + + io_timer_set_enable(false, IOTimerChanMode_Capture, 1 << channel); + input_capture_unbind(channel); + + } else { + + if (-EBUSY == io_timer_is_channel_free(channel)) { + io_timer_free_channel(channel); + } + + input_capture_bind(channel, callback, context); + + rv = io_timer_channel_init(channel, IOTimerChanMode_Capture, input_capture_chan_handler, context); + + if (rv != 0) { + return rv; + } + + rv = up_input_capture_set_filter(channel, filter); + + if (rv == 0) { + rv = up_input_capture_set_trigger(channel, edge); + + if (rv == 0) { + rv = io_timer_set_enable(true, IOTimerChanMode_Capture, 1 << channel); + } + } + } + } + + return rv; +} + +int up_input_capture_get_filter(unsigned channel, capture_filter_t *filter) +{ + return 0; +} +int up_input_capture_set_filter(unsigned channel, capture_filter_t filter) +{ + return 0; +} + +int up_input_capture_get_trigger(unsigned channel, input_capture_edge *edge) +{ + int rv = io_timer_validate_channel_index(channel); + + if (rv == 0) { + + rv = -ENXIO; + + /* Any pins in capture mode */ + + if (io_timer_get_channel_mode(channel) == IOTimerChanMode_Capture) { + + rv = OK; + + uint32_t timer = timer_io_channels[channel].timer_index; + uint32_t offset = timer_io_channels[channel].val_offset == PWMA_VAL ? IMXRT_FLEXPWM_SM0CAPTCTRLA_OFFSET : + IMXRT_FLEXPWM_SM0CAPTCTRLB_OFFSET; + uint32_t rvalue = REG(timer, timer_io_channels[channel].sub_module, offset); + rvalue &= SMC_EDGA0_BOTH; + + switch (rvalue) { + + case (SMC_EDGA0_RISING): + *edge = Rising; + break; + + case (SMC_EDGA0_FALLING): + *edge = Falling; + break; + + case (SMC_EDGA0_BOTH): + *edge = Both; + break; + + default: + rv = -EIO; + } + } + } + + return rv; +} +int up_input_capture_set_trigger(unsigned channel, input_capture_edge edge) +{ + int rv = io_timer_validate_channel_index(channel); + + if (rv == 0) { + + rv = -ENXIO; + + /* Any pins in capture mode */ + + if (io_timer_get_channel_mode(channel) == IOTimerChanMode_Capture) { + + uint16_t edge_bits = 0; + + switch (edge) { + case Disabled: + break; + + case Rising: + edge_bits = SMC_EDGA0_RISING; + break; + + case Falling: + edge_bits = SMC_EDGA0_FALLING; + break; + + case Both: + edge_bits = SMC_EDGA0_BOTH; + break; + + default: + return -EINVAL;; + } + + uint32_t timer = timer_io_channels[channel].timer_index; + uint32_t offset = timer_io_channels[channel].val_offset == PWMA_VAL ? IMXRT_FLEXPWM_SM0CAPTCTRLA_OFFSET : + IMXRT_FLEXPWM_SM0CAPTCTRLB_OFFSET; + irqstate_t flags = px4_enter_critical_section(); + uint32_t rvalue = REG(timer, timer_io_channels[channel].sub_module, offset); + rvalue &= ~SMC_EDGA0_BOTH; + rvalue |= edge_bits; + REG(timer, timer_io_channels[channel].sub_module, offset) = rvalue; + px4_leave_critical_section(flags); + rv = OK; + } + } + + return rv; +} + +int up_input_capture_get_callback(unsigned channel, capture_callback_t *callback, void **context) +{ + int rv = io_timer_validate_channel_index(channel); + + if (rv == 0) { + + rv = -ENXIO; + + /* Any pins in capture mode */ + + if (io_timer_get_channel_mode(channel) == IOTimerChanMode_Capture) { + + irqstate_t flags = px4_enter_critical_section(); + *callback = channel_handlers[channel].callback; + *context = channel_handlers[channel].context; + px4_leave_critical_section(flags); + rv = OK; + } + } + + return rv; + +} + +int up_input_capture_set_callback(unsigned channel, capture_callback_t callback, void *context) +{ + int rv = io_timer_validate_channel_index(channel); + + if (rv == 0) { + + rv = -ENXIO; + + /* Any pins in capture mode */ + + if (io_timer_get_channel_mode(channel) == IOTimerChanMode_Capture) { + input_capture_bind(channel, callback, context); + rv = 0; + } + } + + return rv; +} + +int up_input_capture_get_stats(unsigned channel, input_capture_stats_t *stats, bool clear) +{ + int rv = io_timer_validate_channel_index(channel); + + if (rv == 0) { + irqstate_t flags = px4_enter_critical_section(); + *stats = channel_stats[channel]; + + if (clear) { + memset(&channel_stats[channel], 0, sizeof(*stats)); + } + + px4_leave_critical_section(flags); + } + + return rv; +} diff --git a/src/drivers/imxrt/drv_input_capture.h b/src/drivers/imxrt/drv_input_capture.h new file mode 100644 index 000000000000..f47522c1b67d --- /dev/null +++ b/src/drivers/imxrt/drv_input_capture.h @@ -0,0 +1,42 @@ +/**************************************************************************** + * + * Copyright (C) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file drv_input_capture.h + * + * imxrt-specific input capture data. + */ + +#pragma once + +#include diff --git a/src/drivers/imxrt/drv_io_timer.c b/src/drivers/imxrt/drv_io_timer.c new file mode 100644 index 000000000000..78a98bd6a1ca --- /dev/null +++ b/src/drivers/imxrt/drv_io_timer.c @@ -0,0 +1,733 @@ +/**************************************************************************** + * + * Copyright (C) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* + * @file drv_io_timer.c + * + * Servo driver supporting PWM servos connected to imxrt FLEXPWM blocks. + */ + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "drv_io_timer.h" + +#include +#include "chip/imxrt_flexpwm.h" +#include "imxrt_periphclks.h" + +#if !defined(BOARD_PWM_FREQ) +#define BOARD_PWM_FREQ 1000000 +#endif + +#if !defined(BOARD_ONESHOT_FREQ) +#define BOARD_ONESHOT_FREQ 8000000 +#endif + +#define FLEXPWM_SRC_CLOCK_FREQ 16000000 + +#define MAX_CHANNELS_PER_TIMER 2 + +#define SM_SPACING (IMXRT_FLEXPWM_SM1CNT_OFFSET-IMXRT_FLEXPWM_SM0CNT_OFFSET) + +#define _REG(_addr) (*(volatile uint16_t *)(_addr)) +#define _REG16(_base, _reg) (*(volatile uint16_t *)(_base + _reg)) +#define REG(_tmr, _sm, _reg) _REG16(io_timers[(_tmr)].base + ((_sm) * SM_SPACING), (_reg)) + + +/* Timer register accessors */ + +#define rCNT(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CNT_OFFSET) /* Counter Register */ +#define rINIT(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0INIT_OFFSET) /* Initial Count Register */ +#define rCTRL2(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CTRL2_OFFSET) /* Control 2 Register */ +#define rCTRL(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CTRL_OFFSET) /* Control Register */ +#define rVAL0(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL0_OFFSET) /* Value Register 0 */ +#define rFRACVAL1(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0FRACVAL1_OFFSET) /* Fractional Value Register 1 */ +#define rVAL1(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL1_OFFSET) /* Value Register 1 */ +#define rFRACVAL2(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0FRACVAL2_OFFSET) /* Fractional Value Register 2 */ +#define rVAL2(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL2_OFFSET) /* Value Register 2 */ +#define rFRACVAL3(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0FRACVAL3_OFFSET) /* Fractional Value Register 3 */ +#define rVAL3(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL3_OFFSET) /* Value Register 3 */ +#define rFRACVAL4(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0FRACVAL4_OFFSET) /* Fractional Value Register 4 */ +#define rVAL4(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL4_OFFSET) /* Value Register 4 */ +#define rFRACVAL5(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0FRACVAL5_OFFSET) /* Fractional Value Register 5 */ +#define rVAL5(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0VAL5_OFFSET) /* Value Register 5 */ +#define rFRCTRL(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0FRCTRL_OFFSET) /* Fractional Control Register */ +#define rOCTRL(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0OCTRL_OFFSET) /* Output Control Register */ +#define rSTS(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0STS_OFFSET) /* Status Register */ +#define rINTEN(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0INTEN_OFFSET) /* Interrupt Enable Register */ +#define rDMAEN(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0DMAEN_OFFSET) /* DMA Enable Register */ +#define rTCTRL(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0TCTRL_OFFSET) /* Output Trigger Control Register */ +#define rDISMAP0(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0DISMAP0_OFFSET) /* Fault Disable Mapping Register 0 */ +#define rDISMAP1(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0DISMAP1_OFFSET) /* Fault Disable Mapping Register 1 */ +#define rDTCNT0(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0DTCNT0_OFFSET) /* Deadtime Count Register 0 */ +#define rDTCNT1(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0DTCNT1_OFFSET) /* Deadtime Count Register 1 */ +#define rCAPTCTRLA(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CAPTCTRLA_OFFSET) /* Capture Control A Register */ +#define rCAPTCOMPA(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CAPTCOMPA_OFFSET) /* Capture Compare A Register */ +#define rCAPTCTRLB(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CAPTCTRLB_OFFSET) /* Capture Control B Register */ +#define rCAPTCOMPB(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CAPTCOMPB_OFFSET) /* Capture Compare B Register */ +#define rCAPTCTRLX(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CAPTCTRLX_OFFSET) /* Capture Control X Register */ +#define rCAPTCOMPX(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CAPTCOMPX_OFFSET) /* Capture Compare X Register */ +#define rCVAL0(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL0_OFFSET) /* Capture Value 0 Register */ +#define rCVAL0CYC(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL0CYC_OFFSET) /* Capture Value 0 Cycle Register */ +#define rCVAL1(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL1_OFFSET) /* Capture Value 1 Register */ +#define rCVAL1CYC(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL1CYC_OFFSET) /* Capture Value 1 Cycle Register */ +#define rCVAL2(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL2_OFFSET) /* Capture Value 2 Register */ +#define rCVAL2CYC(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL2CYC_OFFSET) /* Capture Value 2 Cycle Register */ +#define rCVAL3(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL3_OFFSET) /* Capture Value 3 Register */ +#define rCVAL3CYC(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL3CYC_OFFSET) /* Capture Value 3 Cycle Register */ +#define rCVAL4(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL4_OFFSET) /* Capture Value 4 Register */ +#define rCVAL4CYC(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL4CYC_OFFSET) /* Capture Value 4 Cycle Register */ +#define rCVAL5(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL5_OFFSET) /* Capture Value 5 Register */ +#define rCVAL5CYC(_tim, _sm) REG(_tim, _sm,IMXRT_FLEXPWM_SM0CVAL5CYC_OFFSET) /* Capture Value 5 Cycle Register */ + +#define rOUTEN(_tim) REG(_tim, 0, IMXRT_FLEXPWM_OUTEN_OFFSET) /* Output Enable Register */ +#define rMASK(_tim) REG(_tim, 0, IMXRT_FLEXPWM_MASK_OFFSET) /* Mask Register */ +#define rSWCOUT(_tim) REG(_tim, 0, IMXRT_FLEXPWM_SWCOUT_OFFSET) /* Software Controlled Output Register */ +#define rDTSRCSEL(_tim) REG(_tim, 0, IMXRT_FLEXPWM_DTSRCSEL_OFFSET) /* PWM Source Select Register */ +#define rMCTRL(_tim) REG(_tim, 0, IMXRT_FLEXPWM_MCTRL_OFFSET) /* Master Control Register */ +#define rMCTRL2(_tim) REG(_tim, 0, IMXRT_FLEXPWM_MCTRL2_OFFSET) /* Master Control 2 Register */ +#define rFCTRL0(_tim) REG(_tim, 0, IMXRT_FLEXPWM_FCTRL0_OFFSET) /* Fault Control Register */ +#define rFSTS0(_tim) REG(_tim, 0, IMXRT_FLEXPWM_FSTS0_OFFSET) /* Fault Status Register */ +#define rFFILT0(_tim) REG(_tim, 0, IMXRT_FLEXPWM_FFILT0_OFFSET) /* Fault Filter Register */ +#define rFTST0(_tim) REG(_tim, 0, IMXRT_FLEXPWM_FTST0_OFFSET) /* Fault Test Register */ +#define rFCTRL20(_tim) REG(_tim, 0, IMXRT_FLEXPWM_FCTRL20_OFFSET) /* Fault Control 2 Register */ + + +// NotUsed PWMOut PWMIn Capture OneShot Trigger +io_timer_channel_allocation_t channel_allocations[IOTimerChanModeSize] = { UINT16_MAX, 0, 0, 0, 0, 0 }; + +typedef uint8_t io_timer_allocation_t; /* big enough to hold MAX_IO_TIMERS */ + +static io_timer_allocation_t once = 0; + +typedef struct channel_stat_t { + uint32_t isr_cout; + uint32_t overflows; +} channel_stat_t; + +static channel_stat_t io_timer_channel_stats[MAX_TIMER_IO_CHANNELS]; + +static struct channel_handler_entry { + channel_handler_t callback; + void *context; +} channel_handlers[MAX_TIMER_IO_CHANNELS]; + + +static int io_timer_handler(uint16_t timer_index) +{ + // Not implemented yet + UNUSED(io_timer_channel_stats); + return 0; +} + +int io_timer_handler0(int irq, void *context, void *arg) +{ + + return io_timer_handler(0); +} + +int io_timer_handler1(int irq, void *context, void *arg) +{ + return io_timer_handler(1); + +} + +int io_timer_handler2(int irq, void *context, void *arg) +{ + return io_timer_handler(2); + +} + +int io_timer_handler3(int irq, void *context, void *arg) +{ + return io_timer_handler(3); + +} + +static inline int is_timer_uninitalized(unsigned timer) +{ + int rv = 0; + + if (once & 1 << timer) { + rv = -EBUSY; + } + + return rv; +} + +static inline void set_timer_initalized(unsigned timer) +{ + once |= 1 << timer; +} + + +static inline int channels_timer(unsigned channel) +{ + return timer_io_channels[channel].timer_index; +} + +static uint32_t get_channel_mask(unsigned channel) +{ + return io_timer_validate_channel_index(channel) == 0 ? 1 << channel : 0; +} + +int io_timer_is_channel_free(unsigned channel) +{ + int rv = io_timer_validate_channel_index(channel); + + if (rv == 0) { + if (0 == (channel_allocations[IOTimerChanMode_NotUsed] & (1 << channel))) { + rv = -EBUSY; + } + } + + return rv; +} + +int io_timer_validate_channel_index(unsigned channel) +{ + int rv = -EINVAL; + + if (channel < MAX_TIMER_IO_CHANNELS && timer_io_channels[channel].val_offset != 0) { + + /* test timer for validity */ + + if (io_timers[channels_timer(channel)].base != 0) { + rv = 0; + } + } + + return rv; +} + +int io_timer_get_mode_channels(io_timer_channel_mode_t mode) +{ + if (mode < IOTimerChanModeSize) { + return channel_allocations[mode]; + } + + return 0; +} + +int io_timer_get_channel_mode(unsigned channel) +{ + io_timer_channel_allocation_t bit = 1 << channel; + + for (int mode = IOTimerChanMode_NotUsed; mode < IOTimerChanModeSize; mode++) { + if (bit & channel_allocations[mode]) { + return mode; + } + } + + return -1; +} + +static int reallocate_channel_resources(uint32_t channels, io_timer_channel_mode_t mode, + io_timer_channel_mode_t new_mode) +{ + /* If caller mode is not based on current setting adjust it */ + + if ((channels & channel_allocations[IOTimerChanMode_NotUsed]) == channels) { + mode = IOTimerChanMode_NotUsed; + } + + /* Remove old set of channels from original */ + + channel_allocations[mode] &= ~channels; + + /* Will this change ?*/ + + uint32_t before = channel_allocations[new_mode] & channels; + + /* add in the new set */ + + channel_allocations[new_mode] |= channels; + + /* Indicate a mode change */ + + return before ^ channels; +} + +static inline int allocate_channel_resource(unsigned channel, io_timer_channel_mode_t mode) +{ + int rv = io_timer_is_channel_free(channel); + + if (rv == 0) { + io_timer_channel_allocation_t bit = 1 << channel; + channel_allocations[IOTimerChanMode_NotUsed] &= ~bit; + channel_allocations[mode] |= bit; + } + + return rv; +} + + +static inline int free_channel_resource(unsigned channel) +{ + int mode = io_timer_get_channel_mode(channel); + + if (mode > IOTimerChanMode_NotUsed) { + io_timer_channel_allocation_t bit = 1 << channel; + channel_allocations[mode] &= ~bit; + channel_allocations[IOTimerChanMode_NotUsed] |= bit; + } + + return mode; +} + +int io_timer_free_channel(unsigned channel) +{ + if (io_timer_validate_channel_index(channel) != 0) { + return -EINVAL; + } + + int mode = io_timer_get_channel_mode(channel); + + if (mode > IOTimerChanMode_NotUsed) { + io_timer_set_enable(false, mode, 1 << channel); + free_channel_resource(channel); + + } + + return 0; +} + + +static int allocate_channel(unsigned channel, io_timer_channel_mode_t mode) +{ + int rv = -EINVAL; + + if (mode != IOTimerChanMode_NotUsed) { + rv = io_timer_validate_channel_index(channel); + + if (rv == 0) { + rv = allocate_channel_resource(channel, mode); + } + } + + return rv; +} + +static int timer_set_rate(unsigned channel, unsigned rate) +{ + irqstate_t flags = px4_enter_critical_section(); + rMCTRL(channels_timer(channel)) |= (timer_io_channels[channel].sub_module_bits >> MCTRL_LDOK_SHIFT) << MCTRL_CLDOK_SHIFT + ; + rVAL1(channels_timer(channel), timer_io_channels[channel].sub_module) = (BOARD_PWM_FREQ / rate) - 1; + rMCTRL(channels_timer(channel)) |= timer_io_channels[channel].sub_module_bits; + px4_leave_critical_section(flags); + return 0; +} + +static inline void io_timer_set_oneshot_mode(unsigned channel) +{ + irqstate_t flags = px4_enter_critical_section(); + uint16_t rvalue = rCTRL(channels_timer(channel), timer_io_channels[channel].sub_module); + rvalue &= ~SMCTRL_PRSC_MASK; + rvalue |= SMCTRL_PRSC_DIV2 | SMCTRL_LDMOD; + rMCTRL(channels_timer(channel)) |= (timer_io_channels[channel].sub_module_bits >> MCTRL_LDOK_SHIFT) << MCTRL_CLDOK_SHIFT + ; + rCTRL(channels_timer(channel), timer_io_channels[channel].sub_module) = rvalue; + rMCTRL(channels_timer(channel)) |= timer_io_channels[channel].sub_module_bits; + px4_leave_critical_section(flags); + +} + +static inline void io_timer_set_PWM_mode(unsigned channel) +{ + irqstate_t flags = px4_enter_critical_section(); + uint16_t rvalue = rCTRL(channels_timer(channel), timer_io_channels[channel].sub_module); + rvalue &= ~(SMCTRL_PRSC_MASK | SMCTRL_LDMOD); + rvalue |= SMCTRL_PRSC_DIV16; + rMCTRL(channels_timer(channel)) |= (timer_io_channels[channel].sub_module_bits >> MCTRL_LDOK_SHIFT) << MCTRL_CLDOK_SHIFT + ; + rCTRL(channels_timer(channel), timer_io_channels[channel].sub_module) = rvalue; + rMCTRL(channels_timer(channel)) |= timer_io_channels[channel].sub_module_bits; + px4_leave_critical_section(flags); +} + +void io_timer_trigger(void) +{ + int oneshots = io_timer_get_mode_channels(IOTimerChanMode_OneShot); + struct { + uint32_t base; + uint16_t triggers; + } action_cache[MAX_IO_TIMERS] = {0}; + int actions = 0; + + /* Pre-calculate the list of channels to Trigger */ + int mask; + + for (int timer = 0; timer < MAX_IO_TIMERS; timer++) { + action_cache[actions].base = io_timers[timer].base; + + if (action_cache[actions].base) { + for (uint32_t channel = io_timers[timer].first_channel_index; + channel <= io_timers[timer].last_channel_index; channel++) { + mask = get_channel_mask(channel); + + if (oneshots & mask) { + action_cache[actions].triggers |= timer_io_channels[channel].sub_module_bits; + } + } + + actions++; + } + } + + /* Now do them all with the shortest delay in between */ + + irqstate_t flags = px4_enter_critical_section(); + + for (actions = 0; action_cache[actions].base != 0 && actions < MAX_IO_TIMERS; actions++) { + _REG16(action_cache[actions].base, IMXRT_FLEXPWM_MCTRL_OFFSET) |= (action_cache[actions].triggers >> MCTRL_LDOK_SHIFT) + << MCTRL_CLDOK_SHIFT ; + _REG16(action_cache[actions].base, IMXRT_FLEXPWM_MCTRL_OFFSET) |= action_cache[actions].triggers; + } + + px4_leave_critical_section(flags); +} + +int io_timer_init_timer(unsigned timer) +{ + /* Do this only once per timer */ + + int rv = is_timer_uninitalized(timer); + + if (rv == 0) { + + irqstate_t flags = px4_enter_critical_section(); + + set_timer_initalized(timer); + + /* enable the timer clock before we try to talk to it */ + + switch (io_timers[timer].base) { + case IMXRT_FLEXPWM1_BASE: + imxrt_clockall_pwm1(); + break; + + case IMXRT_FLEXPWM2_BASE: + imxrt_clockall_pwm2(); + break; + + case IMXRT_FLEXPWM3_BASE: + imxrt_clockall_pwm3(); + break; + + case IMXRT_FLEXPWM4_BASE: + imxrt_clockall_pwm4(); + break; + } + + for (uint32_t chan = io_timers[timer].first_channel_index; + chan <= io_timers[timer].last_channel_index; chan++) { + + /* Clear all Faults */ + rFSTS0(timer) = FSTS_FFLAG_MASK; + + rCTRL2(timer, timer_io_channels[chan].sub_module) = SMCTRL2_CLK_SEL_EXT_CLK | SMCTRL2_DBGEN | SMCTRL2_INDEP; + rCTRL(timer, timer_io_channels[chan].sub_module) = SMCTRL_PRSC_DIV16 | SMCTRL_FULL; + /* Edge aligned at 0 */ + rINIT(channels_timer(chan), timer_io_channels[chan].sub_module) = 0; + rVAL0(channels_timer(chan), timer_io_channels[chan].sub_module) = 0; + rVAL2(channels_timer(chan), timer_io_channels[chan].sub_module) = 0; + rVAL4(channels_timer(chan), timer_io_channels[chan].sub_module) = 0; + rFFILT0(timer) &= ~FFILT_FILT_PER_MASK; + rDISMAP0(timer, timer_io_channels[chan].sub_module) = 0xf000; + rDISMAP1(timer, timer_io_channels[chan].sub_module) = 0xf000; + rOUTEN(timer) |= timer_io_channels[chan].val_offset == PWMA_VAL ? OUTEN_PWMA_EN(1 << timer_io_channels[chan].sub_module) + : OUTEN_PWMB_EN(1 << timer_io_channels[chan].sub_module); + rDTSRCSEL(timer) = 0; + rMCTRL(timer) = MCTRL_LDOK(1 << timer_io_channels[chan].sub_module); + rMCTRL(timer) = timer_io_channels[chan].sub_module_bits; + io_timer_set_PWM_mode(chan); + timer_set_rate(chan, 50); + } + + px4_leave_critical_section(flags); + } + + return rv; +} + + +int io_timer_set_rate(unsigned channel, unsigned rate) +{ + int rv = EBUSY; + + /* Get the channel bits that belong to the channel */ + + uint32_t channels = get_channel_mask(channel); + + /* Check that all channels are either in PWM or Oneshot */ + + if ((channels & (channel_allocations[IOTimerChanMode_PWMOut] | + channel_allocations[IOTimerChanMode_OneShot] | + channel_allocations[IOTimerChanMode_NotUsed])) == + channels) { + + /* Change only a timer that is owned by pwm or one shot */ + + /* Request to use OneShot ?*/ + + if (rate == 0) { + + /* Request to use OneShot + * + * We are here because ALL these channels were either PWM or Oneshot + * Now they need to be Oneshot + */ + + /* Did the allocation change */ + if (reallocate_channel_resources(channels, IOTimerChanMode_PWMOut, IOTimerChanMode_OneShot)) { + io_timer_set_oneshot_mode(channel); + } + + } else { + + /* Request to use PWM + * + * We are here because ALL these channels were either PWM or Oneshot + * Now they need to be PWM + */ + + if (reallocate_channel_resources(channels, IOTimerChanMode_OneShot, IOTimerChanMode_PWMOut)) { + io_timer_set_PWM_mode(channel); + } + + timer_set_rate(channel, rate); + } + + rv = OK; + } + + return rv; +} + +int io_timer_channel_init(unsigned channel, io_timer_channel_mode_t mode, + channel_handler_t channel_handler, void *context) +{ + uint32_t gpio = 0; + + /* figure out the GPIO config first */ + + switch (mode) { + + case IOTimerChanMode_OneShot: + case IOTimerChanMode_PWMOut: + case IOTimerChanMode_Trigger: + gpio = timer_io_channels[channel].gpio_out; + break; + + case IOTimerChanMode_PWMIn: + case IOTimerChanMode_Capture: + return -EINVAL; + break; + + case IOTimerChanMode_NotUsed: + break; + + default: + return -EINVAL; + } + + int rv = allocate_channel(channel, mode); + + /* Valid channel should now be reserved in new mode */ + + if (rv >= 0) { + + unsigned timer = channels_timer(channel); + + /* Blindly try to initialize the timer - it will only do it once */ + + io_timer_init_timer(timer); + + irqstate_t flags = px4_enter_critical_section(); + + /* Set up IO */ + if (gpio) { + px4_arch_configgpio(gpio); + } + + /* configure the channel */ + + REG(timer, 0, IMXRT_FLEXPWM_MCTRL_OFFSET) |= MCTRL_RUN(1 << timer_io_channels[channel].sub_module); + + channel_handlers[channel].callback = channel_handler; + channel_handlers[channel].context = context; + px4_leave_critical_section(flags); + } + + return rv; +} + +int io_timer_set_enable(bool state, io_timer_channel_mode_t mode, io_timer_channel_allocation_t masks) +{ + switch (mode) { + case IOTimerChanMode_NotUsed: + case IOTimerChanMode_PWMOut: + case IOTimerChanMode_OneShot: + case IOTimerChanMode_Trigger: + break; + + case IOTimerChanMode_PWMIn: + case IOTimerChanMode_Capture: + default: + return -EINVAL; + } + + /* Was the request for all channels in this mode ?*/ + + if (masks == IO_TIMER_ALL_MODES_CHANNELS) { + + /* Yes - we provide them */ + + masks = channel_allocations[mode]; + + } else { + + /* No - caller provided mask */ + + /* Only allow the channels in that mode to be affected */ + + masks &= channel_allocations[mode]; + + } + + struct { + uint32_t sm_ens; + uint32_t base; + uint32_t io_index; + uint32_t gpios[MAX_TIMER_IO_CHANNELS]; + } action_cache[MAX_IO_TIMERS]; + + memset(action_cache, 0, sizeof(action_cache)); + + for (int chan_index = 0; masks != 0 && chan_index < MAX_TIMER_IO_CHANNELS; chan_index++) { + if (masks & (1 << chan_index)) { + masks &= ~(1 << chan_index); + + if (io_timer_validate_channel_index(chan_index) == 0) { + uint32_t timer_index = channels_timer(chan_index); + action_cache[timer_index].base = io_timers[timer_index].base; + action_cache[timer_index].sm_ens |= MCTRL_RUN(1 << timer_io_channels[chan_index].sub_module) | + timer_io_channels[chan_index].sub_module_bits; + action_cache[timer_index].gpios[action_cache[timer_index].io_index++] = timer_io_channels[chan_index].gpio_out; + } + } + } + + irqstate_t flags = px4_enter_critical_section(); + + for (unsigned actions = 0; actions < arraySize(action_cache); actions++) { + if (action_cache[actions].base != 0) { + for (unsigned int index = 0; index < action_cache[actions].io_index; index++) { + if (action_cache[actions].gpios[index]) { + px4_arch_configgpio(action_cache[actions].gpios[index]); + } + + _REG16(action_cache[actions].base, IMXRT_FLEXPWM_MCTRL_OFFSET) = action_cache[actions].sm_ens; + } + } + } + + px4_leave_critical_section(flags); + return 0; +} + +int io_timer_set_ccr(unsigned channel, uint16_t value) +{ + int rv = io_timer_validate_channel_index(channel); + int mode = io_timer_get_channel_mode(channel); + + if (rv == 0) { + if ((mode != IOTimerChanMode_PWMOut) && + (mode != IOTimerChanMode_OneShot) && + (mode != IOTimerChanMode_Trigger)) { + + rv = -EIO; + + } else { + irqstate_t flags = px4_enter_critical_section(); + rMCTRL(channels_timer(channel)) |= (timer_io_channels[channel].sub_module_bits >> MCTRL_LDOK_SHIFT) << MCTRL_CLDOK_SHIFT + ; + REG(channels_timer(channel), timer_io_channels[channel].sub_module, timer_io_channels[channel].val_offset) = value - 1; + rMCTRL(channels_timer(channel)) |= timer_io_channels[channel].sub_module_bits; + px4_leave_critical_section(flags); + } + } + + return rv; +} + +uint16_t io_channel_get_ccr(unsigned channel) +{ + uint16_t value = 0; + + if (io_timer_validate_channel_index(channel) == 0) { + int mode = io_timer_get_channel_mode(channel); + + if ((mode == IOTimerChanMode_PWMOut) || + (mode == IOTimerChanMode_OneShot) || + (mode == IOTimerChanMode_Trigger)) { + value = REG(channels_timer(channel), timer_io_channels[channel].sub_module, timer_io_channels[channel].val_offset) + 1; + } + } + + return value; +} + +// The rt has 1:1 group to channel +uint32_t io_timer_get_group(unsigned group) +{ + return get_channel_mask(group); +} diff --git a/src/drivers/imxrt/drv_io_timer.h b/src/drivers/imxrt/drv_io_timer.h new file mode 100644 index 000000000000..7202599f7b8c --- /dev/null +++ b/src/drivers/imxrt/drv_io_timer.h @@ -0,0 +1,142 @@ +/**************************************************************************** + * + * Copyright (C) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file drv_io_timer.h + * + * imxrt-specific PWM output data. + */ +#include +#include +#include + +#include + +#pragma once +__BEGIN_DECLS +/* configuration limits */ +#define MAX_IO_TIMERS 4 +#define MAX_TIMER_IO_CHANNELS 16 + +#define MAX_LED_TIMERS 2 +#define MAX_TIMER_LED_CHANNELS 6 + +#define IO_TIMER_ALL_MODES_CHANNELS 0 + +typedef enum io_timer_channel_mode_t { + IOTimerChanMode_NotUsed = 0, + IOTimerChanMode_PWMOut = 1, + IOTimerChanMode_PWMIn = 2, + IOTimerChanMode_Capture = 3, + IOTimerChanMode_OneShot = 4, + IOTimerChanMode_Trigger = 5, + IOTimerChanModeSize +} io_timer_channel_mode_t; + +typedef uint16_t io_timer_channel_allocation_t; /* big enough to hold MAX_TIMER_IO_CHANNELS */ + +/* array of timers dedicated to PWM in and out and TBD capture use + *** Timers are driven from QTIMER3_OUT0 + *** In PWM mode the timer's prescaler is set to achieve a counter frequency of 1MHz + *** In OneShot mode the timer's prescaler is set to achieve a counter frequency of 8MHz + *** Other prescaler rates can be achieved by fore instance by setting the clock_freq = 1Mhz + *** the resulting PSC will be one and the timer will count at it's clock frequency. + */ +typedef struct io_timers_t { + uint32_t base; /* Base address of the timer */ + uint32_t clock_register; /* SIM_SCGCn */ + uint32_t clock_bit; /* SIM_SCGCn bit pos */ + uint32_t vectorno; /* IRQ number */ + uint32_t first_channel_index; /* 0 based index in timer_io_channels */ + uint32_t last_channel_index; /* 0 based index in timer_io_channels */ + xcpt_t handler; +} io_timers_t; + +/* array of channels in logical order */ +typedef struct timer_io_channels_t { + uint32_t gpio_out; /* The timer valn_offset GPIO for PWM */ + uint32_t gpio_in; /* The timer valn_offset GPIO for Capture */ + uint8_t timer_index; /* 0 based index in the io_timers_t table */ + uint8_t val_offset; /* IMXRT_FLEXPWM_SM0VAL3_OFFSET or IMXRT_FLEXPWM_SM0VAL5_OFFSET */ + uint8_t sub_module; /* 0 based sub module offset */ + uint8_t sub_module_bits; /* LDOK and CLDOK bits */ +} timer_io_channels_t; + +#define SM0 0 +#define SM1 1 +#define SM2 2 +#define SM3 3 + +#define PWMA_VAL IMXRT_FLEXPWM_SM0VAL3_OFFSET +#define PWMB_VAL IMXRT_FLEXPWM_SM0VAL5_OFFSET + + +typedef void (*channel_handler_t)(void *context, const io_timers_t *timer, uint32_t chan_index, + const timer_io_channels_t *chan, + hrt_abstime isrs_time, uint16_t isrs_rcnt, + uint16_t capture); + + +/* supplied by board-specific code */ +__EXPORT extern const io_timers_t io_timers[MAX_IO_TIMERS]; +__EXPORT extern const timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS]; + +__EXPORT extern const io_timers_t led_pwm_timers[MAX_LED_TIMERS]; +__EXPORT extern const timer_io_channels_t led_pwm_channels[MAX_TIMER_LED_CHANNELS]; + +__EXPORT extern io_timer_channel_allocation_t allocations[IOTimerChanModeSize]; +__EXPORT int io_timer_handler0(int irq, void *context, void *arg); +__EXPORT int io_timer_handler1(int irq, void *context, void *arg); +__EXPORT int io_timer_handler2(int irq, void *context, void *arg); +__EXPORT int io_timer_handler3(int irq, void *context, void *arg); + +__EXPORT int io_timer_channel_init(unsigned channel, io_timer_channel_mode_t mode, + channel_handler_t channel_handler, void *context); + +__EXPORT int io_timer_init_timer(unsigned timer); + +__EXPORT int io_timer_set_rate(unsigned timer, unsigned rate); +__EXPORT int io_timer_set_enable(bool state, io_timer_channel_mode_t mode, + io_timer_channel_allocation_t masks); +__EXPORT int io_timer_set_rate(unsigned timer, unsigned rate); +__EXPORT uint16_t io_channel_get_ccr(unsigned channel); +__EXPORT int io_timer_set_ccr(unsigned channel, uint16_t value); +__EXPORT uint32_t io_timer_get_group(unsigned timer); +__EXPORT int io_timer_validate_channel_index(unsigned channel); +__EXPORT int io_timer_is_channel_free(unsigned channel); +__EXPORT int io_timer_free_channel(unsigned channel); +__EXPORT int io_timer_get_channel_mode(unsigned channel); +__EXPORT int io_timer_get_mode_channels(io_timer_channel_mode_t mode); +__EXPORT extern void io_timer_trigger(void); + +__END_DECLS diff --git a/src/drivers/imxrt/drv_led_pwm.cpp b/src/drivers/imxrt/drv_led_pwm.cpp new file mode 100644 index 000000000000..6bf9282590ee --- /dev/null +++ b/src/drivers/imxrt/drv_led_pwm.cpp @@ -0,0 +1,354 @@ +/**************************************************************************** + * + * Copyright (c) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name Airmind nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** +* @file drv_led_pwm.cpp +* +* +*/ + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "drv_io_timer.h" + +#include +#include "chip/imxrt_tmr.h" + +int led_pwm_servo_set(unsigned channel, uint8_t cvalue) +{ + return 0; +} +int led_pwm_servo_init(void) +{ + return 0; + +} + +#if 0 && defined(BOARD_HAS_LED_PWM) || defined(BOARD_HAS_UI_LED_PWM) + +#define FTM_SRC_CLOCK_FREQ 16000000 +#define LED_PWM_FREQ 1000000 + +#if (BOARD_LED_PWM_RATE) +# define LED_PWM_RATE BOARD_LED_PWM_RATE +#else +# define LED_PWM_RATE 50 +#endif + +#define _REG(_addr) (*(volatile uint32_t *)(_addr)) +#define _REG32(_base, _reg) (*(volatile uint32_t *)(_base + _reg)) +#define REG(_tmr, _reg) _REG32(led_pwm_timers[_tmr].base, _reg) + + +/* Timer register accessors */ + +#define rSC(_tmr) REG(_tmr,KINETIS_FTM_SC_OFFSET) +#define rCNT(_tmr) REG(_tmr,KINETIS_FTM_CNT_OFFSET) +#define rMOD(_tmr) REG(_tmr,KINETIS_FTM_MOD_OFFSET) +#define rC0SC(_tmr) REG(_tmr,KINETIS_FTM_C0SC_OFFSET) +#define rC0V(_tmr) REG(_tmr,KINETIS_FTM_C0V_OFFSET) +#define rC1SC(_tmr) REG(_tmr,KINETIS_FTM_C1SC_OFFSET) +#define rC1V(_tmr) REG(_tmr,KINETIS_FTM_C1V_OFFSET) +#define rC2SC(_tmr) REG(_tmr,KINETIS_FTM_C2SC_OFFSET) +#define rC2V(_tmr) REG(_tmr,KINETIS_FTM_C2V_OFFSET) +#define rC3SC(_tmr) REG(_tmr,KINETIS_FTM_C3SC_OFFSET) +#define rC3V(_tmr) REG(_tmr,KINETIS_FTM_C3V_OFFSET) +#define rC4SC(_tmr) REG(_tmr,KINETIS_FTM_C4SC_OFFSET) +#define rC4V(_tmr) REG(_tmr,KINETIS_FTM_C4V_OFFSET) +#define rC5SC(_tmr) REG(_tmr,KINETIS_FTM_C5SC_OFFSET) +#define rC5V(_tmr) REG(_tmr,KINETIS_FTM_C5V_OFFSET) +#define rC6SC(_tmr) REG(_tmr,KINETIS_FTM_C6SC_OFFSET) +#define rC6V(_tmr) REG(_tmr,KINETIS_FTM_C6V_OFFSET) +#define rC7SC(_tmr) REG(_tmr,KINETIS_FTM_C7SC_OFFSET) +#define rC7V(_tmr) REG(_tmr,KINETIS_FTM_C7V_OFFSET) + +#define rCNTIN(_tmr) REG(_tmr,KINETIS_FTM_CNTIN_OFFSET) +#define rSTATUS(_tmr) REG(_tmr,KINETIS_FTM_STATUS_OFFSET) +#define rMODE(_tmr) REG(_tmr,KINETIS_FTM_MODE_OFFSET) +#define rSYNC(_tmr) REG(_tmr,KINETIS_FTM_SYNC_OFFSET) +#define rOUTINIT(_tmr) REG(_tmr,KINETIS_FTM_OUTINIT_OFFSET) +#define rOUTMASK(_tmr) REG(_tmr,KINETIS_FTM_OUTMASK_OFFSET) +#define rCOMBINE(_tmr) REG(_tmr,KINETIS_FTM_COMBINE_OFFSET) +#define rDEADTIME(_tmr) REG(_tmr,KINETIS_FTM_DEADTIME_OFFSET) +#define rEXTTRIG(_tmr) REG(_tmr,KINETIS_FTM_EXTTRIG_OFFSET) +#define rPOL(_tmr) REG(_tmr,KINETIS_FTM_POL_OFFSET) +#define rFMS(_tmr) REG(_tmr,KINETIS_FTM_FMS_OFFSET) +#define rFILTER(_tmr) REG(_tmr,KINETIS_FTM_FILTER_OFFSET) +#define rFLTCTRL(_tmr) REG(_tmr,KINETIS_FTM_FLTCTRL_OFFSET) +#define rQDCTRL(_tmr) REG(_tmr,KINETIS_FTM_QDCTRL_OFFSET) +#define rCONF(_tmr) REG(_tmr,KINETIS_FTM_CONF_OFFSET) +#define rFLTPOL(_tmr) REG(_tmr,KINETIS_FTM_FLTPOL_OFFSET) +#define rSYNCONF(_tmr) REG(_tmr,KINETIS_FTM_SYNCONF_OFFSET) +#define rINVCTRL(_tmr) REG(_tmr,KINETIS_FTM_INVCTRL_OFFSET) +#define rSWOCTRL(_tmr) REG(_tmr,KINETIS_FTM_SWOCTRL_OFFSET) +#define rPWMLOAD(_tmr) REG(_tmr,KINETIS_FTM_PWMLOAD_OFFSET) + +#define CnSC_RESET (FTM_CSC_CHF|FTM_CSC_CHIE|FTM_CSC_MSB|FTM_CSC_MSA|FTM_CSC_ELSB|FTM_CSC_ELSA|FTM_CSC_DMA) +#define CnSC_CAPTURE_INIT (FTM_CSC_CHIE|FTM_CSC_ELSB|FTM_CSC_ELSA) // Both + +#if defined(BOARD_LED_PWM_DRIVE_ACTIVE_LOW) +#define CnSC_PWMOUT_INIT (FTM_CSC_MSB|FTM_CSC_ELSA) +#else +#define CnSC_PWMOUT_INIT (FTM_CSC_MSB|FTM_CSC_ELSB) +#endif + +#define FTM_SYNC (FTM_SYNC_SWSYNC) + +static void led_pwm_timer_init(unsigned timer); +static void led_pwm_timer_set_rate(unsigned timer, unsigned rate); +static void led_pwm_channel_init(unsigned channel); + +int led_pwm_servo_set(unsigned channel, uint8_t value); +unsigned led_pwm_servo_get(unsigned channel); +int led_pwm_servo_init(void); +void led_pwm_servo_deinit(void); +void led_pwm_servo_arm(bool armed); +unsigned led_pwm_timer_get_period(unsigned timer); + +static void led_pwm_timer_set_rate(unsigned timer, unsigned rate) +{ + + irqstate_t flags = px4_enter_critical_section(); + + uint32_t save = rSC(timer); + rSC(timer) = save & ~(FTM_SC_CLKS_MASK); + + /* configure the timer to update at the desired rate */ + rMOD(timer) = (LED_PWM_FREQ / rate) - 1; + rSC(timer) = save; + + px4_leave_critical_section(flags); +} + +static inline uint32_t div2psc(int div) +{ + return 31 - __builtin_clz(div); +} + +static inline void led_pwm_timer_set_PWM_mode(unsigned timer) +{ + irqstate_t flags = px4_enter_critical_section(); + rSC(timer) &= ~(FTM_SC_CLKS_MASK | FTM_SC_PS_MASK); + rSC(timer) |= (FTM_SC_CLKS_EXTCLK | div2psc(FTM_SRC_CLOCK_FREQ / LED_PWM_FREQ)); + px4_leave_critical_section(flags); +} + + +static void +led_pwm_timer_init(unsigned timer) +{ + /* valid Timer */ + + if (led_pwm_timers[timer].base != 0) { + + /* enable the timer clock before we try to talk to it */ + + uint32_t regval = _REG(led_pwm_timers[timer].clock_register); + regval |= led_pwm_timers[timer].clock_bit; + _REG(led_pwm_timers[timer].clock_register) = regval; + + /* disable and configure the timer */ + + rSC(timer) = FTM_SC_CLKS_NONE; + rCNT(timer) = 0; + + rMODE(timer) = 0; + rSYNCONF(timer) = (FTM_SYNCONF_SYNCMODE | FTM_SYNCONF_SWWRBUF | FTM_SYNCONF_SWRSTCNT); + + /* Set to run in debug mode */ + + rCONF(timer) |= FTM_CONF_BDMMODE_MASK; + + /* enable the timer */ + + led_pwm_timer_set_PWM_mode(timer); + + /* + * Note we do the Standard PWM Out init here + * default to updating at LED_PWM_RATE + */ + + led_pwm_timer_set_rate(timer, LED_PWM_RATE); + } +} +unsigned +led_pwm_timer_get_period(unsigned timer) +{ + // MOD is a 16 bit reg + unsigned mod = rMOD(timer); + + if (mod == 0) { + return 1 << 16; + } + + return (uint16_t)(mod + 1); +} + + +static void +led_pwm_channel_init(unsigned channel) +{ + /* Only initialize used channels */ + + if (led_pwm_channels[channel].timer_channel) { + unsigned timer = led_pwm_channels[channel].timer_index; + + irqstate_t flags = px4_enter_critical_section(); + + /* configure the GPIO first */ + + px4_arch_configgpio(led_pwm_channels[channel].gpio_out); + + /* configure the channel */ + + uint32_t chan = led_pwm_channels[channel].timer_channel - 1; + + uint16_t rvalue = REG(timer, KINETIS_FTM_CSC_OFFSET(chan)); + rvalue &= ~CnSC_RESET; + rvalue |= CnSC_PWMOUT_INIT; + REG(timer, KINETIS_FTM_CSC_OFFSET(chan)) = rvalue; + REG(timer, KINETIS_FTM_CV_OFFSET(0)) = 0; + px4_leave_critical_section(flags); + } +} + +int +led_pwm_servo_set(unsigned channel, uint8_t cvalue) +{ + if (channel >= arraySize(led_pwm_channels)) { + return -1; + } + + unsigned timer = led_pwm_channels[channel].timer_index; + + /* test timer for validity */ + if ((led_pwm_timers[timer].base == 0) || + (led_pwm_channels[channel].gpio_out == 0)) { + return -1; + } + + unsigned period = led_pwm_timer_get_period(timer); + + unsigned value = (unsigned)cvalue * period / 255; + + /* configure the channel */ + if (value > 0) { + value--; + } + + REG(timer, KINETIS_FTM_CV_OFFSET(led_pwm_channels[channel].timer_channel - 1)) = value; + + return 0; +} +unsigned +led_pwm_servo_get(unsigned channel) +{ + if (channel >= 3) { + return 0; + } + + unsigned timer = led_pwm_channels[channel].timer_index; + servo_position_t value = 0; + + /* test timer for validity */ + if ((led_pwm_timers[timer].base == 0) || + (led_pwm_channels[channel].timer_channel == 0)) { + return value; + } + + value = REG(timer, KINETIS_FTM_CV_OFFSET(led_pwm_channels[channel].timer_channel - 1)); + unsigned period = led_pwm_timer_get_period(timer); + return ((value + 1) * 255 / period); +} +int +led_pwm_servo_init(void) +{ + /* do basic timer initialisation first */ + for (unsigned i = 0; i < arraySize(led_pwm_timers); i++) { + led_pwm_timer_init(i); + } + + /* now init channels */ + for (unsigned i = 0; i < arraySize(led_pwm_channels); i++) { + led_pwm_channel_init(i); + } + + led_pwm_servo_arm(true); + return OK; +} + +void +led_pwm_servo_deinit(void) +{ + /* disable the timers */ + led_pwm_servo_arm(false); +} + +void +led_pwm_servo_arm(bool armed) +{ + /* iterate timers and arm/disarm appropriately */ + for (unsigned i = 0; i < arraySize(led_pwm_timers); i++) { + if (led_pwm_timers[i].base != 0) { + if (armed) { + /* force an update to preload all registers */ + led_pwm_timer_set_PWM_mode(i); + + } else { + /* disable and configure the timer */ + + rSC(i) = FTM_SC_CLKS_NONE; + rCNT(i) = 0; + } + } + } +} + +#endif // BOARD_HAS_LED_PWM || BOARD_HAS_UI_LED_PWM diff --git a/src/drivers/imxrt/drv_pwm_servo.c b/src/drivers/imxrt/drv_pwm_servo.c new file mode 100644 index 000000000000..bf0083218605 --- /dev/null +++ b/src/drivers/imxrt/drv_pwm_servo.c @@ -0,0 +1,162 @@ +/**************************************************************************** + * + * Copyright (C) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* + * @file drv_pwm_servo.c + * + * Servo driver supporting PWM servos connected to FLexPWM timer blocks. + * N.B. Groups:channels have a 1:1 correspondence on FlexPWM + * + */ + +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "drv_io_timer.h" +#include "drv_pwm_servo.h" + +//#include + +int up_pwm_servo_set(unsigned channel, servo_position_t value) +{ + return io_timer_set_ccr(channel, value); +} + +servo_position_t up_pwm_servo_get(unsigned channel) +{ + return io_channel_get_ccr(channel); +} + +int up_pwm_servo_init(uint32_t channel_mask) +{ + /* Init channels */ + uint32_t current = io_timer_get_mode_channels(IOTimerChanMode_PWMOut); + + // First free the current set of PWMs + + for (unsigned channel = 0; current != 0 && channel < MAX_TIMER_IO_CHANNELS; channel++) { + if (current & (1 << channel)) { + io_timer_free_channel(channel); + current &= ~(1 << channel); + } + } + + // Now allocate the new set + + for (unsigned channel = 0; channel_mask != 0 && channel < MAX_TIMER_IO_CHANNELS; channel++) { + if (channel_mask & (1 << channel)) { + + // First free any that were not PWM mode before + + if (-EBUSY == io_timer_is_channel_free(channel)) { + io_timer_free_channel(channel); + } + + io_timer_channel_init(channel, IOTimerChanMode_PWMOut, NULL, NULL); + channel_mask &= ~(1 << channel); + } + } + + return OK; +} + +void up_pwm_servo_deinit(void) +{ + /* disable the timers */ + up_pwm_servo_arm(false); +} + +int up_pwm_servo_set_rate_group_update(unsigned channel, unsigned rate) +{ + if (io_timer_validate_channel_index(channel) < 0) { + return ERROR; + } + + /* Allow a rate of 0 to enter oneshot mode */ + + if (rate != 0) { + + /* limit update rate to 1..10000Hz; somewhat arbitrary but safe */ + + if (rate < 1) { + return -ERANGE; + } + + if (rate > 10000) { + return -ERANGE; + } + } + + return io_timer_set_rate(channel, rate); +} + +void up_pwm_update(void) +{ + io_timer_trigger(); +} + +int up_pwm_servo_set_rate(unsigned rate) +{ + for (unsigned i = 0; i < MAX_TIMER_IO_CHANNELS; i++) { + up_pwm_servo_set_rate_group_update(i, rate); + } + + return 0; +} + +uint32_t up_pwm_servo_get_rate_group(unsigned group) +{ + return io_timer_get_group(group); +} + +void +up_pwm_servo_arm(bool armed) +{ + io_timer_set_enable(armed, IOTimerChanMode_OneShot, IO_TIMER_ALL_MODES_CHANNELS); + io_timer_set_enable(armed, IOTimerChanMode_PWMOut, IO_TIMER_ALL_MODES_CHANNELS); +} diff --git a/src/drivers/imxrt/drv_pwm_servo.h b/src/drivers/imxrt/drv_pwm_servo.h new file mode 100644 index 000000000000..b3ae2a23e15b --- /dev/null +++ b/src/drivers/imxrt/drv_pwm_servo.h @@ -0,0 +1,42 @@ +/**************************************************************************** + * + * Copyright (C) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file drv_pwm_servo.h + * + * imxrt-specific PWM output data. + */ + +#pragma once + +#include diff --git a/src/drivers/imxrt/drv_pwm_trigger.c b/src/drivers/imxrt/drv_pwm_trigger.c new file mode 100644 index 000000000000..14b5acc97528 --- /dev/null +++ b/src/drivers/imxrt/drv_pwm_trigger.c @@ -0,0 +1,108 @@ +/**************************************************************************** + * + * Copyright (C) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* + * @file drv_pwm_trigger.c + * + */ + +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "drv_io_timer.h" +#include "drv_pwm_trigger.h" + +int up_pwm_trigger_set(unsigned channel, uint16_t value) +{ + return io_timer_set_ccr(channel, value); +} + +int up_pwm_trigger_init(uint32_t channel_mask) +{ + /* Init channels */ + for (unsigned channel = 0; channel_mask != 0 && channel < MAX_TIMER_IO_CHANNELS; channel++) { + if (channel_mask & (1 << channel)) { + + // First free any that were not trigger mode before + if (-EBUSY == io_timer_is_channel_free(channel)) { + io_timer_free_channel(channel); + } + + io_timer_channel_init(channel, IOTimerChanMode_Trigger, NULL, NULL); + channel_mask &= ~(1 << channel); + } + } + + /* Enable the timers */ + up_pwm_trigger_arm(true); + + return OK; +} + +void up_pwm_trigger_deinit() +{ + /* Disable the timers */ + up_pwm_trigger_arm(false); + + /* Deinit channels */ + uint32_t current = io_timer_get_mode_channels(IOTimerChanMode_Trigger); + + for (unsigned channel = 0; current != 0 && channel < MAX_TIMER_IO_CHANNELS; channel++) { + if (current & (1 << channel)) { + + io_timer_channel_init(channel, IOTimerChanMode_NotUsed, NULL, NULL); + current &= ~(1 << channel); + } + } +} + +void +up_pwm_trigger_arm(bool armed) +{ + io_timer_set_enable(armed, IOTimerChanMode_Trigger, IO_TIMER_ALL_MODES_CHANNELS); +} diff --git a/src/drivers/imxrt/drv_pwm_trigger.h b/src/drivers/imxrt/drv_pwm_trigger.h new file mode 100644 index 000000000000..6175c7261cb7 --- /dev/null +++ b/src/drivers/imxrt/drv_pwm_trigger.h @@ -0,0 +1,42 @@ +/**************************************************************************** + * + * Copyright (C) 2018 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file drv_pwm_trigger.h + * + * imxrt-specific PWM trigger data. + */ + +#pragma once + +#include diff --git a/src/drivers/imxrt/tone_alarm/CMakeLists.txt b/src/drivers/imxrt/tone_alarm/CMakeLists.txt new file mode 100644 index 000000000000..5251d3910a7a --- /dev/null +++ b/src/drivers/imxrt/tone_alarm/CMakeLists.txt @@ -0,0 +1,36 @@ +############################################################################ +# +# Copyright (c) 2015-2019 PX4 Development Team. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name PX4 nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +px4_add_library(tone_alarm_interface + ToneAlarmInterface.cpp +) diff --git a/src/drivers/imxrt/tone_alarm/ToneAlarmInterface.cpp b/src/drivers/imxrt/tone_alarm/ToneAlarmInterface.cpp new file mode 100644 index 000000000000..b20d781cad06 --- /dev/null +++ b/src/drivers/imxrt/tone_alarm/ToneAlarmInterface.cpp @@ -0,0 +1,190 @@ +/**************************************************************************** + * + * Copyright (C) 2013-2019 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/** + * @file ToneAlarmInterface.cpp + */ + +#include + +#include "chip.h" +#include "chip/imxrt_gpt.h" +#include "imxrt_periphclks.h" + +//#include +#include + +#define CAT3_(A, B, C) A##B##C +#define CAT3(A, B, C) CAT3_(A, B, C) + +#define CAT2_(A, B) A##B +#define CAT2(A, B) CAT2_(A, B) + +/* Check that tone alarm and HRT timers are different */ +#if defined(TONE_ALARM_TIMER) && defined(HRT_TIMER) +# if TONE_ALARM_TIMER == HRT_TIMER +# error TONE_ALARM_TIMER and HRT_TIMER must use different timers. +# endif +#endif + +/* +* Period of the free-running counter, in microseconds. +*/ +#define TONE_ALARM_COUNTER_PERIOD 4294967296 + +/* Tone Alarm configuration */ + +#define TONE_ALARM_TIMER_CLOCK BOARD_GPT_FREQUENCY /* The input clock frequency to the GPT block */ +#define TONE_ALARM_TIMER_BASE CAT3(IMXRT_GPT, TONE_ALARM_TIMER,_BASE) /* The Base address of the GPT */ +#define TONE_ALARM_TIMER_VECTOR CAT(IMXRT_IRQ_GPT, TONE_ALARM_TIMER) /* The GPT Interrupt vector */ + +#if TONE_ALARM_TIMER == 1 +# define TONE_ALARM_CLOCK_ALL() imxrt_clockall_gpt_bus() /* The Clock Gating macro for this GPT */ +#elif TONE_ALARM_TIMER == 2 +# define TONE_ALARM_CLOCK_ALL() imxrt_clockall_gpt2_bus() /* The Clock Gating macro for this GPT */ +#endif + +#if TONE_ALARM_TIMER == 1 && defined(CONFIG_IMXRT_GPT1) +# error must not set CONFIG_IMXRT_GPT1=y and TONE_ALARM_TIMER=1 +#elif TONE_ALARM_TIMER == 2 && defined(CONFIG_IMXRT_GPT2) +# error must not set CONFIG_IMXRT_GPT2=y and TONE_ALARM_TIMER=2 +#endif + + +# define TONE_ALARM_TIMER_FREQ 1000000 + +/* +* Tone Alarm clock must be a multiple of 1MHz greater than 1MHz +*/ +#if (TONE_ALARM_TIMER_CLOCK % TONE_ALARM_TIMER_FREQ) != 0 +# error TONE_ALARM_TIMER_CLOCK must be a multiple of 1MHz +#endif +#if TONE_ALARM_TIMER_CLOCK <= TONE_ALARM_TIMER_FREQ +# error TONE_ALARM_TIMER_CLOCK must be greater than 1MHz +#endif + +#if (TONE_ALARM_TIMER_CHANNEL > 1) || (TONE_ALARM_TIMER_CHANNEL > 3) +# error TONE_ALARM_CHANNEL must be a value between 1 and 3 +#endif + + +/* Register accessors */ + +#define _REG(_addr) (*(volatile uint32_t *)(_addr)) + +/* Timer register accessors */ + +#define REG(_reg) _REG(TONE_ALARM_TIMER_BASE + (_reg)) + +#define rCR REG(IMXRT_GPT_CR_OFFSET) +#define rPR REG(IMXRT_GPT_PR_OFFSET) +#define rSR REG(IMXRT_GPT_SR_OFFSET) +#define rIR REG(IMXRT_GPT_IR_OFFSET) +#define rOCR1 REG(IMXRT_GPT_OCR1_OFFSET) +#define rOCR2 REG(IMXRT_GPT_OCR2_OFFSET) +#define rOCR3 REG(IMXRT_GPT_OCR3_OFFSET) +#define rICR1 REG(IMXRT_GPT_ICR1_OFFSET) +#define rICR2 REG(IMXRT_GPT_ICR2_OFFSET) +#define rCNT REG(IMXRT_GPT_CNT_OFFSET) + +/* +* Specific registers and bits used by Tone Alarm sub-functions +*/ + +#define rOCR CAT2(rOCR, TONE_ALARM_CHANNEL) /* GPT Output Compare Register used by HRT */ +#define rSTATUS CAT2(GPT_SR_OF, TONE_ALARM_CHANNEL) /* OF Output Compare Flag */ +#define CR_OM CAT3(GPT_CR_OM, TONE_ALARM_CHANNEL,_TOGGLE) /* Output Compare mode */ + + +#define CBRK_BUZZER_KEY 782097 + + + +void ToneAlarmInterface::init() +{ +#if defined(TONE_ALARM_TIMER) + /* configure the GPIO to the idle state */ + px4_arch_configgpio(GPIO_TONE_ALARM_IDLE); + + /* Enable the Module clock */ + + TONE_ALARM_CLOCK_ALL(); + + + /* disable and configure the timer */ + + /* disable and configure the timer */ + + rCR = GPT_CR_OM1_DIS | GPT_CR_OM2_DIS | GPT_CR_OM3_DIS | + CR_OM | GPT_CR_FRR | GPT_CR_CLKSRC_IPG; + + /* CLKSRC field is divided by [PRESCALER + 1] */ + + rPR = (TONE_ALARM_TIMER_CLOCK / TONE_ALARM_TIMER_FREQ) - 1; + + /* enable the timer and output toggle */ + + rCR |= GPT_CR_EN; +#endif /* TONE_ALARM_TIMER */ +} + +void ToneAlarmInterface::start_note(unsigned frequency) +{ +#if defined(TONE_ALARM_TIMER) + float period = 0.5f / frequency; + + // and the divisor, rounded to the nearest integer + unsigned divisor = (period * TONE_ALARM_TIMER_FREQ) + 0.5f; + + rCR &= ~GPT_CR_EN; + rOCR = divisor; // load new toggle period + rCR |= GPT_CR_EN; + + // configure the GPIO to enable timer output + px4_arch_configgpio(GPIO_TONE_ALARM); +#endif /* TONE_ALARM_TIMER */ +} + +void ToneAlarmInterface::stop_note() +{ +#if defined(TONE_ALARM_TIMER) + /* stop the current note */ + + rCR &= ~GPT_CR_EN; + + /* + * Make sure the GPIO is not driving the speaker. + */ + px4_arch_configgpio(GPIO_TONE_ALARM_IDLE); +#endif /* TONE_ALARM_TIMER */ +} From 12df5ef624a911c5e578223d8b63a8214940ee7c Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Mon, 21 Jan 2019 16:15:21 -0800 Subject: [PATCH 05/12] fmurt1062-v1:Board config on EVK --- .../fmurt1062-v1/nuttx-config/nsh/defconfig | 229 +-- .../nuttx-config/nsh/defconfig.bb1 | 1498 +++++++++++++++++ .../nuttx-config/nsh/defconfig.evk | 1415 ++++++++++++++++ .../nuttx-config/nsh/defconfig.evk.sdio | 1425 ++++++++++++++++ 4 files changed, 4416 insertions(+), 151 deletions(-) create mode 100644 boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.bb1 create mode 100644 boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.evk create mode 100644 boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.evk.sdio diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig index 01f4e6fdebb1..3725dfd34e4a 100644 --- a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig +++ b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig @@ -195,14 +195,14 @@ CONFIG_ARCH_FAMILY_MXRT106xDVL6A=y # CONFIG_ARCH_FAMILY_MIMXRT1062CVL5A is not set CONFIG_ARCH_FAMILY_IMXRT106x=y CONFIG_IMXRT_HAVE_LPUART=y -CONFIG_IMXRT_LPI2C=y +#CONFIG_IMXRT_LPI2C=y CONFIG_IMXRT_LPSPI=y CONFIG_IMXRT_HIGHSPEED_GPIO=y # # i.MX RT Peripheral Selection # -# CONFIG_IMXRT_EDMA is not set +CONFIG_IMXRT_EDMA=y # CONFIG_IMXRT_ENET is not set # @@ -212,39 +212,36 @@ CONFIG_IMXRT_HIGHSPEED_GPIO=y # # LPUART Peripherals # -# CONFIG_IMXRT_LPUART1 is not set +CONFIG_IMXRT_LPUART1=y CONFIG_IMXRT_LPUART2=y CONFIG_IMXRT_LPUART3=y -CONFIG_IMXRT_LPUART4=y -CONFIG_IMXRT_LPUART5=y -CONFIG_IMXRT_LPUART6=y -CONFIG_IMXRT_LPUART7=y -CONFIG_IMXRT_LPUART8=y +# CONFIG_IMXRT_LPUART4 is not set +# CONFIG_IMXRT_LPUART5 is not set +# CONFIG_IMXRT_LPUART6 is not set +# CONFIG_IMXRT_LPUART7 is not set +# CONFIG_IMXRT_LPUART8 is not set # # LPI2C Peripherals # -CONFIG_IMXRT_LPI2C1=y +#CONFIG_IMXRT_LPI2C1=y CONFIG_LPI2C1_BUSYIDLE=0 CONFIG_LPI2C1_FILTSCL=0 CONFIG_LPI2C1_FILTSDA=0 -CONFIG_IMXRT_LPI2C2=y +#CONFIG_IMXRT_LPI2C2=y CONFIG_LPI2C2_BUSYIDLE=0 CONFIG_LPI2C2_FILTSCL=0 CONFIG_LPI2C2_FILTSDA=0 -CONFIG_IMXRT_LPI2C3=y -CONFIG_LPI2C3_BUSYIDLE=0 -CONFIG_LPI2C3_FILTSCL=0 -CONFIG_LPI2C3_FILTSDA=0 +# CONFIG_IMXRT_LPI2C3 is not set # CONFIG_IMXRT_LPI2C4 is not set # # LPSPI Peripherals # -CONFIG_IMXRT_LPSPI1=y -CONFIG_IMXRT_LPSPI2=y +# CONFIG_IMXRT_LPSPI1 is not set +# CONFIG_IMXRT_LPSPI2 is not set CONFIG_IMXRT_LPSPI3=y -CONFIG_IMXRT_LPSPI4=y +# CONFIG_IMXRT_LPSPI4 is not set # CONFIG_IMXRT_SEMC is not set CONFIG_IMXRT_SNVS_LPSRTC=y CONFIG_IMXRT_SNVS_HPRTC=y @@ -267,6 +264,17 @@ CONFIG_IMXRT_OCRAM_PRIMARY=y CONFIG_IMXRT_USDHC_DMA=y # CONFIG_IMXRT_USDHC_WIDTH_D1_ONLY is not set +# +# eDMA Configuration +# +CONFIG_IMXRT_EDMA_NTCD=0 +# CONFIG_IMXRT_EDMA_ELINK is not set +# CONFIG_IMXRT_EDMA_ERCA is not set +CONFIG_IMXRT_EDMA_HOE=y +# CONFIG_IMXRT_EDMA_CLM is not set +# CONFIG_IMXRT_EDMA_EMLIM is not set +# CONFIG_IMXRT_EDMA_EDBG is not set + # # RTC Configuration # @@ -282,7 +290,7 @@ CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARCH_NOINTC is not set # CONFIG_ARCH_VECNOTIRQ is not set CONFIG_ARCH_HAVE_IRQTRIGGER=y -# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_DMA=y CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_L2CACHE is not set # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set @@ -389,6 +397,7 @@ CONFIG_BOARDCTL_USBDEVCTRL=y CONFIG_ARCH_HAVE_TICKLESS=y # CONFIG_SCHED_TICKLESS is not set CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEMTICK_HOOK is not set # CONFIG_SYSTEM_TIME64 is not set CONFIG_CLOCK_MONOTONIC=y # CONFIG_ARCH_HAVE_TIMEKEEPING is not set @@ -515,11 +524,11 @@ CONFIG_MQ_MAXMSGSIZE=32 # Work queue support # CONFIG_SCHED_WORKQUEUE=y +# CONFIG_WQUEUE_NOTIFIER is not set CONFIG_SCHED_HPWORK=y CONFIG_SCHED_HPNTHREADS=1 CONFIG_SCHED_HPWORKPRIORITY=249 CONFIG_SCHED_HPWORKSTACKSIZE=1800 -# CONFIG_WQUEUE_NOTIFIER is not set CONFIG_SCHED_LPWORK=y CONFIG_SCHED_LPNTHREADS=1 CONFIG_SCHED_LPWORKPRIORITY=50 @@ -595,6 +604,7 @@ CONFIG_RTC=y # CONFIG_RTC_EXTERNAL is not set CONFIG_WATCHDOG=y CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_WATCHDOG_AUTOMONITOR is not set # CONFIG_TIMERS_CS2100CP is not set # CONFIG_ANALOG is not set # CONFIG_DRIVERS_AUDIO is not set @@ -614,8 +624,17 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" # LCD Driver Support # # CONFIG_LCD is not set + +# +# Character/Segment LCD Devices +# # CONFIG_SLCD is not set +# +# Other LCD-related Devices +# +# CONFIG_LCD_OTHER is not set + # # LED Support # @@ -634,7 +653,7 @@ CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set # CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set CONFIG_MMCSD_MMCSUPPORT=y -# CONFIG_MMCSD_HAVE_CARDDETECT is not set +CONFIG_MMCSD_HAVE_CARDDETECT=y # CONFIG_MMCSD_HAVE_WRITEPROTECT is not set # CONFIG_MMCSD_SPI is not set CONFIG_SDIO_DMA=y @@ -643,45 +662,7 @@ CONFIG_MMCSD_SDIO=y # CONFIG_SDIO_WIDTH_D1_ONLY is not set CONFIG_SDIO_BLOCKSETUP=y # CONFIG_MODEM is not set -CONFIG_MTD=y - -# -# MTD Configuration -# -CONFIG_MTD_PARTITION=y -# CONFIG_MTD_SECT512 is not set -# CONFIG_MTD_PARTITION_NAMES is not set -CONFIG_MTD_BYTE_WRITE=y -# CONFIG_MTD_PROGMEM is not set -# CONFIG_MTD_CONFIG is not set - -# -# MTD Device Drivers -# -# CONFIG_MTD_NAND is not set -# CONFIG_RAMMTD is not set -# CONFIG_FILEMTD is not set -# CONFIG_MTD_AT24XX is not set -# CONFIG_MTD_AT25 is not set -# CONFIG_MTD_AT45DB is not set -# CONFIG_MTD_IS25XP is not set -# CONFIG_MTD_M25P is not set -# CONFIG_MTD_MX25L is not set -# CONFIG_MTD_MX35 is not set -# CONFIG_MTD_S25FL1 is not set -# CONFIG_MTD_N25QXXX is not set -# CONFIG_MTD_MX25RXX is not set -# CONFIG_MTD_SMART is not set -CONFIG_MTD_RAMTRON=y -CONFIG_RAMTRON_WRITEWAIT=y -CONFIG_RAMTRON_SETSPEED=y -# CONFIG_RAMTRON_CHUNKING is not set -# CONFIG_MTD_SST25 is not set -# CONFIG_MTD_SST25XX is not set -# CONFIG_MTD_SST26 is not set -# CONFIG_MTD_SST39FV is not set -# CONFIG_MTD_W25 is not set -# CONFIG_MTD_GD25 is not set +# CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_PIPES=y CONFIG_DEV_PIPE_MAXSIZE=1024 @@ -702,23 +683,16 @@ CONFIG_SERIAL_CONSOLE=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 -CONFIG_SERIAL_IFLOWCONTROL=y -CONFIG_SERIAL_OFLOWCONTROL=y -# CONFIG_SERIAL_DMA is not set -CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y -CONFIG_SERIAL_IFLOWCONTROL_LOWER_WATERMARK=10 -CONFIG_SERIAL_IFLOWCONTROL_UPPER_WATERMARK=90 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_SERIAL_DMA=y CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y CONFIG_SERIAL_TERMIOS=y # CONFIG_TTY_SIGINT is not set # CONFIG_TTY_SIGSTP is not set +# CONFIG_LPUART1_SERIAL_CONSOLE is not set # CONFIG_LPUART2_SERIAL_CONSOLE is not set -# CONFIG_LPUART3_SERIAL_CONSOLE is not set -# CONFIG_LPUART4_SERIAL_CONSOLE is not set -# CONFIG_LPUART5_SERIAL_CONSOLE is not set -# CONFIG_LPUART6_SERIAL_CONSOLE is not set -CONFIG_LPUART7_SERIAL_CONSOLE=y -# CONFIG_LPUART8_SERIAL_CONSOLE is not set +CONFIG_LPUART3_SERIAL_CONSOLE=y # CONFIG_OTHER_SERIAL_CONSOLE is not set # CONFIG_NO_SERIAL_CONSOLE is not set # CONFIG_UART_SERIALDRIVER is not set @@ -733,21 +707,34 @@ CONFIG_LPUART7_SERIAL_CONSOLE=y # CONFIG_UART8_SERIALDRIVER is not set # CONFIG_LPUART_SERIALDRIVER is not set # CONFIG_LPUART0_SERIALDRIVER is not set -# CONFIG_LPUART1_SERIALDRIVER is not set +CONFIG_LPUART1_SERIALDRIVER=y CONFIG_LPUART2_SERIALDRIVER=y CONFIG_LPUART3_SERIALDRIVER=y -CONFIG_LPUART4_SERIALDRIVER=y -CONFIG_LPUART5_SERIALDRIVER=y -CONFIG_LPUART6_SERIALDRIVER=y -CONFIG_LPUART7_SERIALDRIVER=y -CONFIG_LPUART8_SERIALDRIVER=y +# CONFIG_LPUART4_SERIALDRIVER is not set +# CONFIG_LPUART5_SERIALDRIVER is not set +# CONFIG_LPUART6_SERIALDRIVER is not set +# CONFIG_LPUART7_SERIALDRIVER is not set +# CONFIG_LPUART8_SERIALDRIVER is not set + +# +# LPUART1 Configuration +# +CONFIG_LPUART1_RXBUFSIZE=256 +CONFIG_LPUART1_TXBUFSIZE=256 +CONFIG_LPUART1_BAUD=115200 +CONFIG_LPUART1_BITS=8 +CONFIG_LPUART1_PARITY=0 +CONFIG_LPUART1_2STOP=0 +# CONFIG_LPUART1_IFLOWCONTROL is not set +# CONFIG_LPUART1_OFLOWCONTROL is not set +# CONFIG_LPUART1_DMA is not set # # LPUART2 Configuration # CONFIG_LPUART2_RXBUFSIZE=600 CONFIG_LPUART2_TXBUFSIZE=1500 -CONFIG_LPUART2_BAUD=57600 +CONFIG_LPUART2_BAUD=115200 CONFIG_LPUART2_BITS=8 CONFIG_LPUART2_PARITY=0 CONFIG_LPUART2_2STOP=0 @@ -764,74 +751,9 @@ CONFIG_LPUART3_BAUD=57600 CONFIG_LPUART3_BITS=8 CONFIG_LPUART3_PARITY=0 CONFIG_LPUART3_2STOP=0 -CONFIG_LPUART3_IFLOWCONTROL=y -CONFIG_LPUART3_OFLOWCONTROL=y -CONFIG_LPUART3_DMA=y - -# -# LPUART4 Configuration -# -CONFIG_LPUART4_RXBUFSIZE=600 -CONFIG_LPUART4_TXBUFSIZE=1500 -CONFIG_LPUART4_BAUD=57600 -CONFIG_LPUART4_BITS=8 -CONFIG_LPUART4_PARITY=0 -CONFIG_LPUART4_2STOP=0 -CONFIG_LPUART4_IFLOWCONTROL=y -CONFIG_LPUART4_OFLOWCONTROL=y -CONFIG_LPUART4_DMA=y - -# -# LPUART5 Configuration -# -CONFIG_LPUART5_RXBUFSIZE=600 -CONFIG_LPUART5_TXBUFSIZE=1500 -CONFIG_LPUART5_BAUD=57600 -CONFIG_LPUART5_BITS=8 -CONFIG_LPUART5_PARITY=0 -CONFIG_LPUART5_2STOP=0 -# CONFIG_LPUART5_IFLOWCONTROL is not set -# CONFIG_LPUART5_OFLOWCONTROL is not set -# CONFIG_LPUART5_DMA is not set - -# -# LPUART6 Configuration -# -CONFIG_LPUART6_RXBUFSIZE=600 -CONFIG_LPUART6_TXBUFSIZE=1500 -CONFIG_LPUART6_BAUD=57600 -CONFIG_LPUART6_BITS=8 -CONFIG_LPUART6_PARITY=0 -CONFIG_LPUART6_2STOP=0 -# CONFIG_LPUART6_IFLOWCONTROL is not set -# CONFIG_LPUART6_OFLOWCONTROL is not set -CONFIG_LPUART6_DMA=y - -# -# LPUART7 Configuration -# -CONFIG_LPUART7_RXBUFSIZE=120 -CONFIG_LPUART7_TXBUFSIZE=1500 -CONFIG_LPUART7_BAUD=57600 -CONFIG_LPUART7_BITS=8 -CONFIG_LPUART7_PARITY=0 -CONFIG_LPUART7_2STOP=0 -# CONFIG_LPUART7_IFLOWCONTROL is not set -# CONFIG_LPUART7_OFLOWCONTROL is not set -CONFIG_LPUART7_DMA=y - -# -# LPUART8 Configuration -# -CONFIG_LPUART8_RXBUFSIZE=600 -CONFIG_LPUART8_TXBUFSIZE=1500 -CONFIG_LPUART8_BAUD=57600 -CONFIG_LPUART8_BITS=8 -CONFIG_LPUART8_PARITY=0 -CONFIG_LPUART8_2STOP=0 -# CONFIG_LPUART8_IFLOWCONTROL is not set -# CONFIG_LPUART8_OFLOWCONTROL is not set -CONFIG_LPUART8_DMA=y +# CONFIG_LPUART3_IFLOWCONTROL is not set +# CONFIG_LPUART3_OFLOWCONTROL is not set +# CONFIG_LPUART3_DMA is not set # CONFIG_USART0_SERIALDRIVER is not set # CONFIG_USART1_SERIALDRIVER is not set # CONFIG_USART2_SERIALDRIVER is not set @@ -983,6 +905,7 @@ CONFIG_FS_PROCFS_EXCLUDE_VERSION=y # CONFIG_FS_PROCFS_EXCLUDE_MEMINFO is not set CONFIG_FS_PROCFS_EXCLUDE_MOUNTS=y # CONFIG_FS_SPIFFS is not set +# CONFIG_FS_LITTLEFS is not set # CONFIG_FS_UNIONFS is not set # CONFIG_FS_HOSTFS is not set @@ -1096,6 +1019,7 @@ CONFIG_LIBC_MAX_TMPFILE=32 # CONFIG_LIBC_EXECFUNCS is not set CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIB_HOSTNAME="" # # errno Decode Support @@ -1197,13 +1121,12 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CCTYPE is not set # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CROMFS is not set -# CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_DHTXX is not set # CONFIG_EXAMPLES_DSPTEST is not set # CONFIG_EXAMPLES_FLOWC is not set -# CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_GPS is not set @@ -1224,10 +1147,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NXDEMO is not set -# CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_OBD2 is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PDCURSES is not set +# CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set # CONFIG_EXAMPLES_POWERLED is not set # CONFIG_EXAMPLES_POWERMONITOR is not set @@ -1240,8 +1163,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMPS is not set # CONFIG_EXAMPLES_STAT is not set # CONFIG_EXAMPLES_TCPECHO is not set @@ -1366,6 +1287,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_LS is not set CONFIG_NSH_DISABLE_MB=y # CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFIFO=y CONFIG_NSH_DISABLE_MKRD=y CONFIG_NSH_DISABLE_MH=y # CONFIG_NSH_DISABLE_MOUNT is not set @@ -1478,7 +1400,12 @@ CONFIG_READLINE_ECHO=y # # Testing # +# CONFIG_TESTINGCXXTEST is not set +# CONFIG_TESTING_FSTEST is not set +# CONFIG_TESTING_NXFFS is not set # CONFIG_TESTING_OSTEST is not set +# CONFIG_TESTING_SMART is not set +# CONFIG_TESTING_SMART_TEST is not set # CONFIG_TESTING_UNITY is not set # diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.bb1 b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.bb1 new file mode 100644 index 000000000000..01f4e6fdebb1 --- /dev/null +++ b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.bb1 @@ -0,0 +1,1498 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_MACOS is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_LOADABLE is not set +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set +# CONFIG_DFU_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_MISOC is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_RISCV is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_XTENSA is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +# CONFIG_ARCH_OR1K is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_AM335X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +CONFIG_ARCH_CHIP_IMXRT=y +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LC823450 is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_LPC54XX is not set +# CONFIG_ARCH_CHIP_MAX326XX is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_CHIP_NRF52 is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD2X is not set +# CONFIG_ARCH_CHIP_SAML2X is not set +# CONFIG_ARCH_CHIP_SAMD5X is not set +# CONFIG_ARCH_CHIP_SAME5X is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F0 is not set +# CONFIG_ARCH_CHIP_STM32L0 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32H7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_XMC4 is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM1136J is not set +# CONFIG_ARCH_ARM1156T2 is not set +# CONFIG_ARCH_ARM1176JZ is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM23 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM33 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEXR5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_HAVE_LAZYFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +CONFIG_ARCH_HAVE_HARDFAULT_DEBUG=y +CONFIG_DEBUG_HARDFAULT_ALERT=y +CONFIG_ARCH_HAVE_MEMFAULT_DEBUG=y +# CONFIG_ARM_SEMIHOSTING_SYSLOG is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARMV7M_BASEPRI_WAR=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_TOOLCHAIN_CLANGL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# i.MX RT Configuration Options +# +# CONFIG_ARCH_CHIP_MIMXRT1051DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1051CVL5A is not set +# CONFIG_ARCH_CHIP_MIMXRT1052DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1052CVL5A is not set +# CONFIG_ARCH_CHIP_MIMXRT1061DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1061CVL5A is not set +CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y +# CONFIG_ARCH_CHIP_MIMXRT1062CVL5A is not set +# CONFIG_ARCH_FAMILY_MXRT105xDVL6A is not set +# CONFIG_ARCH_FAMILY_MIMXRT1052CVL5A is not set +# CONFIG_ARCH_FAMILY_IMXRT105x is not set +CONFIG_ARCH_FAMILY_MXRT106xDVL6A=y +# CONFIG_ARCH_FAMILY_MIMXRT1062CVL5A is not set +CONFIG_ARCH_FAMILY_IMXRT106x=y +CONFIG_IMXRT_HAVE_LPUART=y +CONFIG_IMXRT_LPI2C=y +CONFIG_IMXRT_LPSPI=y +CONFIG_IMXRT_HIGHSPEED_GPIO=y + +# +# i.MX RT Peripheral Selection +# +# CONFIG_IMXRT_EDMA is not set +# CONFIG_IMXRT_ENET is not set + +# +# FlexIO Peripherals +# + +# +# LPUART Peripherals +# +# CONFIG_IMXRT_LPUART1 is not set +CONFIG_IMXRT_LPUART2=y +CONFIG_IMXRT_LPUART3=y +CONFIG_IMXRT_LPUART4=y +CONFIG_IMXRT_LPUART5=y +CONFIG_IMXRT_LPUART6=y +CONFIG_IMXRT_LPUART7=y +CONFIG_IMXRT_LPUART8=y + +# +# LPI2C Peripherals +# +CONFIG_IMXRT_LPI2C1=y +CONFIG_LPI2C1_BUSYIDLE=0 +CONFIG_LPI2C1_FILTSCL=0 +CONFIG_LPI2C1_FILTSDA=0 +CONFIG_IMXRT_LPI2C2=y +CONFIG_LPI2C2_BUSYIDLE=0 +CONFIG_LPI2C2_FILTSCL=0 +CONFIG_LPI2C2_FILTSDA=0 +CONFIG_IMXRT_LPI2C3=y +CONFIG_LPI2C3_BUSYIDLE=0 +CONFIG_LPI2C3_FILTSCL=0 +CONFIG_LPI2C3_FILTSDA=0 +# CONFIG_IMXRT_LPI2C4 is not set + +# +# LPSPI Peripherals +# +CONFIG_IMXRT_LPSPI1=y +CONFIG_IMXRT_LPSPI2=y +CONFIG_IMXRT_LPSPI3=y +CONFIG_IMXRT_LPSPI4=y +# CONFIG_IMXRT_SEMC is not set +CONFIG_IMXRT_SNVS_LPSRTC=y +CONFIG_IMXRT_SNVS_HPRTC=y +CONFIG_IMXRT_USDHC=y +# CONFIG_IMXRT_GPIO_IRQ is not set + +# +# Memory Configuration +# +CONFIG_IMXRT_BOOT_OCRAM=y +CONFIG_IMXRT_OCRAM_PRIMARY=y + +# +# i.MX RT Heap Configuration +# + +# +# USDHC Configuration +# +CONFIG_IMXRT_USDHC_DMA=y +# CONFIG_IMXRT_USDHC_WIDTH_D1_ONLY is not set + +# +# RTC Configuration +# +CONFIG_IMXRT_RTC_MAGIC_REG=1 +CONFIG_IMXRT_RTC_MAGIC=0xfacefeed +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y +# CONFIG_ARCH_GNU_NO_WEAKFUNCTIONS is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_HAVE_IRQTRIGGER=y +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_PROGMEM is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_HAVE_FETCHADD=y +# CONFIG_ARCH_HAVE_RTC_SUBSECONDS is not set +# CONFIG_ARCH_HAVE_GARBAGE is not set +# CONFIG_ARCH_GLOBAL_IRQDISABLE is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set +# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=104926 + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=750 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20200000 +CONFIG_RAM_SIZE=1048576 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_IMXRT1060_EVK is not set +CONFIG_ARCH_BOARD_CUSTOM=y + +# +# Custom Board Configuration +# +CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" +CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" +CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y +CONFIG_BOARD_CUSTOM_LEDS=y +# CONFIG_BOARD_CUSTOM_BUTTONS is not set + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_NXP_FMURT1062_V3_HYPER_FLASH is not set +CONFIG_NXP_FMURT1062_V3_QSPI_FLASH=y +CONFIG_BOARD_CRASHDUMP=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_FINALINIT is not set +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_RESET_ON_ASSERT=2 +CONFIG_BOARD_ASSERT_RESET_VALUE=0 +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_CLOCK_MONOTONIC=y +# CONFIG_ARCH_HAVE_TIMEKEEPING is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2018 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=50 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=50 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_IRQCHAIN is not set +# CONFIG_IRQCOUNT is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_PRIORITY=100 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=24 +CONFIG_MAX_TASKS=32 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +CONFIG_NPTHREAD_KEYS=4 +# CONFIG_PTHREAD_MUTEX_TYPES is not set +CONFIG_PTHREAD_MUTEX_ROBUST=y +# CONFIG_PTHREAD_MUTEX_UNSAFE is not set +# CONFIG_PTHREAD_MUTEX_BOTH is not set +# CONFIG_PTHREAD_CLEANUP is not set +# CONFIG_CANCELLATION_POINTS is not set + +# +# Performance Monitoring +# +CONFIG_SCHED_SUSPENDSCHEDULER=y +CONFIG_SCHED_RESUMESCHEDULER=y +# CONFIG_SCHED_IRQMONITOR is not set +# CONFIG_SCHED_CRITMONITOR is not set +# CONFIG_SCHED_CPULOAD is not set +CONFIG_SCHED_INSTRUMENTATION=y +# CONFIG_SCHED_INSTRUMENTATION_PREEMPTION is not set +# CONFIG_SCHED_INSTRUMENTATION_CSECTION is not set +# CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS is not set +# CONFIG_SCHED_INSTRUMENTATION_BUFFER is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +CONFIG_FDCLONE_STDIO=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=54 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=0 +CONFIG_SEM_NNESTPRIO=8 + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +CONFIG_SCHED_ATEXIT=y +CONFIG_SCHED_ATEXIT_MAX=1 +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Configuration +# +# CONFIG_SIG_EVTHREAD is not set +CONFIG_SIG_DEFAULT=y + +# +# Per-signal Default Actions +# +CONFIG_SIG_SIGUSR1_ACTION=y +CONFIG_SIG_SIGUSR2_ACTION=y +CONFIG_SIG_SIGALRM_ACTION=y +CONFIG_SIG_SIGSTOP_ACTION=y +CONFIG_SIG_SIGKILL_ACTION=y + +# +# Signal Numbers +# + +# +# Standard Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALRM=3 +CONFIG_SIG_STOP=6 +CONFIG_SIG_STP=7 +CONFIG_SIG_CONT=8 +CONFIG_SIG_KILL=9 +CONFIG_SIG_INT=10 + +# +# Non-standard Signal Numbers +# +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=4 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPNTHREADS=1 +CONFIG_SCHED_HPWORKPRIORITY=249 +CONFIG_SCHED_HPWORKSTACKSIZE=1800 +# CONFIG_WQUEUE_NOTIFIER is not set +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPNTHREADS=1 +CONFIG_SCHED_LPWORKPRIORITY=50 +CONFIG_SCHED_LPWORKPRIOMAX=176 +CONFIG_SCHED_LPWORKSTACKSIZE=1800 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=750 +CONFIG_USERMAIN_STACKSIZE=2500 +CONFIG_PTHREAD_STACK_MIN=512 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set + +# +# I2C Multiplexer Support +# +# CONFIG_I2CMULTIPLEXER_PCA9540BDP is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y +# CONFIG_ARCH_HAVE_SPI_BITORDER is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CS_CONTROL is not set +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_SPI_TRIGGER is not set +# CONFIG_SPI_DRIVER is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_DRIVERS_AUDIO is not set +# CONFIG_FB_CMAP is not set +# CONFIG_FB_TRANSPARENCY is not set +# CONFIG_DRIVERS_VIDEO is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_LEDS_APA102 is not set +# CONFIG_LEDS_MAX7219 is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_ARCH_HAVE_SDIO_PREFLIGHT is not set +# CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +# CONFIG_MMCSD_HAVE_CARDDETECT is not set +# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set +# CONFIG_MMCSD_SPI is not set +CONFIG_SDIO_DMA=y +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_SDIO_WIDTH_D1_ONLY is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +CONFIG_MTD=y + +# +# MTD Configuration +# +CONFIG_MTD_PARTITION=y +# CONFIG_MTD_SECT512 is not set +# CONFIG_MTD_PARTITION_NAMES is not set +CONFIG_MTD_BYTE_WRITE=y +# CONFIG_MTD_PROGMEM is not set +# CONFIG_MTD_CONFIG is not set + +# +# MTD Device Drivers +# +# CONFIG_MTD_NAND is not set +# CONFIG_RAMMTD is not set +# CONFIG_FILEMTD is not set +# CONFIG_MTD_AT24XX is not set +# CONFIG_MTD_AT25 is not set +# CONFIG_MTD_AT45DB is not set +# CONFIG_MTD_IS25XP is not set +# CONFIG_MTD_M25P is not set +# CONFIG_MTD_MX25L is not set +# CONFIG_MTD_MX35 is not set +# CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set +# CONFIG_MTD_MX25RXX is not set +# CONFIG_MTD_SMART is not set +CONFIG_MTD_RAMTRON=y +CONFIG_RAMTRON_WRITEWAIT=y +CONFIG_RAMTRON_SETSPEED=y +# CONFIG_RAMTRON_CHUNKING is not set +# CONFIG_MTD_SST25 is not set +# CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set +# CONFIG_MTD_SST39FV is not set +# CONFIG_MTD_W25 is not set +# CONFIG_MTD_GD25 is not set +# CONFIG_EEPROM is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=70 +CONFIG_DEV_FIFO_SIZE=0 +# CONFIG_PM is not set +# CONFIG_DRIVERS_POWERLED is not set +# CONFIG_DRIVERS_SMPS is not set +# CONFIG_DRIVERS_MOTOR is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +CONFIG_SERIAL_IFLOWCONTROL=y +CONFIG_SERIAL_OFLOWCONTROL=y +# CONFIG_SERIAL_DMA is not set +CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS=y +CONFIG_SERIAL_IFLOWCONTROL_LOWER_WATERMARK=10 +CONFIG_SERIAL_IFLOWCONTROL_UPPER_WATERMARK=90 +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_SERIAL_TERMIOS=y +# CONFIG_TTY_SIGINT is not set +# CONFIG_TTY_SIGSTP is not set +# CONFIG_LPUART2_SERIAL_CONSOLE is not set +# CONFIG_LPUART3_SERIAL_CONSOLE is not set +# CONFIG_LPUART4_SERIAL_CONSOLE is not set +# CONFIG_LPUART5_SERIAL_CONSOLE is not set +# CONFIG_LPUART6_SERIAL_CONSOLE is not set +CONFIG_LPUART7_SERIAL_CONSOLE=y +# CONFIG_LPUART8_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_LPUART_SERIALDRIVER is not set +# CONFIG_LPUART0_SERIALDRIVER is not set +# CONFIG_LPUART1_SERIALDRIVER is not set +CONFIG_LPUART2_SERIALDRIVER=y +CONFIG_LPUART3_SERIALDRIVER=y +CONFIG_LPUART4_SERIALDRIVER=y +CONFIG_LPUART5_SERIALDRIVER=y +CONFIG_LPUART6_SERIALDRIVER=y +CONFIG_LPUART7_SERIALDRIVER=y +CONFIG_LPUART8_SERIALDRIVER=y + +# +# LPUART2 Configuration +# +CONFIG_LPUART2_RXBUFSIZE=600 +CONFIG_LPUART2_TXBUFSIZE=1500 +CONFIG_LPUART2_BAUD=57600 +CONFIG_LPUART2_BITS=8 +CONFIG_LPUART2_PARITY=0 +CONFIG_LPUART2_2STOP=0 +# CONFIG_LPUART2_IFLOWCONTROL is not set +# CONFIG_LPUART2_OFLOWCONTROL is not set +CONFIG_LPUART2_DMA=y + +# +# LPUART3 Configuration +# +CONFIG_LPUART3_RXBUFSIZE=600 +CONFIG_LPUART3_TXBUFSIZE=3000 +CONFIG_LPUART3_BAUD=57600 +CONFIG_LPUART3_BITS=8 +CONFIG_LPUART3_PARITY=0 +CONFIG_LPUART3_2STOP=0 +CONFIG_LPUART3_IFLOWCONTROL=y +CONFIG_LPUART3_OFLOWCONTROL=y +CONFIG_LPUART3_DMA=y + +# +# LPUART4 Configuration +# +CONFIG_LPUART4_RXBUFSIZE=600 +CONFIG_LPUART4_TXBUFSIZE=1500 +CONFIG_LPUART4_BAUD=57600 +CONFIG_LPUART4_BITS=8 +CONFIG_LPUART4_PARITY=0 +CONFIG_LPUART4_2STOP=0 +CONFIG_LPUART4_IFLOWCONTROL=y +CONFIG_LPUART4_OFLOWCONTROL=y +CONFIG_LPUART4_DMA=y + +# +# LPUART5 Configuration +# +CONFIG_LPUART5_RXBUFSIZE=600 +CONFIG_LPUART5_TXBUFSIZE=1500 +CONFIG_LPUART5_BAUD=57600 +CONFIG_LPUART5_BITS=8 +CONFIG_LPUART5_PARITY=0 +CONFIG_LPUART5_2STOP=0 +# CONFIG_LPUART5_IFLOWCONTROL is not set +# CONFIG_LPUART5_OFLOWCONTROL is not set +# CONFIG_LPUART5_DMA is not set + +# +# LPUART6 Configuration +# +CONFIG_LPUART6_RXBUFSIZE=600 +CONFIG_LPUART6_TXBUFSIZE=1500 +CONFIG_LPUART6_BAUD=57600 +CONFIG_LPUART6_BITS=8 +CONFIG_LPUART6_PARITY=0 +CONFIG_LPUART6_2STOP=0 +# CONFIG_LPUART6_IFLOWCONTROL is not set +# CONFIG_LPUART6_OFLOWCONTROL is not set +CONFIG_LPUART6_DMA=y + +# +# LPUART7 Configuration +# +CONFIG_LPUART7_RXBUFSIZE=120 +CONFIG_LPUART7_TXBUFSIZE=1500 +CONFIG_LPUART7_BAUD=57600 +CONFIG_LPUART7_BITS=8 +CONFIG_LPUART7_PARITY=0 +CONFIG_LPUART7_2STOP=0 +# CONFIG_LPUART7_IFLOWCONTROL is not set +# CONFIG_LPUART7_OFLOWCONTROL is not set +CONFIG_LPUART7_DMA=y + +# +# LPUART8 Configuration +# +CONFIG_LPUART8_RXBUFSIZE=600 +CONFIG_LPUART8_TXBUFSIZE=1500 +CONFIG_LPUART8_BAUD=57600 +CONFIG_LPUART8_BITS=8 +CONFIG_LPUART8_PARITY=0 +CONFIG_LPUART8_2STOP=0 +# CONFIG_LPUART8_IFLOWCONTROL is not set +# CONFIG_LPUART8_OFLOWCONTROL is not set +CONFIG_LPUART8_DMA=y +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_USART9_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_PSEUDOTERM is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +# CONFIG_USBDEV_SELFPOWERED is not set +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +# CONFIG_CDCACM_IFLOWCONTROL is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=600 +CONFIG_CDCACM_TXBUFSIZE=12000 +CONFIG_CDCACM_VENDORID=0x1FC9 +CONFIG_CDCACM_PRODUCTID=0x001d +CONFIG_CDCACM_VENDORSTR="NXP SEMICONDUCTORS" +CONFIG_CDCACM_PRODUCTSTR="PX4 FMURT1062 v1.x" +# CONFIG_USBMSC is not set +# CONFIG_RNDIS is not set +# CONFIG_DFU is not set +# CONFIG_NET_CDCECM is not set +# CONFIG_USBHOST is not set +# CONFIG_USBMISC is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set +# CONFIG_DRIVERS_CONTACTLESS is not set +# CONFIG_1WIRE is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +CONFIG_SYSLOG_WRITE=y +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_BUFFER is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_PREFIX is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET_WRITE_BUFFERS is not set +# CONFIG_NET_READAHEAD is not set +# CONFIG_NET_MCASTGROUP is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_PSEUDOFS_SOFTLINKS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_AIO is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set + +# +# Partition Table +# +# CONFIG_PTABLE_PARTITION is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FAT_LFN_ALIAS_HASH=y +CONFIG_FAT_LFN_ALIAS_TRAILCHARS=0 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +CONFIG_FAT_DMAMEMORY=y +CONFIG_FAT_DIRECT_RETRY=y +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +CONFIG_FS_CROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +CONFIG_FS_PROCFS_EXCLUDE_ENVIRON=y +CONFIG_FS_PROCFS_EXCLUDE_BLOCKS=y +CONFIG_FS_PROCFS_EXCLUDE_MOUNT=y +CONFIG_FS_PROCFS_EXCLUDE_USAGE=y +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +CONFIG_FS_PROCFS_EXCLUDE_VERSION=y +# CONFIG_FS_PROCFS_EXCLUDE_MEMINFO is not set +CONFIG_FS_PROCFS_EXCLUDE_MOUNTS=y +# CONFIG_FS_SPIFFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set +# CONFIG_NXFONTS is not set + +# +# Font Cache Pixel Depths +# +CONFIG_NXFONTS_DISABLE_1BPP=y +CONFIG_NXFONTS_DISABLE_2BPP=y +CONFIG_NXFONTS_DISABLE_4BPP=y +CONFIG_NXFONTS_DISABLE_8BPP=y +CONFIG_NXFONTS_DISABLE_16BPP=y +CONFIG_NXFONTS_DISABLE_24BPP=y +CONFIG_NXFONTS_DISABLE_32BPP=y +CONFIG_NXFONTS_PACKEDMSFIRST=y +# CONFIG_NXGLIB is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +CONFIG_GRAN=y +CONFIG_GRAN_INTR=y +# CONFIG_MM_FILL_ALLOCATIONS is not set + +# +# Common I/O Buffer Support +# +# CONFIG_MM_IOB is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_LOADABLE is not set +# CONFIG_PIC is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# + +# +# Standard C I/O +# +# CONFIG_STDIO_DISABLE_BUFFERING is not set +CONFIG_STDIO_BUFFER_SIZE=32 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_SCANSET is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y + +# +# Architecture-Specific Support +# +CONFIG_ARCH_LOWPUTC=y +# CONFIG_ARCH_ROMGETC is not set +CONFIG_LIBC_ARCH_MEMCPY=y +# CONFIG_LIBC_ARCH_MEMCMP is not set +# CONFIG_LIBC_ARCH_MEMMOVE is not set +# CONFIG_LIBC_ARCH_MEMSET is not set +# CONFIG_LIBC_ARCH_STRCHR is not set +# CONFIG_LIBC_ARCH_STRCMP is not set +# CONFIG_LIBC_ARCH_STRCPY is not set +# CONFIG_LIBC_ARCH_STRNCPY is not set +# CONFIG_LIBC_ARCH_STRLEN is not set +# CONFIG_LIBC_ARCH_STRNLEN is not set +# CONFIG_LIBC_ARCH_ELF is not set +CONFIG_ARMV7M_MEMCPY=y + +# +# stdlib Options +# +CONFIG_LIB_RAND_ORDER=1 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 + +# +# Program Execution Options +# +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 + +# +# errno Decode Support +# +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +# CONFIG_LIBC_PERROR_STDOUT is not set + +# +# memcpy/memset Options +# +CONFIG_MEMSET_OPTSPEED=y +CONFIG_MEMSET_64BIT=y +# CONFIG_LIBC_DLLFCN is not set +# CONFIG_LIBC_MODLIB is not set +# CONFIG_LIBC_WCHAR is not set +# CONFIG_LIBC_LOCALE is not set +CONFIG_LIBC_LZF=y +CONFIG_LIBC_LZF_SMALL=y +# CONFIG_LIBC_LZF_FAST is not set +# CONFIG_LIBC_LZF_FASTEST is not set +CONFIG_LIBC_LZF_HLOG=13 +CONFIG_LIBC_LZF_ALIGN=y + +# +# Time/Time Zone Support +# +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_TIME_EXTENDED=y +CONFIG_ARCH_HAVE_TLS=y + +# +# Thread Local Storage (TLS) +# +# CONFIG_TLS is not set + +# +# Network-Related Options +# +# CONFIG_LIBC_IPv4_ADDRCONV is not set +# CONFIG_LIBC_IPv6_ADDRCONV is not set +# CONFIG_LIBC_NETDB is not set + +# +# NETDB Support +# +# CONFIG_LIBC_GAISTRERROR is not set +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_ENVPATH is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +# CONFIG_CXX_NEWLONG is not set + +# +# LLVM C++ Library (libcxx) +# +# CONFIG_LIBCXX is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set +# CONFIG_LIBDSP is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_ADXL372_TEST is not set +# CONFIG_EXAMPLES_APA102 is not set +# CONFIG_EXAMPLES_BATTERY is not set +# CONFIG_EXAMPLES_CALIB_UDELAY is not set +# CONFIG_EXAMPLES_CCTYPE is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CROMFS is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DHTXX is not set +# CONFIG_EXAMPLES_DSPTEST is not set +# CONFIG_EXAMPLES_FLOWC is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_GPS is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_INA219 is not set +# CONFIG_EXAMPLES_INA226 is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_LSM330SPI_TEST is not set +# CONFIG_EXAMPLES_LVGLDEMO is not set +# CONFIG_EXAMPLES_MAX31855 is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MLX90614 is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXDEMO is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_OBD2 is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PDCURSES is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_POWERLED is not set +# CONFIG_EXAMPLES_POWERMONITOR is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMPS is not set +# CONFIG_EXAMPLES_STAT is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USERFS is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_XBC_TEST is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_MKFATFS=y +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_GRAPHICS_FT80X is not set +# CONFIG_GRAPHICS_LVGL is not set + +# +# NxWidgets/NxWM +# + +# +# NxWidgets +# + +# +# NxWM +# + +# +# Unit Tests +# +# CONFIG_GRAPHICS_PDCURSES is not set +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_PROMPT_STRING="nsh> " +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=128 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_QUOTE=y +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=12 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=8 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +# CONFIG_NSH_DISABLE_DATE is not set +CONFIG_NSH_DISABLE_DD=y +# CONFIG_NSH_DISABLE_DF is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_ENV is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_EXPORT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +CONFIG_NSH_DISABLE_MB=y +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKRD=y +CONFIG_NSH_DISABLE_MH=y +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PRINTF=y +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PSSTACKUSAGE=y +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_REBOOT=y +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +CONFIG_NSH_DISABLE_SHUTDOWN=y +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_TELNETD=y +CONFIG_NSH_DISABLE_TRUNCATE=y +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Configure Command Options +# +CONFIG_NSH_VARS=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +CONFIG_NSH_CROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=128 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=1 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set +CONFIG_HAVE_CXXINITIALIZE=y + +# +# System Libraries and NSH Add-Ons +# +CONFIG_SYSTEM_CDCACM=y +CONFIG_SYSTEM_CDCACM_DEVMINOR=0 +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_EMBEDLOG is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_LZF is not set +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NSH_PRIORITY=100 +CONFIG_SYSTEM_NSH_STACKSIZE=2048 +# CONFIG_SYSTEM_NSH_CXXINITIALIZE is not set +# CONFIG_SYSTEM_POPEN is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SETLOGMASK is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_SYSTEM is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_TERMCURSES is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set + +# +# Testing +# +# CONFIG_TESTING_OSTEST is not set +# CONFIG_TESTING_UNITY is not set + +# +# Wireless Libraries and NSH Add-Ons +# + +# +# Bluetooth applications +# +# CONFIG_BTSAK is not set + +# +# IEEE 802.15.4 applications +# +# CONFIG_IEEE802154_LIBMAC is not set +# CONFIG_IEEE802154_LIBUTILS is not set +# CONFIG_IEEE802154_I8SAK is not set diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.evk b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.evk new file mode 100644 index 000000000000..c6150e5b172f --- /dev/null +++ b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.evk @@ -0,0 +1,1415 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_MACOS is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_LOADABLE is not set +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set +# CONFIG_DFU_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_MISOC is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_RISCV is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_XTENSA is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +# CONFIG_ARCH_OR1K is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_AM335X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +CONFIG_ARCH_CHIP_IMXRT=y +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LC823450 is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_LPC54XX is not set +# CONFIG_ARCH_CHIP_MAX326XX is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_CHIP_NRF52 is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD2X is not set +# CONFIG_ARCH_CHIP_SAML2X is not set +# CONFIG_ARCH_CHIP_SAMD5X is not set +# CONFIG_ARCH_CHIP_SAME5X is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F0 is not set +# CONFIG_ARCH_CHIP_STM32L0 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32H7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_XMC4 is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM1136J is not set +# CONFIG_ARCH_ARM1156T2 is not set +# CONFIG_ARCH_ARM1176JZ is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM23 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM33 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEXR5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_HAVE_LAZYFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +CONFIG_ARCH_HAVE_HARDFAULT_DEBUG=y +CONFIG_DEBUG_HARDFAULT_ALERT=y +CONFIG_ARCH_HAVE_MEMFAULT_DEBUG=y +# CONFIG_ARM_SEMIHOSTING_SYSLOG is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARMV7M_BASEPRI_WAR=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_TOOLCHAIN_CLANGL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# i.MX RT Configuration Options +# +# CONFIG_ARCH_CHIP_MIMXRT1051DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1051CVL5A is not set +# CONFIG_ARCH_CHIP_MIMXRT1052DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1052CVL5A is not set +# CONFIG_ARCH_CHIP_MIMXRT1061DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1061CVL5A is not set +CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y +# CONFIG_ARCH_CHIP_MIMXRT1062CVL5A is not set +# CONFIG_ARCH_FAMILY_MXRT105xDVL6A is not set +# CONFIG_ARCH_FAMILY_MIMXRT1052CVL5A is not set +# CONFIG_ARCH_FAMILY_IMXRT105x is not set +CONFIG_ARCH_FAMILY_MXRT106xDVL6A=y +# CONFIG_ARCH_FAMILY_MIMXRT1062CVL5A is not set +CONFIG_ARCH_FAMILY_IMXRT106x=y +CONFIG_IMXRT_HAVE_LPUART=y +CONFIG_IMXRT_LPI2C=y +CONFIG_IMXRT_LPSPI=y +CONFIG_IMXRT_HIGHSPEED_GPIO=y + +# +# i.MX RT Peripheral Selection +# +CONFIG_IMXRT_EDMA=y +# CONFIG_IMXRT_ENET is not set + +# +# FlexIO Peripherals +# + +# +# LPUART Peripherals +# +CONFIG_IMXRT_LPUART1=y +CONFIG_IMXRT_LPUART2=y +CONFIG_IMXRT_LPUART3=y +# CONFIG_IMXRT_LPUART4 is not set +# CONFIG_IMXRT_LPUART5 is not set +# CONFIG_IMXRT_LPUART6 is not set +# CONFIG_IMXRT_LPUART7 is not set +# CONFIG_IMXRT_LPUART8 is not set + +# +# LPI2C Peripherals +# +CONFIG_IMXRT_LPI2C1=y +CONFIG_LPI2C1_BUSYIDLE=0 +CONFIG_LPI2C1_FILTSCL=0 +CONFIG_LPI2C1_FILTSDA=0 +CONFIG_IMXRT_LPI2C2=y +CONFIG_LPI2C2_BUSYIDLE=0 +CONFIG_LPI2C2_FILTSCL=0 +CONFIG_LPI2C2_FILTSDA=0 +# CONFIG_IMXRT_LPI2C3 is not set +# CONFIG_IMXRT_LPI2C4 is not set + +# +# LPSPI Peripherals +# +# CONFIG_IMXRT_LPSPI1 is not set +CONFIG_IMXRT_LPSPI2=y +CONFIG_IMXRT_LPSPI3=y +# CONFIG_IMXRT_LPSPI4 is not set +# CONFIG_IMXRT_SEMC is not set +CONFIG_IMXRT_SNVS_LPSRTC=y +CONFIG_IMXRT_SNVS_HPRTC=y +# CONFIG_IMXRT_USDHC is not set +# CONFIG_IMXRT_GPIO_IRQ is not set + +# +# Memory Configuration +# +CONFIG_IMXRT_BOOT_OCRAM=y +CONFIG_IMXRT_OCRAM_PRIMARY=y + +# +# i.MX RT Heap Configuration +# + +# +# eDMA Configuration +# +CONFIG_IMXRT_EDMA_NTCD=0 +# CONFIG_IMXRT_EDMA_ELINK is not set +# CONFIG_IMXRT_EDMA_ERCA is not set +CONFIG_IMXRT_EDMA_HOE=y +# CONFIG_IMXRT_EDMA_CLM is not set +# CONFIG_IMXRT_EDMA_EMLIM is not set +# CONFIG_IMXRT_EDMA_EDBG is not set + +# +# RTC Configuration +# +CONFIG_IMXRT_RTC_MAGIC_REG=1 +CONFIG_IMXRT_RTC_MAGIC=0xfacefeed +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y +# CONFIG_ARCH_GNU_NO_WEAKFUNCTIONS is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_HAVE_IRQTRIGGER=y +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_PROGMEM is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_HAVE_FETCHADD=y +# CONFIG_ARCH_HAVE_RTC_SUBSECONDS is not set +# CONFIG_ARCH_HAVE_GARBAGE is not set +# CONFIG_ARCH_GLOBAL_IRQDISABLE is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set +# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=104926 + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=750 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20200000 +CONFIG_RAM_SIZE=1048576 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_IMXRT1060_EVK is not set +CONFIG_ARCH_BOARD_CUSTOM=y + +# +# Custom Board Configuration +# +CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" +CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" +CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y +CONFIG_BOARD_CUSTOM_LEDS=y +# CONFIG_BOARD_CUSTOM_BUTTONS is not set + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_NXP_FMURT1062_V3_HYPER_FLASH is not set +CONFIG_NXP_FMURT1062_V3_QSPI_FLASH=y +CONFIG_BOARD_CRASHDUMP=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_FINALINIT is not set +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_RESET_ON_ASSERT=2 +CONFIG_BOARD_ASSERT_RESET_VALUE=0 +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEMTICK_HOOK is not set +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_CLOCK_MONOTONIC=y +# CONFIG_ARCH_HAVE_TIMEKEEPING is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2018 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=50 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=50 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_IRQCHAIN is not set +# CONFIG_IRQCOUNT is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_PRIORITY=100 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=24 +CONFIG_MAX_TASKS=32 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +CONFIG_NPTHREAD_KEYS=4 +# CONFIG_PTHREAD_MUTEX_TYPES is not set +CONFIG_PTHREAD_MUTEX_ROBUST=y +# CONFIG_PTHREAD_MUTEX_UNSAFE is not set +# CONFIG_PTHREAD_MUTEX_BOTH is not set +# CONFIG_PTHREAD_CLEANUP is not set +# CONFIG_CANCELLATION_POINTS is not set + +# +# Performance Monitoring +# +CONFIG_SCHED_SUSPENDSCHEDULER=y +CONFIG_SCHED_RESUMESCHEDULER=y +# CONFIG_SCHED_IRQMONITOR is not set +# CONFIG_SCHED_CRITMONITOR is not set +# CONFIG_SCHED_CPULOAD is not set +CONFIG_SCHED_INSTRUMENTATION=y +# CONFIG_SCHED_INSTRUMENTATION_PREEMPTION is not set +# CONFIG_SCHED_INSTRUMENTATION_CSECTION is not set +# CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS is not set +# CONFIG_SCHED_INSTRUMENTATION_BUFFER is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +CONFIG_FDCLONE_STDIO=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=54 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=0 +CONFIG_SEM_NNESTPRIO=8 + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +CONFIG_SCHED_ATEXIT=y +CONFIG_SCHED_ATEXIT_MAX=1 +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Configuration +# +# CONFIG_SIG_EVTHREAD is not set +CONFIG_SIG_DEFAULT=y + +# +# Per-signal Default Actions +# +CONFIG_SIG_SIGUSR1_ACTION=y +CONFIG_SIG_SIGUSR2_ACTION=y +CONFIG_SIG_SIGALRM_ACTION=y +CONFIG_SIG_SIGSTOP_ACTION=y +CONFIG_SIG_SIGKILL_ACTION=y + +# +# Signal Numbers +# + +# +# Standard Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALRM=3 +CONFIG_SIG_STOP=6 +CONFIG_SIG_STP=7 +CONFIG_SIG_CONT=8 +CONFIG_SIG_KILL=9 +CONFIG_SIG_INT=10 + +# +# Non-standard Signal Numbers +# +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=4 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +# CONFIG_WQUEUE_NOTIFIER is not set +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPNTHREADS=1 +CONFIG_SCHED_HPWORKPRIORITY=249 +CONFIG_SCHED_HPWORKSTACKSIZE=1800 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPNTHREADS=1 +CONFIG_SCHED_LPWORKPRIORITY=50 +CONFIG_SCHED_LPWORKPRIOMAX=176 +CONFIG_SCHED_LPWORKSTACKSIZE=1800 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=750 +CONFIG_USERMAIN_STACKSIZE=2500 +CONFIG_PTHREAD_STACK_MIN=512 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set + +# +# I2C Multiplexer Support +# +# CONFIG_I2CMULTIPLEXER_PCA9540BDP is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y +# CONFIG_ARCH_HAVE_SPI_BITORDER is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CS_CONTROL is not set +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_SPI_TRIGGER is not set +# CONFIG_SPI_DRIVER is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_WATCHDOG_AUTOMONITOR is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_DRIVERS_AUDIO is not set +# CONFIG_FB_CMAP is not set +# CONFIG_FB_TRANSPARENCY is not set +# CONFIG_DRIVERS_VIDEO is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set + +# +# Character/Segment LCD Devices +# +# CONFIG_SLCD is not set + +# +# Other LCD-related Devices +# +# CONFIG_LCD_OTHER is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_LEDS_APA102 is not set +# CONFIG_LEDS_MAX7219 is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_ARCH_HAVE_SDIO_PREFLIGHT is not set +# CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +# CONFIG_MMCSD_HAVE_CARDDETECT is not set +# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set +# CONFIG_MMCSD_SPI is not set +# CONFIG_SDIO_DMA is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=70 +CONFIG_DEV_FIFO_SIZE=0 +# CONFIG_PM is not set +# CONFIG_DRIVERS_POWERLED is not set +# CONFIG_DRIVERS_SMPS is not set +# CONFIG_DRIVERS_MOTOR is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_SERIAL_DMA=y +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_SERIAL_TERMIOS=y +# CONFIG_TTY_SIGINT is not set +# CONFIG_TTY_SIGSTP is not set +# CONFIG_LPUART1_SERIAL_CONSOLE is not set +# CONFIG_LPUART2_SERIAL_CONSOLE is not set +CONFIG_LPUART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_LPUART_SERIALDRIVER is not set +# CONFIG_LPUART0_SERIALDRIVER is not set +CONFIG_LPUART1_SERIALDRIVER=y +CONFIG_LPUART2_SERIALDRIVER=y +CONFIG_LPUART3_SERIALDRIVER=y +# CONFIG_LPUART4_SERIALDRIVER is not set +# CONFIG_LPUART5_SERIALDRIVER is not set +# CONFIG_LPUART6_SERIALDRIVER is not set +# CONFIG_LPUART7_SERIALDRIVER is not set +# CONFIG_LPUART8_SERIALDRIVER is not set + +# +# LPUART1 Configuration +# +CONFIG_LPUART1_RXBUFSIZE=256 +CONFIG_LPUART1_TXBUFSIZE=256 +CONFIG_LPUART1_BAUD=115200 +CONFIG_LPUART1_BITS=8 +CONFIG_LPUART1_PARITY=0 +CONFIG_LPUART1_2STOP=0 +# CONFIG_LPUART1_IFLOWCONTROL is not set +# CONFIG_LPUART1_OFLOWCONTROL is not set +# CONFIG_LPUART1_DMA is not set + +# +# LPUART2 Configuration +# +CONFIG_LPUART2_RXBUFSIZE=600 +CONFIG_LPUART2_TXBUFSIZE=1500 +CONFIG_LPUART2_BAUD=115200 +CONFIG_LPUART2_BITS=8 +CONFIG_LPUART2_PARITY=0 +CONFIG_LPUART2_2STOP=0 +# CONFIG_LPUART2_IFLOWCONTROL is not set +# CONFIG_LPUART2_OFLOWCONTROL is not set +CONFIG_LPUART2_DMA=y + +# +# LPUART3 Configuration +# +CONFIG_LPUART3_RXBUFSIZE=600 +CONFIG_LPUART3_TXBUFSIZE=3000 +CONFIG_LPUART3_BAUD=57600 +CONFIG_LPUART3_BITS=8 +CONFIG_LPUART3_PARITY=0 +CONFIG_LPUART3_2STOP=0 +# CONFIG_LPUART3_IFLOWCONTROL is not set +# CONFIG_LPUART3_OFLOWCONTROL is not set +# CONFIG_LPUART3_DMA is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_USART9_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_PSEUDOTERM is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +# CONFIG_USBDEV_SELFPOWERED is not set +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +# CONFIG_CDCACM_IFLOWCONTROL is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=600 +CONFIG_CDCACM_TXBUFSIZE=12000 +CONFIG_CDCACM_VENDORID=0x1FC9 +CONFIG_CDCACM_PRODUCTID=0x001d +CONFIG_CDCACM_VENDORSTR="NXP SEMICONDUCTORS" +CONFIG_CDCACM_PRODUCTSTR="PX4 FMURT1062 v1.x" +# CONFIG_USBMSC is not set +# CONFIG_RNDIS is not set +# CONFIG_DFU is not set +# CONFIG_NET_CDCECM is not set +# CONFIG_USBHOST is not set +# CONFIG_USBMISC is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set +# CONFIG_DRIVERS_CONTACTLESS is not set +# CONFIG_1WIRE is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +CONFIG_SYSLOG_WRITE=y +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_BUFFER is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_PREFIX is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET_WRITE_BUFFERS is not set +# CONFIG_NET_READAHEAD is not set +# CONFIG_NET_MCASTGROUP is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_PSEUDOFS_SOFTLINKS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_AIO is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set + +# +# Partition Table +# +# CONFIG_PTABLE_PARTITION is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FAT_LFN_ALIAS_HASH=y +CONFIG_FAT_LFN_ALIAS_TRAILCHARS=0 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +CONFIG_FAT_DMAMEMORY=y +CONFIG_FAT_DIRECT_RETRY=y +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +CONFIG_FS_CROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +CONFIG_FS_PROCFS_EXCLUDE_ENVIRON=y +CONFIG_FS_PROCFS_EXCLUDE_BLOCKS=y +CONFIG_FS_PROCFS_EXCLUDE_MOUNT=y +CONFIG_FS_PROCFS_EXCLUDE_USAGE=y +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +CONFIG_FS_PROCFS_EXCLUDE_VERSION=y +# CONFIG_FS_PROCFS_EXCLUDE_MEMINFO is not set +CONFIG_FS_PROCFS_EXCLUDE_MOUNTS=y +# CONFIG_FS_SPIFFS is not set +# CONFIG_FS_LITTLEFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set +# CONFIG_NXFONTS is not set + +# +# Font Cache Pixel Depths +# +CONFIG_NXFONTS_DISABLE_1BPP=y +CONFIG_NXFONTS_DISABLE_2BPP=y +CONFIG_NXFONTS_DISABLE_4BPP=y +CONFIG_NXFONTS_DISABLE_8BPP=y +CONFIG_NXFONTS_DISABLE_16BPP=y +CONFIG_NXFONTS_DISABLE_24BPP=y +CONFIG_NXFONTS_DISABLE_32BPP=y +CONFIG_NXFONTS_PACKEDMSFIRST=y +# CONFIG_NXGLIB is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +CONFIG_GRAN=y +CONFIG_GRAN_INTR=y +# CONFIG_MM_FILL_ALLOCATIONS is not set + +# +# Common I/O Buffer Support +# +# CONFIG_MM_IOB is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_LOADABLE is not set +# CONFIG_PIC is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# + +# +# Standard C I/O +# +# CONFIG_STDIO_DISABLE_BUFFERING is not set +CONFIG_STDIO_BUFFER_SIZE=32 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_SCANSET is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y + +# +# Architecture-Specific Support +# +CONFIG_ARCH_LOWPUTC=y +# CONFIG_ARCH_ROMGETC is not set +CONFIG_LIBC_ARCH_MEMCPY=y +# CONFIG_LIBC_ARCH_MEMCMP is not set +# CONFIG_LIBC_ARCH_MEMMOVE is not set +# CONFIG_LIBC_ARCH_MEMSET is not set +# CONFIG_LIBC_ARCH_STRCHR is not set +# CONFIG_LIBC_ARCH_STRCMP is not set +# CONFIG_LIBC_ARCH_STRCPY is not set +# CONFIG_LIBC_ARCH_STRNCPY is not set +# CONFIG_LIBC_ARCH_STRLEN is not set +# CONFIG_LIBC_ARCH_STRNLEN is not set +# CONFIG_LIBC_ARCH_ELF is not set +CONFIG_ARMV7M_MEMCPY=y + +# +# stdlib Options +# +CONFIG_LIB_RAND_ORDER=1 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 + +# +# Program Execution Options +# +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIB_HOSTNAME="" + +# +# errno Decode Support +# +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +# CONFIG_LIBC_PERROR_STDOUT is not set + +# +# memcpy/memset Options +# +CONFIG_MEMSET_OPTSPEED=y +CONFIG_MEMSET_64BIT=y +# CONFIG_LIBC_DLLFCN is not set +# CONFIG_LIBC_MODLIB is not set +# CONFIG_LIBC_WCHAR is not set +# CONFIG_LIBC_LOCALE is not set +CONFIG_LIBC_LZF=y +CONFIG_LIBC_LZF_SMALL=y +# CONFIG_LIBC_LZF_FAST is not set +# CONFIG_LIBC_LZF_FASTEST is not set +CONFIG_LIBC_LZF_HLOG=13 +CONFIG_LIBC_LZF_ALIGN=y + +# +# Time/Time Zone Support +# +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_TIME_EXTENDED=y +CONFIG_ARCH_HAVE_TLS=y + +# +# Thread Local Storage (TLS) +# +# CONFIG_TLS is not set + +# +# Network-Related Options +# +# CONFIG_LIBC_IPv4_ADDRCONV is not set +# CONFIG_LIBC_IPv6_ADDRCONV is not set +# CONFIG_LIBC_NETDB is not set + +# +# NETDB Support +# +# CONFIG_LIBC_GAISTRERROR is not set +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_ENVPATH is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +# CONFIG_CXX_NEWLONG is not set + +# +# LLVM C++ Library (libcxx) +# +# CONFIG_LIBCXX is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set +# CONFIG_LIBDSP is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_ADXL372_TEST is not set +# CONFIG_EXAMPLES_APA102 is not set +# CONFIG_EXAMPLES_BATTERY is not set +# CONFIG_EXAMPLES_CALIB_UDELAY is not set +# CONFIG_EXAMPLES_CCTYPE is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CROMFS is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DHTXX is not set +# CONFIG_EXAMPLES_DSPTEST is not set +# CONFIG_EXAMPLES_FLOWC is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_GPS is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_INA219 is not set +# CONFIG_EXAMPLES_INA226 is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_LSM330SPI_TEST is not set +# CONFIG_EXAMPLES_LVGLDEMO is not set +# CONFIG_EXAMPLES_MAX31855 is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MLX90614 is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXDEMO is not set +# CONFIG_EXAMPLES_OBD2 is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PDCURSES is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_POWERLED is not set +# CONFIG_EXAMPLES_POWERMONITOR is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMPS is not set +# CONFIG_EXAMPLES_STAT is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USERFS is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_XBC_TEST is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_MKFATFS=y +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_GRAPHICS_FT80X is not set +# CONFIG_GRAPHICS_LVGL is not set + +# +# NxWidgets/NxWM +# + +# +# NxWidgets +# + +# +# NxWM +# + +# +# Unit Tests +# +# CONFIG_GRAPHICS_PDCURSES is not set +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_PROMPT_STRING="nsh> " +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=128 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_QUOTE=y +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=12 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=8 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +# CONFIG_NSH_DISABLE_DATE is not set +CONFIG_NSH_DISABLE_DD=y +# CONFIG_NSH_DISABLE_DF is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_ENV is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_EXPORT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +CONFIG_NSH_DISABLE_MB=y +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +CONFIG_NSH_DISABLE_MH=y +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PRINTF=y +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PSSTACKUSAGE=y +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_REBOOT=y +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +CONFIG_NSH_DISABLE_SHUTDOWN=y +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_TELNETD=y +CONFIG_NSH_DISABLE_TRUNCATE=y +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Configure Command Options +# +CONFIG_NSH_VARS=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +CONFIG_NSH_CROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=128 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=1 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set +CONFIG_HAVE_CXXINITIALIZE=y + +# +# System Libraries and NSH Add-Ons +# +CONFIG_SYSTEM_CDCACM=y +CONFIG_SYSTEM_CDCACM_DEVMINOR=0 +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_EMBEDLOG is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_LZF is not set +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NSH_PRIORITY=100 +CONFIG_SYSTEM_NSH_STACKSIZE=2048 +# CONFIG_SYSTEM_NSH_CXXINITIALIZE is not set +# CONFIG_SYSTEM_POPEN is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SETLOGMASK is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_SYSTEM is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_TERMCURSES is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set + +# +# Testing +# +# CONFIG_TESTINGCXXTEST is not set +# CONFIG_TESTING_FSTEST is not set +# CONFIG_TESTING_NXFFS is not set +# CONFIG_TESTING_OSTEST is not set +# CONFIG_TESTING_SMART is not set +# CONFIG_TESTING_SMART_TEST is not set +# CONFIG_TESTING_UNITY is not set + +# +# Wireless Libraries and NSH Add-Ons +# + +# +# Bluetooth applications +# +# CONFIG_BTSAK is not set + +# +# IEEE 802.15.4 applications +# +# CONFIG_IEEE802154_LIBMAC is not set +# CONFIG_IEEE802154_LIBUTILS is not set +# CONFIG_IEEE802154_I8SAK is not set diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.evk.sdio b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.evk.sdio new file mode 100644 index 000000000000..3725dfd34e4a --- /dev/null +++ b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig.evk.sdio @@ -0,0 +1,1425 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_MACOS is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_LOADABLE is not set +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set +# CONFIG_DFU_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_MISOC is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_RISCV is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_XTENSA is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +# CONFIG_ARCH_OR1K is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_AM335X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +CONFIG_ARCH_CHIP_IMXRT=y +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LC823450 is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_LPC54XX is not set +# CONFIG_ARCH_CHIP_MAX326XX is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_CHIP_NRF52 is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD2X is not set +# CONFIG_ARCH_CHIP_SAML2X is not set +# CONFIG_ARCH_CHIP_SAMD5X is not set +# CONFIG_ARCH_CHIP_SAME5X is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F0 is not set +# CONFIG_ARCH_CHIP_STM32L0 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32H7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_XMC4 is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM1136J is not set +# CONFIG_ARCH_ARM1156T2 is not set +# CONFIG_ARCH_ARM1176JZ is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM23 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM33 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEXR5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_HAVE_LAZYFPU=y +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +CONFIG_ARCH_HAVE_HARDFAULT_DEBUG=y +CONFIG_DEBUG_HARDFAULT_ALERT=y +CONFIG_ARCH_HAVE_MEMFAULT_DEBUG=y +# CONFIG_ARM_SEMIHOSTING_SYSLOG is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARMV7M_BASEPRI_WAR=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_TOOLCHAIN_CLANGL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# i.MX RT Configuration Options +# +# CONFIG_ARCH_CHIP_MIMXRT1051DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1051CVL5A is not set +# CONFIG_ARCH_CHIP_MIMXRT1052DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1052CVL5A is not set +# CONFIG_ARCH_CHIP_MIMXRT1061DVL6A is not set +# CONFIG_ARCH_CHIP_MIMXRT1061CVL5A is not set +CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y +# CONFIG_ARCH_CHIP_MIMXRT1062CVL5A is not set +# CONFIG_ARCH_FAMILY_MXRT105xDVL6A is not set +# CONFIG_ARCH_FAMILY_MIMXRT1052CVL5A is not set +# CONFIG_ARCH_FAMILY_IMXRT105x is not set +CONFIG_ARCH_FAMILY_MXRT106xDVL6A=y +# CONFIG_ARCH_FAMILY_MIMXRT1062CVL5A is not set +CONFIG_ARCH_FAMILY_IMXRT106x=y +CONFIG_IMXRT_HAVE_LPUART=y +#CONFIG_IMXRT_LPI2C=y +CONFIG_IMXRT_LPSPI=y +CONFIG_IMXRT_HIGHSPEED_GPIO=y + +# +# i.MX RT Peripheral Selection +# +CONFIG_IMXRT_EDMA=y +# CONFIG_IMXRT_ENET is not set + +# +# FlexIO Peripherals +# + +# +# LPUART Peripherals +# +CONFIG_IMXRT_LPUART1=y +CONFIG_IMXRT_LPUART2=y +CONFIG_IMXRT_LPUART3=y +# CONFIG_IMXRT_LPUART4 is not set +# CONFIG_IMXRT_LPUART5 is not set +# CONFIG_IMXRT_LPUART6 is not set +# CONFIG_IMXRT_LPUART7 is not set +# CONFIG_IMXRT_LPUART8 is not set + +# +# LPI2C Peripherals +# +#CONFIG_IMXRT_LPI2C1=y +CONFIG_LPI2C1_BUSYIDLE=0 +CONFIG_LPI2C1_FILTSCL=0 +CONFIG_LPI2C1_FILTSDA=0 +#CONFIG_IMXRT_LPI2C2=y +CONFIG_LPI2C2_BUSYIDLE=0 +CONFIG_LPI2C2_FILTSCL=0 +CONFIG_LPI2C2_FILTSDA=0 +# CONFIG_IMXRT_LPI2C3 is not set +# CONFIG_IMXRT_LPI2C4 is not set + +# +# LPSPI Peripherals +# +# CONFIG_IMXRT_LPSPI1 is not set +# CONFIG_IMXRT_LPSPI2 is not set +CONFIG_IMXRT_LPSPI3=y +# CONFIG_IMXRT_LPSPI4 is not set +# CONFIG_IMXRT_SEMC is not set +CONFIG_IMXRT_SNVS_LPSRTC=y +CONFIG_IMXRT_SNVS_HPRTC=y +CONFIG_IMXRT_USDHC=y +# CONFIG_IMXRT_GPIO_IRQ is not set + +# +# Memory Configuration +# +CONFIG_IMXRT_BOOT_OCRAM=y +CONFIG_IMXRT_OCRAM_PRIMARY=y + +# +# i.MX RT Heap Configuration +# + +# +# USDHC Configuration +# +CONFIG_IMXRT_USDHC_DMA=y +# CONFIG_IMXRT_USDHC_WIDTH_D1_ONLY is not set + +# +# eDMA Configuration +# +CONFIG_IMXRT_EDMA_NTCD=0 +# CONFIG_IMXRT_EDMA_ELINK is not set +# CONFIG_IMXRT_EDMA_ERCA is not set +CONFIG_IMXRT_EDMA_HOE=y +# CONFIG_IMXRT_EDMA_CLM is not set +# CONFIG_IMXRT_EDMA_EMLIM is not set +# CONFIG_IMXRT_EDMA_EDBG is not set + +# +# RTC Configuration +# +CONFIG_IMXRT_RTC_MAGIC_REG=1 +CONFIG_IMXRT_RTC_MAGIC=0xfacefeed +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y +# CONFIG_ARCH_GNU_NO_WEAKFUNCTIONS is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_HAVE_IRQTRIGGER=y +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_PROGMEM is not set +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_HAVE_FETCHADD=y +# CONFIG_ARCH_HAVE_RTC_SUBSECONDS is not set +# CONFIG_ARCH_HAVE_GARBAGE is not set +# CONFIG_ARCH_GLOBAL_IRQDISABLE is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set +# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=104926 + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=750 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20200000 +CONFIG_RAM_SIZE=1048576 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_IMXRT1060_EVK is not set +CONFIG_ARCH_BOARD_CUSTOM=y + +# +# Custom Board Configuration +# +CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" +CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" +CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y +CONFIG_BOARD_CUSTOM_LEDS=y +# CONFIG_BOARD_CUSTOM_BUTTONS is not set + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_NXP_FMURT1062_V3_HYPER_FLASH is not set +CONFIG_NXP_FMURT1062_V3_QSPI_FLASH=y +CONFIG_BOARD_CRASHDUMP=y +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_FINALINIT is not set +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_RESET_ON_ASSERT=2 +CONFIG_BOARD_ASSERT_RESET_VALUE=0 +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEMTICK_HOOK is not set +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_CLOCK_MONOTONIC=y +# CONFIG_ARCH_HAVE_TIMEKEEPING is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2018 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=50 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=50 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_IRQCHAIN is not set +# CONFIG_IRQCOUNT is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_USERMAIN_PRIORITY=100 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=24 +CONFIG_MAX_TASKS=32 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +CONFIG_NPTHREAD_KEYS=4 +# CONFIG_PTHREAD_MUTEX_TYPES is not set +CONFIG_PTHREAD_MUTEX_ROBUST=y +# CONFIG_PTHREAD_MUTEX_UNSAFE is not set +# CONFIG_PTHREAD_MUTEX_BOTH is not set +# CONFIG_PTHREAD_CLEANUP is not set +# CONFIG_CANCELLATION_POINTS is not set + +# +# Performance Monitoring +# +CONFIG_SCHED_SUSPENDSCHEDULER=y +CONFIG_SCHED_RESUMESCHEDULER=y +# CONFIG_SCHED_IRQMONITOR is not set +# CONFIG_SCHED_CRITMONITOR is not set +# CONFIG_SCHED_CPULOAD is not set +CONFIG_SCHED_INSTRUMENTATION=y +# CONFIG_SCHED_INSTRUMENTATION_PREEMPTION is not set +# CONFIG_SCHED_INSTRUMENTATION_CSECTION is not set +# CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS is not set +# CONFIG_SCHED_INSTRUMENTATION_BUFFER is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +CONFIG_FDCLONE_STDIO=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=54 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=0 +CONFIG_SEM_NNESTPRIO=8 + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +CONFIG_SCHED_ATEXIT=y +CONFIG_SCHED_ATEXIT_MAX=1 +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Configuration +# +# CONFIG_SIG_EVTHREAD is not set +CONFIG_SIG_DEFAULT=y + +# +# Per-signal Default Actions +# +CONFIG_SIG_SIGUSR1_ACTION=y +CONFIG_SIG_SIGUSR2_ACTION=y +CONFIG_SIG_SIGALRM_ACTION=y +CONFIG_SIG_SIGSTOP_ACTION=y +CONFIG_SIG_SIGKILL_ACTION=y + +# +# Signal Numbers +# + +# +# Standard Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALRM=3 +CONFIG_SIG_STOP=6 +CONFIG_SIG_STP=7 +CONFIG_SIG_CONT=8 +CONFIG_SIG_KILL=9 +CONFIG_SIG_INT=10 + +# +# Non-standard Signal Numbers +# +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=4 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +# CONFIG_WQUEUE_NOTIFIER is not set +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPNTHREADS=1 +CONFIG_SCHED_HPWORKPRIORITY=249 +CONFIG_SCHED_HPWORKSTACKSIZE=1800 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPNTHREADS=1 +CONFIG_SCHED_LPWORKPRIORITY=50 +CONFIG_SCHED_LPWORKPRIOMAX=176 +CONFIG_SCHED_LPWORKSTACKSIZE=1800 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=750 +CONFIG_USERMAIN_STACKSIZE=2500 +CONFIG_PTHREAD_STACK_MIN=512 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +CONFIG_I2C=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_I2C_POLLED is not set +CONFIG_I2C_RESET=y +# CONFIG_I2C_TRACE is not set +# CONFIG_I2C_DRIVER is not set + +# +# I2C Multiplexer Support +# +# CONFIG_I2CMULTIPLEXER_PCA9540BDP is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y +# CONFIG_ARCH_HAVE_SPI_BITORDER is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CS_CONTROL is not set +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_SPI_TRIGGER is not set +# CONFIG_SPI_DRIVER is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +CONFIG_RTC=y +# CONFIG_RTC_DATETIME is not set +# CONFIG_RTC_HIRES is not set +# CONFIG_RTC_ALARM is not set +# CONFIG_RTC_DRIVER is not set +# CONFIG_RTC_EXTERNAL is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" +# CONFIG_WATCHDOG_AUTOMONITOR is not set +# CONFIG_TIMERS_CS2100CP is not set +# CONFIG_ANALOG is not set +# CONFIG_DRIVERS_AUDIO is not set +# CONFIG_FB_CMAP is not set +# CONFIG_FB_TRANSPARENCY is not set +# CONFIG_DRIVERS_VIDEO is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set + +# +# Character/Segment LCD Devices +# +# CONFIG_SLCD is not set + +# +# Other LCD-related Devices +# +# CONFIG_LCD_OTHER is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_LEDS_APA102 is not set +# CONFIG_LEDS_MAX7219 is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +CONFIG_ARCH_HAVE_SDIO=y +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_ARCH_HAVE_SDIO_PREFLIGHT is not set +# CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +CONFIG_MMCSD_MMCSUPPORT=y +CONFIG_MMCSD_HAVE_CARDDETECT=y +# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set +# CONFIG_MMCSD_SPI is not set +CONFIG_SDIO_DMA=y +CONFIG_MMCSD_SDIO=y +# CONFIG_SDIO_MUXBUS is not set +# CONFIG_SDIO_WIDTH_D1_ONLY is not set +CONFIG_SDIO_BLOCKSETUP=y +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=70 +CONFIG_DEV_FIFO_SIZE=0 +# CONFIG_PM is not set +# CONFIG_DRIVERS_POWERLED is not set +# CONFIG_DRIVERS_SMPS is not set +# CONFIG_DRIVERS_MOTOR is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +CONFIG_SERIAL_DMA=y +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_SERIAL_TERMIOS=y +# CONFIG_TTY_SIGINT is not set +# CONFIG_TTY_SIGSTP is not set +# CONFIG_LPUART1_SERIAL_CONSOLE is not set +# CONFIG_LPUART2_SERIAL_CONSOLE is not set +CONFIG_LPUART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_LPUART_SERIALDRIVER is not set +# CONFIG_LPUART0_SERIALDRIVER is not set +CONFIG_LPUART1_SERIALDRIVER=y +CONFIG_LPUART2_SERIALDRIVER=y +CONFIG_LPUART3_SERIALDRIVER=y +# CONFIG_LPUART4_SERIALDRIVER is not set +# CONFIG_LPUART5_SERIALDRIVER is not set +# CONFIG_LPUART6_SERIALDRIVER is not set +# CONFIG_LPUART7_SERIALDRIVER is not set +# CONFIG_LPUART8_SERIALDRIVER is not set + +# +# LPUART1 Configuration +# +CONFIG_LPUART1_RXBUFSIZE=256 +CONFIG_LPUART1_TXBUFSIZE=256 +CONFIG_LPUART1_BAUD=115200 +CONFIG_LPUART1_BITS=8 +CONFIG_LPUART1_PARITY=0 +CONFIG_LPUART1_2STOP=0 +# CONFIG_LPUART1_IFLOWCONTROL is not set +# CONFIG_LPUART1_OFLOWCONTROL is not set +# CONFIG_LPUART1_DMA is not set + +# +# LPUART2 Configuration +# +CONFIG_LPUART2_RXBUFSIZE=600 +CONFIG_LPUART2_TXBUFSIZE=1500 +CONFIG_LPUART2_BAUD=115200 +CONFIG_LPUART2_BITS=8 +CONFIG_LPUART2_PARITY=0 +CONFIG_LPUART2_2STOP=0 +# CONFIG_LPUART2_IFLOWCONTROL is not set +# CONFIG_LPUART2_OFLOWCONTROL is not set +CONFIG_LPUART2_DMA=y + +# +# LPUART3 Configuration +# +CONFIG_LPUART3_RXBUFSIZE=600 +CONFIG_LPUART3_TXBUFSIZE=3000 +CONFIG_LPUART3_BAUD=57600 +CONFIG_LPUART3_BITS=8 +CONFIG_LPUART3_PARITY=0 +CONFIG_LPUART3_2STOP=0 +# CONFIG_LPUART3_IFLOWCONTROL is not set +# CONFIG_LPUART3_OFLOWCONTROL is not set +# CONFIG_LPUART3_DMA is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_USART9_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_PSEUDOTERM is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +# CONFIG_USBDEV_SELFPOWERED is not set +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +# CONFIG_CDCACM_IFLOWCONTROL is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_RXBUFSIZE=600 +CONFIG_CDCACM_TXBUFSIZE=12000 +CONFIG_CDCACM_VENDORID=0x1FC9 +CONFIG_CDCACM_PRODUCTID=0x001d +CONFIG_CDCACM_VENDORSTR="NXP SEMICONDUCTORS" +CONFIG_CDCACM_PRODUCTSTR="PX4 FMURT1062 v1.x" +# CONFIG_USBMSC is not set +# CONFIG_RNDIS is not set +# CONFIG_DFU is not set +# CONFIG_NET_CDCECM is not set +# CONFIG_USBHOST is not set +# CONFIG_USBMISC is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set +# CONFIG_DRIVERS_CONTACTLESS is not set +# CONFIG_1WIRE is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +CONFIG_SYSLOG_WRITE=y +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_BUFFER is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_PREFIX is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET_WRITE_BUFFERS is not set +# CONFIG_NET_READAHEAD is not set +# CONFIG_NET_MCASTGROUP is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_PSEUDOFS_SOFTLINKS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_AIO is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set + +# +# Partition Table +# +# CONFIG_PTABLE_PARTITION is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +CONFIG_FAT_LFN_ALIAS_HASH=y +CONFIG_FAT_LFN_ALIAS_TRAILCHARS=0 +CONFIG_FS_FATTIME=y +# CONFIG_FAT_FORCE_INDIRECT is not set +CONFIG_FAT_DMAMEMORY=y +CONFIG_FAT_DIRECT_RETRY=y +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +CONFIG_FS_CROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +CONFIG_FS_BINFS=y +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +CONFIG_FS_PROCFS_EXCLUDE_ENVIRON=y +CONFIG_FS_PROCFS_EXCLUDE_BLOCKS=y +CONFIG_FS_PROCFS_EXCLUDE_MOUNT=y +CONFIG_FS_PROCFS_EXCLUDE_USAGE=y +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +CONFIG_FS_PROCFS_EXCLUDE_VERSION=y +# CONFIG_FS_PROCFS_EXCLUDE_MEMINFO is not set +CONFIG_FS_PROCFS_EXCLUDE_MOUNTS=y +# CONFIG_FS_SPIFFS is not set +# CONFIG_FS_LITTLEFS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set +# CONFIG_NXFONTS is not set + +# +# Font Cache Pixel Depths +# +CONFIG_NXFONTS_DISABLE_1BPP=y +CONFIG_NXFONTS_DISABLE_2BPP=y +CONFIG_NXFONTS_DISABLE_4BPP=y +CONFIG_NXFONTS_DISABLE_8BPP=y +CONFIG_NXFONTS_DISABLE_16BPP=y +CONFIG_NXFONTS_DISABLE_24BPP=y +CONFIG_NXFONTS_DISABLE_32BPP=y +CONFIG_NXFONTS_PACKEDMSFIRST=y +# CONFIG_NXGLIB is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +CONFIG_GRAN=y +CONFIG_GRAN_INTR=y +# CONFIG_MM_FILL_ALLOCATIONS is not set + +# +# Common I/O Buffer Support +# +# CONFIG_MM_IOB is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_LOADABLE is not set +# CONFIG_PIC is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# + +# +# Standard C I/O +# +# CONFIG_STDIO_DISABLE_BUFFERING is not set +CONFIG_STDIO_BUFFER_SIZE=32 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_SCANSET is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y + +# +# Architecture-Specific Support +# +CONFIG_ARCH_LOWPUTC=y +# CONFIG_ARCH_ROMGETC is not set +CONFIG_LIBC_ARCH_MEMCPY=y +# CONFIG_LIBC_ARCH_MEMCMP is not set +# CONFIG_LIBC_ARCH_MEMMOVE is not set +# CONFIG_LIBC_ARCH_MEMSET is not set +# CONFIG_LIBC_ARCH_STRCHR is not set +# CONFIG_LIBC_ARCH_STRCMP is not set +# CONFIG_LIBC_ARCH_STRCPY is not set +# CONFIG_LIBC_ARCH_STRNCPY is not set +# CONFIG_LIBC_ARCH_STRLEN is not set +# CONFIG_LIBC_ARCH_STRNLEN is not set +# CONFIG_LIBC_ARCH_ELF is not set +CONFIG_ARMV7M_MEMCPY=y + +# +# stdlib Options +# +CONFIG_LIB_RAND_ORDER=1 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 + +# +# Program Execution Options +# +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIB_HOSTNAME="" + +# +# errno Decode Support +# +CONFIG_LIBC_STRERROR=y +# CONFIG_LIBC_STRERROR_SHORT is not set +# CONFIG_LIBC_PERROR_STDOUT is not set + +# +# memcpy/memset Options +# +CONFIG_MEMSET_OPTSPEED=y +CONFIG_MEMSET_64BIT=y +# CONFIG_LIBC_DLLFCN is not set +# CONFIG_LIBC_MODLIB is not set +# CONFIG_LIBC_WCHAR is not set +# CONFIG_LIBC_LOCALE is not set +CONFIG_LIBC_LZF=y +CONFIG_LIBC_LZF_SMALL=y +# CONFIG_LIBC_LZF_FAST is not set +# CONFIG_LIBC_LZF_FASTEST is not set +CONFIG_LIBC_LZF_HLOG=13 +CONFIG_LIBC_LZF_ALIGN=y + +# +# Time/Time Zone Support +# +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_TIME_EXTENDED=y +CONFIG_ARCH_HAVE_TLS=y + +# +# Thread Local Storage (TLS) +# +# CONFIG_TLS is not set + +# +# Network-Related Options +# +# CONFIG_LIBC_IPv4_ADDRCONV is not set +# CONFIG_LIBC_IPv6_ADDRCONV is not set +# CONFIG_LIBC_NETDB is not set + +# +# NETDB Support +# +# CONFIG_LIBC_GAISTRERROR is not set +# CONFIG_NETDB_HOSTFILE is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_ENVPATH is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +# CONFIG_CXX_NEWLONG is not set + +# +# LLVM C++ Library (libcxx) +# +# CONFIG_LIBCXX is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set +# CONFIG_LIBDSP is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_ADXL372_TEST is not set +# CONFIG_EXAMPLES_APA102 is not set +# CONFIG_EXAMPLES_BATTERY is not set +# CONFIG_EXAMPLES_CALIB_UDELAY is not set +# CONFIG_EXAMPLES_CCTYPE is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CROMFS is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DHTXX is not set +# CONFIG_EXAMPLES_DSPTEST is not set +# CONFIG_EXAMPLES_FLOWC is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_GPS is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_INA219 is not set +# CONFIG_EXAMPLES_INA226 is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_LSM330SPI_TEST is not set +# CONFIG_EXAMPLES_LVGLDEMO is not set +# CONFIG_EXAMPLES_MAX31855 is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MLX90614 is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXDEMO is not set +# CONFIG_EXAMPLES_OBD2 is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PDCURSES is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_POWERLED is not set +# CONFIG_EXAMPLES_POWERMONITOR is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMPS is not set +# CONFIG_EXAMPLES_STAT is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USERFS is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_XBC_TEST is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_MKFATFS=y +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_GRAPHICS_FT80X is not set +# CONFIG_GRAPHICS_LVGL is not set + +# +# NxWidgets/NxWM +# + +# +# NxWidgets +# + +# +# NxWM +# + +# +# Unit Tests +# +# CONFIG_GRAPHICS_PDCURSES is not set +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_THTTPD is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_PROMPT_STRING="nsh> " +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=128 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_QUOTE=y +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=12 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=8 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +# CONFIG_NSH_DISABLE_DATE is not set +CONFIG_NSH_DISABLE_DD=y +# CONFIG_NSH_DISABLE_DF is not set +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_ENV is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_EXPORT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +CONFIG_NSH_DISABLE_HEXDUMP=y +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +CONFIG_NSH_DISABLE_MB=y +# CONFIG_NSH_DISABLE_MKDIR is not set +CONFIG_NSH_DISABLE_MKFIFO=y +CONFIG_NSH_DISABLE_MKRD=y +CONFIG_NSH_DISABLE_MH=y +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +CONFIG_NSH_DISABLE_PRINTF=y +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PSSTACKUSAGE=y +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_REBOOT=y +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +CONFIG_NSH_DISABLE_SHUTDOWN=y +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_TELNETD=y +CONFIG_NSH_DISABLE_TRUNCATE=y +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +CONFIG_NSH_DISABLE_XD=y +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 + +# +# Configure Command Options +# +CONFIG_NSH_VARS=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +CONFIG_NSH_CROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=0 +CONFIG_NSH_ROMFSSECTSIZE=128 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=1 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set +CONFIG_HAVE_CXXINITIALIZE=y + +# +# System Libraries and NSH Add-Ons +# +CONFIG_SYSTEM_CDCACM=y +CONFIG_SYSTEM_CDCACM_DEVMINOR=0 +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_EMBEDLOG is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_LZF is not set +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NSH_PRIORITY=100 +CONFIG_SYSTEM_NSH_STACKSIZE=2048 +# CONFIG_SYSTEM_NSH_CXXINITIALIZE is not set +# CONFIG_SYSTEM_POPEN is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SETLOGMASK is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_SYSTEM is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_TERMCURSES is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set + +# +# Testing +# +# CONFIG_TESTINGCXXTEST is not set +# CONFIG_TESTING_FSTEST is not set +# CONFIG_TESTING_NXFFS is not set +# CONFIG_TESTING_OSTEST is not set +# CONFIG_TESTING_SMART is not set +# CONFIG_TESTING_SMART_TEST is not set +# CONFIG_TESTING_UNITY is not set + +# +# Wireless Libraries and NSH Add-Ons +# + +# +# Bluetooth applications +# +# CONFIG_BTSAK is not set + +# +# IEEE 802.15.4 applications +# +# CONFIG_IEEE802154_LIBMAC is not set +# CONFIG_IEEE802154_LIBUTILS is not set +# CONFIG_IEEE802154_I8SAK is not set From 48fd8e2d609f41bd2960f916512abacfa05b174a Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Tue, 30 Apr 2019 13:16:13 -0700 Subject: [PATCH 06/12] Track board_reset changes in upstream --- src/drivers/boards/common/CMakeLists.txt | 1 + src/drivers/boards/common/board_reset.c | 77 ++++++++++++++++++++++++ 2 files changed, 78 insertions(+) create mode 100644 src/drivers/boards/common/board_reset.c diff --git a/src/drivers/boards/common/CMakeLists.txt b/src/drivers/boards/common/CMakeLists.txt index b0d9f0941169..47f92818a175 100644 --- a/src/drivers/boards/common/CMakeLists.txt +++ b/src/drivers/boards/common/CMakeLists.txt @@ -39,6 +39,7 @@ if ((${PX4_PLATFORM} MATCHES "nuttx") AND NOT ${PX4_BOARD} MATCHES "io") board_dma_alloc.c board_fat_dma_alloc.c board_gpio_init.c + board_reset.c ) if (${CONFIG_ARCH_CHIP} MATCHES "kinetis") diff --git a/src/drivers/boards/common/board_reset.c b/src/drivers/boards/common/board_reset.c new file mode 100644 index 000000000000..1291b159a6e8 --- /dev/null +++ b/src/drivers/boards/common/board_reset.c @@ -0,0 +1,77 @@ +/**************************************************************************** + * + * Copyright (C) 2019 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#ifdef CONFIG_BOARDCTL_RESET + +/**************************************************************************** + * Public functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_reset + * + * Description: + * Reset board. Support for this function is required by board-level + * logic if CONFIG_BOARDCTL_RESET is selected. + * + * Input Parameters: + * status - Status information provided with the reset event. This + * meaning of this status information is board-specific. If not + * used by a board, the value zero may be provided in calls to + * board_reset(). + * + * Returned Value: + * If this function returns, then it was not possible to power-off the + * board due to some constraints. The return value int this case is a + * board-specific reason for the failure to shutdown. + * + ****************************************************************************/ + +int board_reset(int status) +{ + up_systemreset(); + return 0; +} + +#endif /* CONFIG_BOARDCTL_RESET */ From a7a473eeef6c6d8984b722407304f397ca7842b5 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Tue, 30 Apr 2019 13:19:20 -0700 Subject: [PATCH 07/12] io-v2:Freshen config --- boards/px4/io-v2/nuttx-config/nsh/defconfig | 1446 ++++++++++++++++++- 1 file changed, 1394 insertions(+), 52 deletions(-) diff --git a/boards/px4/io-v2/nuttx-config/nsh/defconfig b/boards/px4/io-v2/nuttx-config/nsh/defconfig index bb71ca56ff28..9ca14831f844 100644 --- a/boards/px4/io-v2/nuttx-config/nsh/defconfig +++ b/boards/px4/io-v2/nuttx-config/nsh/defconfig @@ -1,4 +1,5 @@ # +<<<<<<< HEAD # This file is autogenerated: PLEASE DO NOT EDIT IT. # # You can use "make menuconfig" to make any modifications to the installed .config file. @@ -6,73 +7,1414 @@ # modifications. # # CONFIG_DEV_NULL is not set +======= +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_MACOS is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +# CONFIG_BUILD_LOADABLE is not set +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set +# CONFIG_DFU_BINARY is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_MISOC is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_RISCV is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_XTENSA is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +# CONFIG_ARCH_OR1K is not set +>>>>>>> io-v2:Freshen config CONFIG_ARCH="arm" -CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" -CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_AM335X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_IMXRT is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LC823450 is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_LPC54XX is not set +# CONFIG_ARCH_CHIP_MAX326XX is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_CHIP_NRF52 is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD2X is not set +# CONFIG_ARCH_CHIP_SAML2X is not set +# CONFIG_ARCH_CHIP_SAMD5X is not set +# CONFIG_ARCH_CHIP_SAME5X is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F0 is not set +# CONFIG_ARCH_CHIP_STM32L0 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32H7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_XMC4 is not set +# CONFIG_ARCH_CHIP_CXD56XX is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM1136J is not set +# CONFIG_ARCH_ARM1156T2 is not set +# CONFIG_ARCH_ARM1176JZ is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM23 is not set +CONFIG_ARCH_ARMV7M=y +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM33 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_ARMV7A is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA7 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_ARMV7R is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEXR7 is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +CONFIG_ARCH_HAVE_HARDFAULT_DEBUG=y +# CONFIG_DEBUG_HARDFAULT_ALERT is not set +CONFIG_ARCH_HAVE_MEMFAULT_DEBUG=y +# CONFIG_ARM_SEMIHOSTING_SYSLOG is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARMV7M_USEBASEPRI=y +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_TOOLCHAIN_CLANGL is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L152CC is not set +# CONFIG_ARCH_CHIP_STM32L152RC is not set +# CONFIG_ARCH_CHIP_STM32L152VC is not set +# CONFIG_ARCH_CHIP_STM32L151RE is not set +# CONFIG_ARCH_CHIP_STM32L152RE is not set +# CONFIG_ARCH_CHIP_STM32L151VE is not set +# CONFIG_ARCH_CHIP_STM32L152VE is not set +# CONFIG_ARCH_CHIP_STM32L151QE is not set +# CONFIG_ARCH_CHIP_STM32L152QE is not set +# CONFIG_ARCH_CHIP_STM32L151ZE is not set +# CONFIG_ARCH_CHIP_STM32L152ZE is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set CONFIG_ARCH_CHIP_STM32F100C8=y -CONFIG_ARCH_MATH_H=y +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207VC is not set +# CONFIG_ARCH_CHIP_STM32F207VE is not set +# CONFIG_ARCH_CHIP_STM32F207VF is not set +# CONFIG_ARCH_CHIP_STM32F207VG is not set +# CONFIG_ARCH_CHIP_STM32F207IC is not set +# CONFIG_ARCH_CHIP_STM32F207IE is not set +# CONFIG_ARCH_CHIP_STM32F207IF is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZC is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F207ZF is not set +# CONFIG_ARCH_CHIP_STM32F207ZG is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302C6 is not set +# CONFIG_ARCH_CHIP_STM32F302C8 is not set +# CONFIG_ARCH_CHIP_STM32F302R6 is not set +# CONFIG_ARCH_CHIP_STM32F302R8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F303VD is not set +# CONFIG_ARCH_CHIP_STM32F303VE is not set +# CONFIG_ARCH_CHIP_STM32F303ZD is not set +# CONFIG_ARCH_CHIP_STM32F303ZE is not set +# CONFIG_ARCH_CHIP_STM32F334K4 is not set +# CONFIG_ARCH_CHIP_STM32F334K6 is not set +# CONFIG_ARCH_CHIP_STM32F334K8 is not set +# CONFIG_ARCH_CHIP_STM32F334C4 is not set +# CONFIG_ARCH_CHIP_STM32F334C6 is not set +# CONFIG_ARCH_CHIP_STM32F334C8 is not set +# CONFIG_ARCH_CHIP_STM32F334R4 is not set +# CONFIG_ARCH_CHIP_STM32F334R6 is not set +# CONFIG_ARCH_CHIP_STM32F334R8 is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401CB is not set +# CONFIG_ARCH_CHIP_STM32F401RB is not set +# CONFIG_ARCH_CHIP_STM32F401VB is not set +# CONFIG_ARCH_CHIP_STM32F401CC is not set +# CONFIG_ARCH_CHIP_STM32F401RC is not set +# CONFIG_ARCH_CHIP_STM32F401VC is not set +# CONFIG_ARCH_CHIP_STM32F401CD is not set +# CONFIG_ARCH_CHIP_STM32F401RD is not set +# CONFIG_ARCH_CHIP_STM32F401VD is not set +# CONFIG_ARCH_CHIP_STM32F401CE is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F401VE is not set +# CONFIG_ARCH_CHIP_STM32F410RB is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_Z is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +CONFIG_STM32_VALUELINE=y +# CONFIG_STM32_CONNECTIVITYLINE is not set +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F33XX is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F4XXX is not set +# CONFIG_STM32_STM32F401xBC is not set +# CONFIG_STM32_STM32F401xDE is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F410 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_IOCOMPENSATION is not set +# CONFIG_STM32_HAVE_HRTIM1 is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +CONFIG_STM32_HAVE_TIM12=y +CONFIG_STM32_HAVE_TIM13=y +CONFIG_STM32_HAVE_TIM14=y +CONFIG_STM32_HAVE_TIM15=y +CONFIG_STM32_HAVE_TIM16=y +CONFIG_STM32_HAVE_TIM17=y +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +CONFIG_STM32_HAVE_ADC1_DMA=y +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +# CONFIG_STM32_HAVE_SDADC1 is not set +# CONFIG_STM32_HAVE_SDADC2 is not set +# CONFIG_STM32_HAVE_SDADC3 is not set +# CONFIG_STM32_HAVE_SDADC1_DMA is not set +# CONFIG_STM32_HAVE_SDADC2_DMA is not set +# CONFIG_STM32_HAVE_SDADC3_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_COMP1 is not set +# CONFIG_STM32_HAVE_COMP2 is not set +# CONFIG_STM32_HAVE_COMP3 is not set +# CONFIG_STM32_HAVE_COMP4 is not set +# CONFIG_STM32_HAVE_COMP5 is not set +# CONFIG_STM32_HAVE_COMP6 is not set +# CONFIG_STM32_HAVE_COMP7 is not set +CONFIG_STM32_HAVE_DAC1=y +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_I2S3 is not set +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_HAVE_OPAMP1 is not set +# CONFIG_STM32_HAVE_OPAMP2 is not set +# CONFIG_STM32_HAVE_OPAMP3 is not set +# CONFIG_STM32_HAVE_OPAMP4 is not set +CONFIG_STM32_HAVE_IP_DMA_V1=y +# CONFIG_STM32_HAVE_IP_DMA_V2 is not set +CONFIG_STM32_HAVE_IP_TIMERS_V1=y +# CONFIG_STM32_HAVE_IP_TIMERS_V2 is not set +CONFIG_STM32_HAVE_IP_ADC_V1=y +CONFIG_STM32_HAVE_IP_ADC_V1_BASIC=y +# CONFIG_STM32_HAVE_IP_ADC_V2 is not set +# CONFIG_STM32_HAVE_IP_ADC_V2_BASIC is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CEC is not set +# CONFIG_STM32_CRC is not set +CONFIG_STM32_DMA1=y +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_HRTIM is not set +CONFIG_STM32_I2C1=y +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_RTC is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +# CONFIG_STM32_TIM12 is not set +# CONFIG_STM32_TIM13 is not set +# CONFIG_STM32_TIM14 is not set +# CONFIG_STM32_TIM15 is not set +# CONFIG_STM32_TIM16 is not set +# CONFIG_STM32_TIM17 is not set +CONFIG_STM32_USART1=y +CONFIG_STM32_USART2=y +CONFIG_STM32_USART3=y +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_I2C=y +# CONFIG_STM32_TIM is not set +# CONFIG_STM32_PWM is not set +# CONFIG_STM32_OPAMP is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_I2C1_REMAP is not set +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_USART2_REMAP is not set +CONFIG_STM32_USART3_NO_REMAP=y +# CONFIG_STM32_USART3_FULL_REMAP is not set +# CONFIG_STM32_USART3_PARTIAL_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +# CONFIG_STM32_JTAG_FULL_ENABLE is not set +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_DMACAPABLE is not set + +# +# ADC Configuration +# +# CONFIG_STM32_ADC_NO_STARTUP_CONV is not set +# CONFIG_STM32_ADC_NOIRQ is not set +# CONFIG_STM32_ADC_LL_OPS is not set +# CONFIG_STM32_ADC1_DMA is not set +CONFIG_STM32_ADC1_INJECTED_CHAN=0 +CONFIG_STM32_USART=y +CONFIG_STM32_USART_RXDMA=y +CONFIG_STM32_SERIALDRIVER=y +# CONFIG_STM32_1WIREDRIVER is not set +# CONFIG_STM32_HCIUART is not set +# CONFIG_STM32_HCIUART_RXDMA is not set + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set +# CONFIG_USART1_RS485 is not set +CONFIG_USART1_RXDMA=y +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set +# CONFIG_USART2_RS485 is not set +# CONFIG_USART2_RXDMA is not set +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set +# CONFIG_USART3_RS485 is not set +CONFIG_USART3_RXDMA=y + +# +# Serial Driver Configuration +# +CONFIG_STM32_SERIAL_RXDMA_BUFFER_SIZE=32 +# CONFIG_STM32_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +CONFIG_STM32_USART_SINGLEWIRE=y + +# +# HCI UART Driver Configuration +# +# CONFIG_STM32_HCIUART_SW_RXFLOW is not set + +# +# I2C Configuration +# +# CONFIG_STM32_I2C_ALT is not set +# CONFIG_STM32_I2C_DYNTIMEO is not set +CONFIG_STM32_I2CTIMEOSEC=0 +CONFIG_STM32_I2CTIMEOMS=1 +CONFIG_STM32_I2CTIMEOTICKS=1 +# CONFIG_STM32_I2C_DUTY16_9 is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB Device Configuration +# +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y +# CONFIG_ARCH_GNU_NO_WEAKFUNCTIONS is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_HAVE_IRQTRIGGER=y +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_ICACHE is not set +# CONFIG_ARCH_DCACHE is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_HAVE_LAZYFPU=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_PROGMEM=y +CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_HAVE_TESTSET=y +CONFIG_ARCH_HAVE_FETCHADD=y +# CONFIG_ARCH_HAVE_RTC_SUBSECONDS is not set +# CONFIG_ARCH_HAVE_GARBAGE is not set +# CONFIG_ARCH_GLOBAL_IRQDISABLE is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set CONFIG_ARCH_STACKDUMP=y -CONFIG_ARMV7M_MEMCPY=y -CONFIG_ARMV7M_USEBASEPRI=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set +# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set + +# +# Board Settings +# CONFIG_BOARD_LOOPSPERMSEC=2000 -CONFIG_C99_BOOL8=y -CONFIG_DEBUG_FULLOPT=y -CONFIG_DEBUG_SYMBOLS=y -CONFIG_DEFAULT_SMALL=y -CONFIG_DISABLE_MOUNTPOINT=y -CONFIG_DISABLE_MQUEUE=y -CONFIG_DISABLE_POLL=y + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=8192 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_CUSTOM=y + +# +# Custom Board Configuration +# +CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" +CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" +CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y +# CONFIG_BOARD_CUSTOM_LEDS is not set +# CONFIG_BOARD_CUSTOM_BUTTONS is not set + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_FINALINIT is not set +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +# CONFIG_BOARDCTL_TESTSET is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y CONFIG_DISABLE_PTHREAD=y -CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=1000 +# CONFIG_SYSTEMTICK_HOOK is not set +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +CONFIG_ARCH_HAVE_TIMEKEEPING=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2018 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=6 +CONFIG_WDOG_INTRESERVE=2 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_IRQCHAIN is not set +# CONFIG_IRQCOUNT is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="user_start" +CONFIG_USERMAIN_PRIORITY=100 +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=4 +CONFIG_MAX_TASKS=2 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +CONFIG_NPTHREAD_KEYS=0 + +# +# Performance Monitoring +# +# CONFIG_SCHED_SUSPENDSCHEDULER is not set +# CONFIG_SCHED_RESUMESCHEDULER is not set +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y CONFIG_FDCLONE_DISABLE=y CONFIG_FDCLONE_STDIO=y -CONFIG_HAVE_CXX=y -CONFIG_HAVE_CXXINITIALIZE=y -CONFIG_LIB_BOARDCTL=y -CONFIG_MAX_TASKS=2 -CONFIG_MAX_WDOGPARMS=2 -CONFIG_MM_FILL_ALLOCATIONS=y -CONFIG_MM_SMALL=y -CONFIG_NAME_MAX=12 +CONFIG_SDCLONE_DISABLE=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=0 -CONFIG_PREALLOC_TIMERS=0 -CONFIG_PREALLOC_WDOGS=6 -CONFIG_PTHREAD_STACK_DEFAULT=1024 +CONFIG_NAME_MAX=12 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_EARLY_INITIALIZE is not set +# CONFIG_BOARD_LATE_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Configuration +# +# CONFIG_SIG_DEFAULT is not set + +# +# Signal Numbers +# + +# +# Standard Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALRM=3 + +# +# Non-standard Signal Numbers +# +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=1300 CONFIG_PTHREAD_STACK_MIN=512 -CONFIG_RAM_SIZE=8192 -CONFIG_RAM_START=0x20000000 -CONFIG_RAW_BINARY=y -CONFIG_SDCLONE_DISABLE=y +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set +CONFIG_ARCH_HAVE_SPI_BITORDER=y +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_DRIVERS_AUDIO is not set +# CONFIG_FB_CMAP is not set +# CONFIG_FB_TRANSPARENCY is not set +# CONFIG_DRIVERS_VIDEO is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set + +# +# Character/Segment LCD Devices +# +# CONFIG_SLCD is not set + +# +# Other LCD-related Devices +# +# CONFIG_LCD_OTHER is not set + +# +# LED Support +# +# CONFIG_LEDS_APA102 is not set +# CONFIG_LEDS_MAX7219 is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_ARCH_HAVE_SDIO_PREFLIGHT is not set +# CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_DRIVERS_POWERLED is not set +# CONFIG_DRIVERS_SMPS is not set +# CONFIG_DRIVERS_MOTOR is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_TXDMA is not set +# CONFIG_SERIAL_RXDMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y CONFIG_SERIAL_TERMIOS=y -CONFIG_STACK_COLORATION=y -CONFIG_START_DAY=30 -CONFIG_START_MONTH=11 -CONFIG_STDIO_DISABLE_BUFFERING=y -CONFIG_STM32_ADC1=y -CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y -CONFIG_STM32_DMA1=y -CONFIG_STM32_I2C1=y -CONFIG_STM32_I2CTIMEOMS=1 -CONFIG_STM32_I2CTIMEOTICKS=1 -CONFIG_STM32_JTAG_SW_ENABLE=y -CONFIG_STM32_USART1=y -CONFIG_STM32_USART2=y -CONFIG_STM32_USART3=y -CONFIG_STM32_USART_SINGLEWIRE=y -CONFIG_TASK_NAME_SIZE=4 -CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1024 -CONFIG_USART1_RXBUFSIZE=64 -CONFIG_USART1_RXDMA=y +# CONFIG_TTY_SIGINT is not set +# CONFIG_TTY_SIGSTP is not set CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART2_SERIAL_CONSOLE is not set +# CONFIG_USART3_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_LPUART_SERIALDRIVER is not set +# CONFIG_LPUART0_SERIALDRIVER is not set +# CONFIG_LPUART1_SERIALDRIVER is not set +# CONFIG_LPUART2_SERIALDRIVER is not set +# CONFIG_LPUART3_SERIALDRIVER is not set +# CONFIG_LPUART4_SERIALDRIVER is not set +# CONFIG_LPUART5_SERIALDRIVER is not set +# CONFIG_LPUART6_SERIALDRIVER is not set +# CONFIG_LPUART7_SERIALDRIVER is not set +# CONFIG_LPUART8_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_USART9_SERIALDRIVER is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=64 CONFIG_USART1_TXBUFSIZE=40 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set + +# +# USART2 Configuration +# CONFIG_USART2_RXBUFSIZE=64 CONFIG_USART2_TXBUFSIZE=64 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set + +# +# USART3 Configuration +# CONFIG_USART3_RXBUFSIZE=64 -CONFIG_USART3_RXDMA=y CONFIG_USART3_TXBUFSIZE=64 -CONFIG_USEC_PER_TICK=1000 -CONFIG_USERMAIN_STACKSIZE=1300 -CONFIG_USER_ENTRYPOINT="user_start" -CONFIG_WDOG_INTRESERVE=2 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_USBMISC is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set +# CONFIG_DRIVERS_CONTACTLESS is not set +# CONFIG_1WIRE is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +CONFIG_SYSLOG_WRITE=y +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_BUFFER is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_PREFIX is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET_WRITE_BUFFERS is not set +# CONFIG_NET_READAHEAD is not set +# CONFIG_NET_MCASTGROUP is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set +# CONFIG_NXFONTS is not set + +# +# Font Cache Pixel Depths +# +# CONFIG_NXFONTS_DISABLE_1BPP is not set +# CONFIG_NXFONTS_DISABLE_2BPP is not set +# CONFIG_NXFONTS_DISABLE_4BPP is not set +# CONFIG_NXFONTS_DISABLE_8BPP is not set +# CONFIG_NXFONTS_DISABLE_16BPP is not set +# CONFIG_NXFONTS_DISABLE_24BPP is not set +# CONFIG_NXFONTS_DISABLE_32BPP is not set +CONFIG_NXFONTS_PACKEDMSFIRST=y +# CONFIG_NXGLIB is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +CONFIG_MM_FILL_ALLOCATIONS=y + +# +# Common I/O Buffer Support +# +# CONFIG_MM_IOB is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_LOADABLE is not set +# CONFIG_PIC is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# + +# +# Standard C I/O +# +CONFIG_STDIO_DISABLE_BUFFERING=y +CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBC_PRINT_LEGACY is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_SCANSET is not set +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y + +# +# Architecture-Specific Support +# +CONFIG_ARCH_LOWPUTC=y +# CONFIG_ARCH_ROMGETC is not set +CONFIG_LIBC_ARCH_MEMCPY=y +# CONFIG_LIBC_ARCH_MEMCMP is not set +# CONFIG_LIBC_ARCH_MEMMOVE is not set +# CONFIG_LIBC_ARCH_MEMSET is not set +# CONFIG_LIBC_ARCH_STRCHR is not set +# CONFIG_LIBC_ARCH_STRCMP is not set +# CONFIG_LIBC_ARCH_STRCPY is not set +# CONFIG_LIBC_ARCH_STRNCPY is not set +# CONFIG_LIBC_ARCH_STRLEN is not set +# CONFIG_LIBC_ARCH_STRNLEN is not set +# CONFIG_LIBC_ARCH_ELF is not set +CONFIG_ARMV7M_MEMCPY=y + +# +# stdlib Options +# +CONFIG_LIB_RAND_ORDER=1 + +# +# Program Execution Options +# +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1024 +CONFIG_LIB_HOSTNAME="" + +# +# errno Decode Support +# +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set + +# +# memcpy/memset Options +# +# CONFIG_MEMSET_OPTSPEED is not set +# CONFIG_LIBC_DLFCN is not set +# CONFIG_LIBC_MODLIB is not set +# CONFIG_LIBC_WCHAR is not set +# CONFIG_LIBC_LOCALE is not set +# CONFIG_LIBC_LZF is not set + +# +# Time/Time Zone Support +# +# CONFIG_TIME_EXTENDED is not set +CONFIG_ARCH_HAVE_TLS=y + +# +# Thread Local Storage (TLS) +# +# CONFIG_TLS is not set + +# +# Network-Related Options +# +# CONFIG_LIBC_IPv4_ADDRCONV is not set +# CONFIG_LIBC_IPv6_ADDRCONV is not set +# CONFIG_LIBC_NETDB is not set + +# +# NETDB Support +# +# CONFIG_LIBC_GAISTRERROR is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +CONFIG_C99_BOOL8=y +CONFIG_HAVE_CXX=y +# CONFIG_CXX_NEWLONG is not set + +# +# LLVM C++ Library (libcxx) +# +# CONFIG_LIBCXX is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set +# CONFIG_LIBDSP is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_ADXL372_TEST is not set +# CONFIG_EXAMPLES_APA102 is not set +# CONFIG_EXAMPLES_BATTERY is not set +# CONFIG_EXAMPLES_CALIB_UDELAY is not set +# CONFIG_EXAMPLES_CCTYPE is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DHTXX is not set +# CONFIG_EXAMPLES_DSPTEST is not set + +# +# embedlog example needs SYSTEM_EMBEDLOG +# +# CONFIG_EXAMPLES_FLOWC is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_GPS is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_INA219 is not set +# CONFIG_EXAMPLES_INA226 is not set + +# +# ini dumper example needs FSUTILS_INIH +# +# CONFIG_EXAMPLES_LSM330SPI_TEST is not set +# CONFIG_EXAMPLES_LVGLDEMO is not set +# CONFIG_EXAMPLES_MAX31855 is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MLX90614 is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MODBUSMASTER is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXDEMO is not set +# CONFIG_EXAMPLES_OBD2 is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PDCURSES is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_POWERLED is not set +# CONFIG_EXAMPLES_POWERMONITOR is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMPS is not set +# CONFIG_EXAMPLES_STAT is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USERFS is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_XBC_TEST is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_INIH is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_GRAPHICS_FT80X is not set +# CONFIG_GRAPHICS_LVGL is not set +# CONFIG_NXGLPYHS_LARGE_ICONS is not set + +# +# NxWidgets +# + +# +# NxWM +# +# CONFIG_GRAPHICS_PDCURSES is not set +# CONFIG_TIFF is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CJSON is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set +CONFIG_HAVE_CXXINITIALIZE=y + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_EMBEDLOG is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_NSH is not set + +# +# psmq requires posix mqueue and SYSTEM_EMBEDLOG +# +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SETLOGMASK is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_TERMCURSES is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set + +# +# Testing +# +# CONFIG_TESTINGCXXTEST is not set +# CONFIG_TESTING_NXFFS is not set +# CONFIG_TESTING_OSTEST is not set +# CONFIG_TESTING_SCANFTEST is not set +# CONFIG_TESTING_SMART is not set +# CONFIG_TESTING_UNITY is not set + +# +# Wireless Libraries and NSH Add-Ons +# + +# +# Bluetooth applications +# +# CONFIG_BTSAK is not set + +# +# IEEE 802.15.4 applications +# +# CONFIG_IEEE802154_LIBMAC is not set +# CONFIG_IEEE802154_LIBUTILS is not set +# CONFIG_IEEE802154_I8SAK is not set From b4b193f7737b7ec3603805ad3a7311a068fe76d0 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Tue, 30 Apr 2019 13:19:44 -0700 Subject: [PATCH 08/12] fmurt1062-v1:Freshen config --- .../fmurt1062-v1/nuttx-config/nsh/defconfig | 86 ++++++++++++------- 1 file changed, 56 insertions(+), 30 deletions(-) diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig index 3725dfd34e4a..a613928bcd6c 100644 --- a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig +++ b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig @@ -116,6 +116,7 @@ CONFIG_ARCH_CHIP_IMXRT=y # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_TIVA is not set # CONFIG_ARCH_CHIP_XMC4 is not set +# CONFIG_ARCH_CHIP_CXD56XX is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM920T is not set # CONFIG_ARCH_ARM926EJS is not set @@ -124,26 +125,22 @@ CONFIG_ARCH_CHIP_IMXRT=y # CONFIG_ARCH_ARM1176JZ is not set # CONFIG_ARCH_CORTEXM0 is not set # CONFIG_ARCH_CORTEXM23 is not set +CONFIG_ARCH_ARMV7M=y # CONFIG_ARCH_CORTEXM3 is not set # CONFIG_ARCH_CORTEXM33 is not set # CONFIG_ARCH_CORTEXM4 is not set CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_ARMV7A is not set # CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA7 is not set # CONFIG_ARCH_CORTEXA8 is not set # CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_ARMV7R is not set # CONFIG_ARCH_CORTEXR4 is not set -# CONFIG_ARCH_CORTEXR4F is not set # CONFIG_ARCH_CORTEXR5 is not set -# CONFIG_ARCH_CORTEXR5F is not set # CONFIG_ARCH_CORTEXR7 is not set -# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="imxrt" -CONFIG_ARCH_HAVE_FPU=y -CONFIG_ARCH_HAVE_DPFPU=y -CONFIG_ARCH_HAVE_LAZYFPU=y -CONFIG_ARCH_FPU=y -CONFIG_ARCH_DPFPU=y # CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -180,6 +177,10 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # # i.MX RT Configuration Options # +# CONFIG_ARCH_CHIP_MIMXRT1021CAG4A is not set +# CONFIG_ARCH_CHIP_MIMXRT1021CAF4A is not set +# CONFIG_ARCH_CHIP_MIMXRT1021DAF5A is not set +# CONFIG_ARCH_CHIP_MIMXRT1021DAG5A is not set # CONFIG_ARCH_CHIP_MIMXRT1051DVL6A is not set # CONFIG_ARCH_CHIP_MIMXRT1051CVL5A is not set # CONFIG_ARCH_CHIP_MIMXRT1052DVL6A is not set @@ -188,6 +189,9 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_MIMXRT1061CVL5A is not set CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y # CONFIG_ARCH_CHIP_MIMXRT1062CVL5A is not set +# CONFIG_ARCH_FAMILY_MIMXRT1021D is not set +# CONFIG_ARCH_FAMILY_MIMXRT1021C is not set +# CONFIG_ARCH_FAMILY_IMXRT102x is not set # CONFIG_ARCH_FAMILY_MXRT105xDVL6A is not set # CONFIG_ARCH_FAMILY_MIMXRT1052CVL5A is not set # CONFIG_ARCH_FAMILY_IMXRT105x is not set @@ -195,15 +199,18 @@ CONFIG_ARCH_FAMILY_MXRT106xDVL6A=y # CONFIG_ARCH_FAMILY_MIMXRT1062CVL5A is not set CONFIG_ARCH_FAMILY_IMXRT106x=y CONFIG_IMXRT_HAVE_LPUART=y -#CONFIG_IMXRT_LPI2C=y +# CONFIG_IMXRT_LPI2C is not set CONFIG_IMXRT_LPSPI=y CONFIG_IMXRT_HIGHSPEED_GPIO=y +CONFIG_IMXRT_HAVE_LCD=y +# CONFIG_IMXRT_SEMC_INIT_DONE is not set # # i.MX RT Peripheral Selection # CONFIG_IMXRT_EDMA=y # CONFIG_IMXRT_ENET is not set +# CONFIG_IMXRT_LCD is not set # # FlexIO Peripherals @@ -224,14 +231,8 @@ CONFIG_IMXRT_LPUART3=y # # LPI2C Peripherals # -#CONFIG_IMXRT_LPI2C1=y -CONFIG_LPI2C1_BUSYIDLE=0 -CONFIG_LPI2C1_FILTSCL=0 -CONFIG_LPI2C1_FILTSDA=0 -#CONFIG_IMXRT_LPI2C2=y -CONFIG_LPI2C2_BUSYIDLE=0 -CONFIG_LPI2C2_FILTSCL=0 -CONFIG_LPI2C2_FILTSDA=0 +# CONFIG_IMXRT_LPI2C1 is not set +# CONFIG_IMXRT_LPI2C2 is not set # CONFIG_IMXRT_LPI2C3 is not set # CONFIG_IMXRT_LPI2C4 is not set @@ -292,12 +293,16 @@ CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARCH_HAVE_IRQTRIGGER=y CONFIG_ARCH_DMA=y CONFIG_ARCH_HAVE_IRQPRIO=y +CONFIG_ARCH_ICACHE=y +CONFIG_ARCH_DCACHE=y # CONFIG_ARCH_L2CACHE is not set -# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set # CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +CONFIG_ARCH_HAVE_LAZYFPU=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y # CONFIG_ARCH_NAND_HWECC is not set @@ -305,10 +310,13 @@ CONFIG_ARCH_HAVE_MPU=y # CONFIG_ARCH_HAVE_POWEROFF is not set # CONFIG_ARCH_HAVE_PROGMEM is not set CONFIG_ARCH_HAVE_RESET=y +CONFIG_ARCH_HAVE_TESTSET=y CONFIG_ARCH_HAVE_FETCHADD=y # CONFIG_ARCH_HAVE_RTC_SUBSECONDS is not set # CONFIG_ARCH_HAVE_GARBAGE is not set # CONFIG_ARCH_GLOBAL_IRQDISABLE is not set +CONFIG_ARCH_FPU=y +CONFIG_ARCH_DPFPU=y # CONFIG_ARCH_USE_MPU is not set # CONFIG_ARCH_IRQPRIO is not set CONFIG_ARCH_STACKDUMP=y @@ -384,6 +392,7 @@ CONFIG_BOARD_ASSERT_RESET_VALUE=0 # CONFIG_BOARDCTL_UNIQUEID is not set # CONFIG_BOARDCTL_APP_SYMTAB is not set CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TESTSET is not set # CONFIG_BOARDCTL_IOCTL is not set # @@ -470,7 +479,8 @@ CONFIG_SEM_NNESTPRIO=8 # # RTOS hooks # -# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_BOARD_EARLY_INITIALIZE is not set +# CONFIG_BOARD_LATE_INITIALIZE is not set # CONFIG_SCHED_STARTHOOK is not set CONFIG_SCHED_ATEXIT=y CONFIG_SCHED_ATEXIT_MAX=1 @@ -685,7 +695,8 @@ CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set -CONFIG_SERIAL_DMA=y +# CONFIG_SERIAL_TXDMA is not set +# CONFIG_SERIAL_RXDMA is not set CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y CONFIG_SERIAL_TERMIOS=y # CONFIG_TTY_SIGINT is not set @@ -780,6 +791,7 @@ CONFIG_USBDEV_MAXPOWER=500 # CONFIG_USBDEV_DMA is not set # CONFIG_ARCH_USBDEV_STALLQUEUE is not set # CONFIG_USBDEV_TRACE is not set +# CONFIG_USBDEV_CUSTOM_TXFIFO_SIZE is not set # # USB Device Class Driver Options @@ -979,8 +991,10 @@ CONFIG_BUILTIN=y CONFIG_STDIO_BUFFER_SIZE=32 CONFIG_STDIO_LINEBUFFER=y CONFIG_NUNGET_CHARS=2 +# CONFIG_LIBC_PRINT_LEGACY is not set CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_NUMBERED_ARGS is not set # CONFIG_LIBC_SCANSET is not set # CONFIG_EOL_IS_CR is not set # CONFIG_EOL_IS_LF is not set @@ -1033,7 +1047,11 @@ CONFIG_LIBC_STRERROR=y # CONFIG_MEMSET_OPTSPEED=y CONFIG_MEMSET_64BIT=y -# CONFIG_LIBC_DLLFCN is not set + +# +# pthread support +# +# CONFIG_LIBC_DLFCN is not set # CONFIG_LIBC_MODLIB is not set # CONFIG_LIBC_WCHAR is not set # CONFIG_LIBC_LOCALE is not set @@ -1126,6 +1144,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_DHTXX is not set # CONFIG_EXAMPLES_DSPTEST is not set + +# +# embedlog example needs SYSTEM_EMBEDLOG +# # CONFIG_EXAMPLES_FLOWC is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set @@ -1136,7 +1158,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_IGMP is not set # CONFIG_EXAMPLES_INA219 is not set # CONFIG_EXAMPLES_INA226 is not set -# CONFIG_EXAMPLES_JSON is not set + +# +# ini dumper example needs FSUTILS_INIH +# # CONFIG_EXAMPLES_LSM330SPI_TEST is not set # CONFIG_EXAMPLES_LVGLDEMO is not set # CONFIG_EXAMPLES_MAX31855 is not set @@ -1144,6 +1169,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_MLX90614 is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MODBUSMASTER is not set # CONFIG_EXAMPLES_MOUNT is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NXDEMO is not set @@ -1180,6 +1206,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # File System Utilities # # CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_INIH is not set CONFIG_FSUTILS_MKFATFS=y # CONFIG_FSUTILS_PASSWD is not set @@ -1193,10 +1220,7 @@ CONFIG_FSUTILS_MKFATFS=y # # CONFIG_GRAPHICS_FT80X is not set # CONFIG_GRAPHICS_LVGL is not set - -# -# NxWidgets/NxWM -# +# CONFIG_NXGLPYHS_LARGE_ICONS is not set # # NxWidgets @@ -1205,10 +1229,6 @@ CONFIG_FSUTILS_MKFATFS=y # # NxWM # - -# -# Unit Tests -# # CONFIG_GRAPHICS_PDCURSES is not set # CONFIG_TIFF is not set @@ -1229,6 +1249,7 @@ CONFIG_FSUTILS_MKFATFS=y # Network Utilities # # CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CJSON is not set # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set @@ -1381,6 +1402,10 @@ CONFIG_SYSTEM_NSH_PRIORITY=100 CONFIG_SYSTEM_NSH_STACKSIZE=2048 # CONFIG_SYSTEM_NSH_CXXINITIALIZE is not set # CONFIG_SYSTEM_POPEN is not set + +# +# psmq requires posix mqueue and SYSTEM_EMBEDLOG +# # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y CONFIG_SYSTEM_READLINE=y @@ -1404,6 +1429,7 @@ CONFIG_READLINE_ECHO=y # CONFIG_TESTING_FSTEST is not set # CONFIG_TESTING_NXFFS is not set # CONFIG_TESTING_OSTEST is not set +# CONFIG_TESTING_SCANFTEST is not set # CONFIG_TESTING_SMART is not set # CONFIG_TESTING_SMART_TEST is not set # CONFIG_TESTING_UNITY is not set From 644c9c70b1c0af2fbbf77c49be5422dfe6b54da2 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 5 Jul 2019 06:29:30 -0700 Subject: [PATCH 09/12] K66:Support upstram move from chip to hardware --- boards/nxp/fmuk66-v3/src/board_config.h | 2 +- boards/nxp/fmuk66-v3/src/init.c | 2 +- boards/nxp/fmuk66-v3/src/timer_config.c | 4 ++-- src/drivers/boards/common/kinetis/board_identity.c | 4 ++-- src/drivers/boards/common/kinetis/board_mcu_version.c | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/boards/nxp/fmuk66-v3/src/board_config.h b/boards/nxp/fmuk66-v3/src/board_config.h index 0c50ba58ca63..75749dfcfadb 100644 --- a/boards/nxp/fmuk66-v3/src/board_config.h +++ b/boards/nxp/fmuk66-v3/src/board_config.h @@ -50,7 +50,7 @@ __BEGIN_DECLS /* these headers are not C++ safe */ #include -#include +#include #include /* FMUK66 GPIOs ***********************************************************************************/ diff --git a/boards/nxp/fmuk66-v3/src/init.c b/boards/nxp/fmuk66-v3/src/init.c index 87e28b6f52b3..1d9f8b2944e9 100644 --- a/boards/nxp/fmuk66-v3/src/init.c +++ b/boards/nxp/fmuk66-v3/src/init.c @@ -62,7 +62,7 @@ #include #include -#include +#include #include "board_config.h" #include "up_arch.h" diff --git a/boards/nxp/fmuk66-v3/src/timer_config.c b/boards/nxp/fmuk66-v3/src/timer_config.c index 3d61c2041e74..c53138423839 100644 --- a/boards/nxp/fmuk66-v3/src/timer_config.c +++ b/boards/nxp/fmuk66-v3/src/timer_config.c @@ -43,8 +43,8 @@ #include #include -#include "chip/kinetis_sim.h" -#include "chip/kinetis_ftm.h" +#include "hardware/kinetis_sim.h" +#include "hardware/kinetis_ftm.h" #include #include diff --git a/src/drivers/boards/common/kinetis/board_identity.c b/src/drivers/boards/common/kinetis/board_identity.c index 5cea3f50c5c0..6f65e4006cb6 100644 --- a/src/drivers/boards/common/kinetis/board_identity.c +++ b/src/drivers/boards/common/kinetis/board_identity.c @@ -41,8 +41,8 @@ #include #include #include -#include -#include +#include +#include static const uint16_t soc_arch_id = PX4_SOC_ARCH_ID; diff --git a/src/drivers/boards/common/kinetis/board_mcu_version.c b/src/drivers/boards/common/kinetis/board_mcu_version.c index e98937b0ae90..8f9b957b8715 100644 --- a/src/drivers/boards/common/kinetis/board_mcu_version.c +++ b/src/drivers/boards/common/kinetis/board_mcu_version.c @@ -41,7 +41,7 @@ #include #include "up_arch.h" -#include "chip/kinetis_sim.h" +#include "hardware/kinetis_sim.h" #define CHIP_TAG "Kinetis K??" #define CHIP_TAG_LEN sizeof(CHIP_TAG)-1 From 984537f1be74ed0f6f2f695ad2199b0ff47fdcdb Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 5 Jul 2019 06:32:01 -0700 Subject: [PATCH 10/12] fmurt1062:Support upstream move from chip->hardware --- .../fmurt1062-v1/nuttx-config/nsh/defconfig | 46 ++++++++++++------- boards/nxp/fmurt1062-v1/src/board_config.h | 2 +- boards/nxp/fmurt1062-v1/src/init.c | 2 +- boards/nxp/fmurt1062-v1/src/led.c | 2 +- boards/nxp/fmurt1062-v1/src/timer_config.c | 6 +-- boards/nxp/fmurt1062-v1/src/usb.c | 2 +- .../boards/common/imxrt/board_identity.c | 2 +- .../boards/common/imxrt/board_mcu_version.c | 2 +- src/drivers/boards/common/imxrt/board_reset.c | 2 +- src/drivers/imxrt/adc/adc.cpp | 2 +- src/drivers/imxrt/drv_hrt.c | 10 ++-- src/drivers/imxrt/drv_input_capture.c | 2 +- src/drivers/imxrt/drv_io_timer.c | 2 +- src/drivers/imxrt/drv_led_pwm.cpp | 2 +- .../imxrt/tone_alarm/ToneAlarmInterface.cpp | 2 +- 15 files changed, 50 insertions(+), 36 deletions(-) diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig index a613928bcd6c..6f1695393a94 100644 --- a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig +++ b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig @@ -109,6 +109,7 @@ CONFIG_ARCH_CHIP_IMXRT=y # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F0 is not set # CONFIG_ARCH_CHIP_STM32L0 is not set +# CONFIG_ARCH_CHIP_STM32G0 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set # CONFIG_ARCH_CHIP_STM32H7 is not set # CONFIG_ARCH_CHIP_STM32L4 is not set @@ -209,6 +210,7 @@ CONFIG_IMXRT_HAVE_LCD=y # i.MX RT Peripheral Selection # CONFIG_IMXRT_EDMA=y +# CONFIG_IMXRT_USBOTG is not set # CONFIG_IMXRT_ENET is not set # CONFIG_IMXRT_LCD is not set @@ -228,6 +230,11 @@ CONFIG_IMXRT_LPUART3=y # CONFIG_IMXRT_LPUART7 is not set # CONFIG_IMXRT_LPUART8 is not set +# +# LPUART Configuration +# +CONFIG_IMXRT_LPUART_INVERT=y + # # LPI2C Peripherals # @@ -557,7 +564,6 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 # # Device Drivers # -# CONFIG_DISABLE_POLL is not set CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set # CONFIG_DEV_URANDOM is not set @@ -597,7 +603,7 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_SPI_CS_CONTROL is not set # CONFIG_SPI_CS_DELAY_CONTROL is not set # CONFIG_SPI_TRIGGER is not set -# CONFIG_SPI_DRIVER is not set +CONFIG_SPI_DRIVER=y # CONFIG_SPI_BITBANG is not set # CONFIG_I2S is not set @@ -694,6 +700,7 @@ CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 # CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_RS485CONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set # CONFIG_SERIAL_TXDMA is not set # CONFIG_SERIAL_RXDMA is not set @@ -736,6 +743,8 @@ CONFIG_LPUART1_BAUD=115200 CONFIG_LPUART1_BITS=8 CONFIG_LPUART1_PARITY=0 CONFIG_LPUART1_2STOP=0 +CONFIG_LPUART1_NOIFLOWCONTROL=y +# CONFIG_LPUART1_RS485RTSCONTROL is not set # CONFIG_LPUART1_IFLOWCONTROL is not set # CONFIG_LPUART1_OFLOWCONTROL is not set # CONFIG_LPUART1_DMA is not set @@ -749,6 +758,8 @@ CONFIG_LPUART2_BAUD=115200 CONFIG_LPUART2_BITS=8 CONFIG_LPUART2_PARITY=0 CONFIG_LPUART2_2STOP=0 +CONFIG_LPUART2_NOIFLOWCONTROL=y +# CONFIG_LPUART2_RS485RTSCONTROL is not set # CONFIG_LPUART2_IFLOWCONTROL is not set # CONFIG_LPUART2_OFLOWCONTROL is not set CONFIG_LPUART2_DMA=y @@ -762,6 +773,8 @@ CONFIG_LPUART3_BAUD=57600 CONFIG_LPUART3_BITS=8 CONFIG_LPUART3_PARITY=0 CONFIG_LPUART3_2STOP=0 +CONFIG_LPUART3_NOIFLOWCONTROL=y +# CONFIG_LPUART3_RS485RTSCONTROL is not set # CONFIG_LPUART3_IFLOWCONTROL is not set # CONFIG_LPUART3_OFLOWCONTROL is not set # CONFIG_LPUART3_DMA is not set @@ -1132,6 +1145,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +# CONFIG_EXAMPLES_ABNTCODI is not set # CONFIG_EXAMPLES_ADXL372_TEST is not set # CONFIG_EXAMPLES_APA102 is not set # CONFIG_EXAMPLES_BATTERY is not set @@ -1144,10 +1158,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_DHTXX is not set # CONFIG_EXAMPLES_DSPTEST is not set - -# -# embedlog example needs SYSTEM_EMBEDLOG -# # CONFIG_EXAMPLES_FLOWC is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set @@ -1158,10 +1168,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_IGMP is not set # CONFIG_EXAMPLES_INA219 is not set # CONFIG_EXAMPLES_INA226 is not set - -# -# ini dumper example needs FSUTILS_INIH -# # CONFIG_EXAMPLES_LSM330SPI_TEST is not set # CONFIG_EXAMPLES_LVGLDEMO is not set # CONFIG_EXAMPLES_MAX31855 is not set @@ -1220,7 +1226,6 @@ CONFIG_FSUTILS_MKFATFS=y # # CONFIG_GRAPHICS_FT80X is not set # CONFIG_GRAPHICS_LVGL is not set -# CONFIG_NXGLPYHS_LARGE_ICONS is not set # # NxWidgets @@ -1232,6 +1237,11 @@ CONFIG_FSUTILS_MKFATFS=y # CONFIG_GRAPHICS_PDCURSES is not set # CONFIG_TIFF is not set +# +# Industrial Applications +# +# CONFIG_INDUSTRY_ABNT_CODI_LIB is not set + # # Interpreters # @@ -1253,7 +1263,6 @@ CONFIG_FSUTILS_MKFATFS=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set -# CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set # CONFIG_NETUTILS_THTTPD is not set @@ -1402,10 +1411,6 @@ CONFIG_SYSTEM_NSH_PRIORITY=100 CONFIG_SYSTEM_NSH_STACKSIZE=2048 # CONFIG_SYSTEM_NSH_CXXINITIALIZE is not set # CONFIG_SYSTEM_POPEN is not set - -# -# psmq requires posix mqueue and SYSTEM_EMBEDLOG -# # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y CONFIG_SYSTEM_READLINE=y @@ -1413,6 +1418,15 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SETLOGMASK is not set +CONFIG_SYSTEM_SPITOOL=y +CONFIG_SPITOOL_PRIORITY=100 +CONFIG_SPITOOL_STACKSIZE=2048 +CONFIG_SPITOOL_MINBUS=0 +CONFIG_SPITOOL_MAXBUS=3 +CONFIG_SPITOOL_DEFFREQ=4000000 +CONFIG_SPITOOL_DEFMODE=0 +CONFIG_SPITOOL_DEFWIDTH=8 +CONFIG_SPITOOL_DEFWORDS=1 # CONFIG_SYSTEM_STACKMONITOR is not set # CONFIG_SYSTEM_SUDOKU is not set # CONFIG_SYSTEM_SYSTEM is not set diff --git a/boards/nxp/fmurt1062-v1/src/board_config.h b/boards/nxp/fmurt1062-v1/src/board_config.h index 234120ecd173..999bbcf64541 100644 --- a/boards/nxp/fmurt1062-v1/src/board_config.h +++ b/boards/nxp/fmurt1062-v1/src/board_config.h @@ -51,7 +51,7 @@ #include "imxrt_gpio.h" #include "imxrt_iomuxc.h" -#include "chip/imxrt_pinmux.h" +#include "hardware/imxrt_pinmux.h" #include diff --git a/boards/nxp/fmurt1062-v1/src/init.c b/boards/nxp/fmurt1062-v1/src/init.c index 982321015d61..d73b4016931a 100644 --- a/boards/nxp/fmurt1062-v1/src/init.c +++ b/boards/nxp/fmurt1062-v1/src/init.c @@ -67,7 +67,7 @@ #include #include "board_config.h" -#include +#include #include diff --git a/boards/nxp/fmurt1062-v1/src/led.c b/boards/nxp/fmurt1062-v1/src/led.c index a03d51778283..618576114779 100644 --- a/boards/nxp/fmurt1062-v1/src/led.c +++ b/boards/nxp/fmurt1062-v1/src/led.c @@ -42,7 +42,7 @@ #include #include "chip.h" -#include +#include #include "board_config.h" #include diff --git a/boards/nxp/fmurt1062-v1/src/timer_config.c b/boards/nxp/fmurt1062-v1/src/timer_config.c index f17ed6e46f8c..e555db4fa4f4 100644 --- a/boards/nxp/fmurt1062-v1/src/timer_config.c +++ b/boards/nxp/fmurt1062-v1/src/timer_config.c @@ -43,11 +43,11 @@ #include #include -#include "chip/imxrt_tmr.h" -#include "chip/imxrt_flexpwm.h" +#include "hardware/imxrt_tmr.h" +#include "hardware/imxrt_flexpwm.h" #include "imxrt_gpio.h" #include "imxrt_iomuxc.h" -#include "chip/imxrt_pinmux.h" +#include "hardware/imxrt_pinmux.h" #include "imxrt_xbar.h" #include "imxrt_periphclks.h" #include diff --git a/boards/nxp/fmurt1062-v1/src/usb.c b/boards/nxp/fmurt1062-v1/src/usb.c index ccfa95b77c71..6a4a974b8208 100644 --- a/boards/nxp/fmurt1062-v1/src/usb.c +++ b/boards/nxp/fmurt1062-v1/src/usb.c @@ -53,7 +53,7 @@ #include #include -#include +#include #include "board_config.h" #include "imxrt_periphclks.h" diff --git a/src/drivers/boards/common/imxrt/board_identity.c b/src/drivers/boards/common/imxrt/board_identity.c index 4139799a1822..9870bab61d12 100644 --- a/src/drivers/boards/common/imxrt/board_identity.c +++ b/src/drivers/boards/common/imxrt/board_identity.c @@ -43,7 +43,7 @@ #include #include "board_config.h" -#include +#include #include "up_arch.h" #define CPU_UUID_BYTE_FORMAT_ORDER {3, 2, 1, 0, 7, 6, 5, 4} diff --git a/src/drivers/boards/common/imxrt/board_mcu_version.c b/src/drivers/boards/common/imxrt/board_mcu_version.c index 70660f729f5e..a7d47b085c4c 100644 --- a/src/drivers/boards/common/imxrt/board_mcu_version.c +++ b/src/drivers/boards/common/imxrt/board_mcu_version.c @@ -41,7 +41,7 @@ #include #include -#include +#include #include "up_arch.h" #define DIGPROG_MINOR_SHIFT 0 diff --git a/src/drivers/boards/common/imxrt/board_reset.c b/src/drivers/boards/common/imxrt/board_reset.c index 4fa762646942..385e767ecc3c 100644 --- a/src/drivers/boards/common/imxrt/board_reset.c +++ b/src/drivers/boards/common/imxrt/board_reset.c @@ -41,7 +41,7 @@ #include #include #include -#include +#include #define PX4_IMXRT_RTC_REBOOT_REG 3 // Must be common with bootloader and: diff --git a/src/drivers/imxrt/adc/adc.cpp b/src/drivers/imxrt/adc/adc.cpp index 636de96f79d7..820e9aa53d3e 100644 --- a/src/drivers/imxrt/adc/adc.cpp +++ b/src/drivers/imxrt/adc/adc.cpp @@ -61,7 +61,7 @@ #include #include -#include +#include #include "imxrt_periphclks.h" #include diff --git a/src/drivers/imxrt/drv_hrt.c b/src/drivers/imxrt/drv_hrt.c index 198f17f5db81..3d384956fc13 100644 --- a/src/drivers/imxrt/drv_hrt.c +++ b/src/drivers/imxrt/drv_hrt.c @@ -67,7 +67,7 @@ #include "chip.h" -#include "chip/imxrt_gpt.h" +#include "hardware/imxrt_gpt.h" #include "imxrt_periphclks.h" #undef PPM_DEBUG @@ -724,7 +724,7 @@ hrt_call_enter(struct hrt_call *entry) { struct hrt_call *call, *next; - call = (struct hrt_call *)sq_peek(&callout_queue); + call = (struct hrt_call *)(void *)sq_peek(&callout_queue); if ((call == NULL) || (entry->deadline < call->deadline)) { sq_addfirst(&entry->link, &callout_queue); @@ -734,7 +734,7 @@ hrt_call_enter(struct hrt_call *entry) } else { do { - next = (struct hrt_call *)sq_next(&call->link); + next = (struct hrt_call *)(void *)sq_next(&call->link); if ((next == NULL) || (entry->deadline < next->deadline)) { hrtinfo("call enter after head\n"); @@ -757,7 +757,7 @@ hrt_call_invoke(void) /* get the current time */ hrt_abstime now = hrt_absolute_time(); - call = (struct hrt_call *)sq_peek(&callout_queue); + call = (struct hrt_call *)(void *)sq_peek(&callout_queue); if (call == NULL) { break; @@ -805,7 +805,7 @@ static void hrt_call_reschedule() { hrt_abstime now = hrt_absolute_time(); - struct hrt_call *next = (struct hrt_call *)sq_peek(&callout_queue); + struct hrt_call *next = (struct hrt_call *)(void *)sq_peek(&callout_queue); hrt_abstime deadline = now + HRT_INTERVAL_MAX; /* diff --git a/src/drivers/imxrt/drv_input_capture.c b/src/drivers/imxrt/drv_input_capture.c index 528e0dfc0846..6cd25ab47847 100644 --- a/src/drivers/imxrt/drv_input_capture.c +++ b/src/drivers/imxrt/drv_input_capture.c @@ -65,7 +65,7 @@ #include "drv_input_capture.h" #include -#include "chip/imxrt_flexpwm.h" +#include "hardware/imxrt_flexpwm.h" #define MAX_CHANNELS_PER_TIMER 2 diff --git a/src/drivers/imxrt/drv_io_timer.c b/src/drivers/imxrt/drv_io_timer.c index 78a98bd6a1ca..dfd3c5548679 100644 --- a/src/drivers/imxrt/drv_io_timer.c +++ b/src/drivers/imxrt/drv_io_timer.c @@ -59,7 +59,7 @@ #include "drv_io_timer.h" #include -#include "chip/imxrt_flexpwm.h" +#include "hardware/imxrt_flexpwm.h" #include "imxrt_periphclks.h" #if !defined(BOARD_PWM_FREQ) diff --git a/src/drivers/imxrt/drv_led_pwm.cpp b/src/drivers/imxrt/drv_led_pwm.cpp index 6bf9282590ee..8d4f950335b3 100644 --- a/src/drivers/imxrt/drv_led_pwm.cpp +++ b/src/drivers/imxrt/drv_led_pwm.cpp @@ -59,7 +59,7 @@ #include "drv_io_timer.h" #include -#include "chip/imxrt_tmr.h" +#include "hardware/imxrt_tmr.h" int led_pwm_servo_set(unsigned channel, uint8_t cvalue) { diff --git a/src/drivers/imxrt/tone_alarm/ToneAlarmInterface.cpp b/src/drivers/imxrt/tone_alarm/ToneAlarmInterface.cpp index b20d781cad06..cee09342a62a 100644 --- a/src/drivers/imxrt/tone_alarm/ToneAlarmInterface.cpp +++ b/src/drivers/imxrt/tone_alarm/ToneAlarmInterface.cpp @@ -38,7 +38,7 @@ #include #include "chip.h" -#include "chip/imxrt_gpt.h" +#include "hardware/imxrt_gpt.h" #include "imxrt_periphclks.h" //#include From b2809911276e057bb38cfc72b6f52a53df8cfab2 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Wed, 10 Jul 2019 07:57:23 -0700 Subject: [PATCH 11/12] Track Upstream Firmare reorg --- boards/nxp/fmurt1062-v1/default.cmake | 19 +- .../fmurt1062-v1/nuttx-config/nsh/defconfig | 1561 ++--------------- .../scripts/{ld.script => script.ld} | 0 boards/nxp/fmurt1062-v1/src/board_config.h | 1 + boards/nxp/fmurt1062-v1/src/init.c | 10 +- 5 files changed, 153 insertions(+), 1438 deletions(-) rename boards/nxp/fmurt1062-v1/nuttx-config/scripts/{ld.script => script.ld} (100%) diff --git a/boards/nxp/fmurt1062-v1/default.cmake b/boards/nxp/fmurt1062-v1/default.cmake index 4affccc9e95f..3c12ed5a009e 100644 --- a/boards/nxp/fmurt1062-v1/default.cmake +++ b/boards/nxp/fmurt1062-v1/default.cmake @@ -21,14 +21,15 @@ px4_add_board( DRIVERS barometer # all available barometer drivers batt_smbus +# camera_capture Not portable! camera_trigger differential_pressure # all available differential pressure drivers distance_sensor # all available distance sensor drivers gps #heater - #imu # all available imu drivers #heater imu/adis16448 + imu/adis16497 #imu # all available imu drivers imu/bma180 imu/bmi055 @@ -41,18 +42,18 @@ px4_add_board( imxrt/tone_alarm lights/blinkm lights/oreoled + lights/pca8574 lights/rgbled lights/rgbled_ncp5623c lights/rgbled_pwm magnetometer # all available magnetometer drivers mkblctrl - lights/pca8574 pca9685 - pmw3901 + optical_flow + power_monitor/ina226 #protocol_splitter #pwm_input # NOT Portable YET drivers pwm_out_sim - px4flow px4fmu rc_input roboclaw @@ -70,8 +71,7 @@ px4_add_board( events fw_att_control fw_pos_control_l1 - gnd_att_control - gnd_pos_control + rover_pos_control land_detector landing_target_estimator load_mon @@ -82,6 +82,7 @@ px4_add_board( mc_pos_control navigator sensors + sih vmount vtol_att_control wind_estimator @@ -89,9 +90,11 @@ px4_add_board( SYSTEMCMDS bl_update config + dmesg dumpfile esc_calib #hardfault_log # Needs bbsrm + i2cdetect led_control mixer motor_ramp @@ -119,8 +122,8 @@ px4_add_board( hwtest # Hardware test #matlab_csv_serial position_estimator_inav - px4_mavlink_debug # Tutorial code from https://px4.io/dev/debug_values - px4_simple_app # Tutorial code from https://px4.io/dev/px4_simple_app + px4_mavlink_debug # Tutorial code from http://dev.px4.io/en/debug/debug_values.html + px4_simple_app # Tutorial code from http://dev.px4.io/en/apps/hello_sky.html rover_steering_control # Rover example app segway uuv_example_app diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig index 6f1695393a94..bc012a8f62e1 100644 --- a/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig +++ b/boards/nxp/fmurt1062-v1/nuttx-config/nsh/defconfig @@ -1,1465 +1,180 @@ # -# Automatically generated file; DO NOT EDIT. -# Nuttx/ Configuration +# This file is autogenerated: PLEASE DO NOT EDIT IT. # - +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. # -# Build Setup -# -# CONFIG_EXPERIMENTAL is not set -CONFIG_DEFAULT_SMALL=y -CONFIG_HOST_LINUX=y -# CONFIG_HOST_MACOS is not set -# CONFIG_HOST_WINDOWS is not set -# CONFIG_HOST_OTHER is not set - -# -# Build Configuration -# -CONFIG_APPS_DIR="../apps" -# CONFIG_BUILD_LOADABLE is not set -CONFIG_BUILD_FLAT=y -# CONFIG_BUILD_2PASS is not set - -# -# Binary Output Formats -# -# CONFIG_RRLOAD_BINARY is not set -# CONFIG_INTELHEX_BINARY is not set -# CONFIG_MOTOROLA_SREC is not set -CONFIG_RAW_BINARY=y -# CONFIG_UBOOT_UIMAGE is not set -# CONFIG_DFU_BINARY is not set - -# -# Customize Header Files -# -# CONFIG_ARCH_STDINT_H is not set -# CONFIG_ARCH_STDBOOL_H is not set -CONFIG_ARCH_MATH_H=y -# CONFIG_ARCH_FLOAT_H is not set -# CONFIG_ARCH_STDARG_H is not set -# CONFIG_ARCH_DEBUG_H is not set - -# -# Debug Options -# -CONFIG_DEBUG_ALERT=y -# CONFIG_DEBUG_FEATURES is not set -CONFIG_ARCH_HAVE_STACKCHECK=y -CONFIG_STACK_COLORATION=y -# CONFIG_ARCH_HAVE_HEAPCHECK is not set -CONFIG_DEBUG_SYMBOLS=y -CONFIG_ARCH_HAVE_CUSTOMOPT=y -# CONFIG_DEBUG_NOOPT is not set -# CONFIG_DEBUG_CUSTOMOPT is not set -CONFIG_DEBUG_FULLOPT=y - -# -# System Type -# -CONFIG_ARCH_ARM=y -# CONFIG_ARCH_AVR is not set -# CONFIG_ARCH_HC is not set -# CONFIG_ARCH_MIPS is not set -# CONFIG_ARCH_MISOC is not set -# CONFIG_ARCH_RENESAS is not set -# CONFIG_ARCH_RISCV is not set -# CONFIG_ARCH_SIM is not set -# CONFIG_ARCH_X86 is not set -# CONFIG_ARCH_XTENSA is not set -# CONFIG_ARCH_Z16 is not set -# CONFIG_ARCH_Z80 is not set -# CONFIG_ARCH_OR1K is not set +# CONFIG_DISABLE_OS_API is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set +# CONFIG_MMCSD_SPI is not set +# CONFIG_NSH_DISABLEBG is not set +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_DISABLE_TIME is not set CONFIG_ARCH="arm" - -# -# ARM Options -# -# CONFIG_ARCH_CHIP_A1X is not set -# CONFIG_ARCH_CHIP_AM335X is not set -# CONFIG_ARCH_CHIP_C5471 is not set -# CONFIG_ARCH_CHIP_DM320 is not set -# CONFIG_ARCH_CHIP_EFM32 is not set -# CONFIG_ARCH_CHIP_IMX1 is not set -# CONFIG_ARCH_CHIP_IMX6 is not set +CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" +CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" CONFIG_ARCH_CHIP_IMXRT=y -# CONFIG_ARCH_CHIP_KINETIS is not set -# CONFIG_ARCH_CHIP_KL is not set -# CONFIG_ARCH_CHIP_LC823450 is not set -# CONFIG_ARCH_CHIP_LM is not set -# CONFIG_ARCH_CHIP_LPC11XX is not set -# CONFIG_ARCH_CHIP_LPC17XX is not set -# CONFIG_ARCH_CHIP_LPC214X is not set -# CONFIG_ARCH_CHIP_LPC2378 is not set -# CONFIG_ARCH_CHIP_LPC31XX is not set -# CONFIG_ARCH_CHIP_LPC43XX is not set -# CONFIG_ARCH_CHIP_LPC54XX is not set -# CONFIG_ARCH_CHIP_MAX326XX is not set -# CONFIG_ARCH_CHIP_MOXART is not set -# CONFIG_ARCH_CHIP_NRF52 is not set -# CONFIG_ARCH_CHIP_NUC1XX is not set -# CONFIG_ARCH_CHIP_SAMA5 is not set -# CONFIG_ARCH_CHIP_SAMD2X is not set -# CONFIG_ARCH_CHIP_SAML2X is not set -# CONFIG_ARCH_CHIP_SAMD5X is not set -# CONFIG_ARCH_CHIP_SAME5X is not set -# CONFIG_ARCH_CHIP_SAM34 is not set -# CONFIG_ARCH_CHIP_SAMV7 is not set -# CONFIG_ARCH_CHIP_STM32 is not set -# CONFIG_ARCH_CHIP_STM32F0 is not set -# CONFIG_ARCH_CHIP_STM32L0 is not set -# CONFIG_ARCH_CHIP_STM32G0 is not set -# CONFIG_ARCH_CHIP_STM32F7 is not set -# CONFIG_ARCH_CHIP_STM32H7 is not set -# CONFIG_ARCH_CHIP_STM32L4 is not set -# CONFIG_ARCH_CHIP_STR71X is not set -# CONFIG_ARCH_CHIP_TMS570 is not set -# CONFIG_ARCH_CHIP_TIVA is not set -# CONFIG_ARCH_CHIP_XMC4 is not set -# CONFIG_ARCH_CHIP_CXD56XX is not set -# CONFIG_ARCH_ARM7TDMI is not set -# CONFIG_ARCH_ARM920T is not set -# CONFIG_ARCH_ARM926EJS is not set -# CONFIG_ARCH_ARM1136J is not set -# CONFIG_ARCH_ARM1156T2 is not set -# CONFIG_ARCH_ARM1176JZ is not set -# CONFIG_ARCH_CORTEXM0 is not set -# CONFIG_ARCH_CORTEXM23 is not set -CONFIG_ARCH_ARMV7M=y -# CONFIG_ARCH_CORTEXM3 is not set -# CONFIG_ARCH_CORTEXM33 is not set -# CONFIG_ARCH_CORTEXM4 is not set -CONFIG_ARCH_CORTEXM7=y -# CONFIG_ARCH_ARMV7A is not set -# CONFIG_ARCH_CORTEXA5 is not set -# CONFIG_ARCH_CORTEXA7 is not set -# CONFIG_ARCH_CORTEXA8 is not set -# CONFIG_ARCH_CORTEXA9 is not set -# CONFIG_ARCH_ARMV7R is not set -# CONFIG_ARCH_CORTEXR4 is not set -# CONFIG_ARCH_CORTEXR5 is not set -# CONFIG_ARCH_CORTEXR7 is not set -CONFIG_ARCH_FAMILY="armv7-m" -CONFIG_ARCH_CHIP="imxrt" -# CONFIG_ARCH_HAVE_TRUSTZONE is not set -CONFIG_ARM_HAVE_MPU_UNIFIED=y -# CONFIG_ARM_MPU is not set -CONFIG_ARCH_HAVE_HARDFAULT_DEBUG=y -CONFIG_DEBUG_HARDFAULT_ALERT=y -CONFIG_ARCH_HAVE_MEMFAULT_DEBUG=y -# CONFIG_ARM_SEMIHOSTING_SYSLOG is not set - -# -# ARMV7M Configuration Options -# -CONFIG_ARMV7M_HAVE_ICACHE=y -CONFIG_ARMV7M_HAVE_DCACHE=y -# CONFIG_ARMV7M_LAZYFPU is not set -CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y +CONFIG_ARCH_INTERRUPTSTACK=750 +CONFIG_ARCH_MATH_H=y +CONFIG_ARCH_STACKDUMP=y CONFIG_ARMV7M_BASEPRI_WAR=y -CONFIG_ARMV7M_ICACHE=y CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y -CONFIG_ARMV7M_HAVE_ITCM=y -CONFIG_ARMV7M_HAVE_DTCM=y -# CONFIG_ARMV7M_ITCM is not set -# CONFIG_ARMV7M_DTCM is not set -# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set -# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set -# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set -# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set -CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_ARMV7M_TOOLCHAIN_CLANGL is not set -CONFIG_ARMV7M_HAVE_STACKCHECK=y -# CONFIG_ARMV7M_STACKCHECK is not set -# CONFIG_ARMV7M_ITMSYSLOG is not set - -# -# i.MX RT Configuration Options -# -# CONFIG_ARCH_CHIP_MIMXRT1021CAG4A is not set -# CONFIG_ARCH_CHIP_MIMXRT1021CAF4A is not set -# CONFIG_ARCH_CHIP_MIMXRT1021DAF5A is not set -# CONFIG_ARCH_CHIP_MIMXRT1021DAG5A is not set -# CONFIG_ARCH_CHIP_MIMXRT1051DVL6A is not set -# CONFIG_ARCH_CHIP_MIMXRT1051CVL5A is not set -# CONFIG_ARCH_CHIP_MIMXRT1052DVL6A is not set -# CONFIG_ARCH_CHIP_MIMXRT1052CVL5A is not set -# CONFIG_ARCH_CHIP_MIMXRT1061DVL6A is not set -# CONFIG_ARCH_CHIP_MIMXRT1061CVL5A is not set -CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y -# CONFIG_ARCH_CHIP_MIMXRT1062CVL5A is not set -# CONFIG_ARCH_FAMILY_MIMXRT1021D is not set -# CONFIG_ARCH_FAMILY_MIMXRT1021C is not set -# CONFIG_ARCH_FAMILY_IMXRT102x is not set -# CONFIG_ARCH_FAMILY_MXRT105xDVL6A is not set -# CONFIG_ARCH_FAMILY_MIMXRT1052CVL5A is not set -# CONFIG_ARCH_FAMILY_IMXRT105x is not set -CONFIG_ARCH_FAMILY_MXRT106xDVL6A=y -# CONFIG_ARCH_FAMILY_MIMXRT1062CVL5A is not set -CONFIG_ARCH_FAMILY_IMXRT106x=y -CONFIG_IMXRT_HAVE_LPUART=y -# CONFIG_IMXRT_LPI2C is not set -CONFIG_IMXRT_LPSPI=y -CONFIG_IMXRT_HIGHSPEED_GPIO=y -CONFIG_IMXRT_HAVE_LCD=y -# CONFIG_IMXRT_SEMC_INIT_DONE is not set - -# -# i.MX RT Peripheral Selection -# -CONFIG_IMXRT_EDMA=y -# CONFIG_IMXRT_USBOTG is not set -# CONFIG_IMXRT_ENET is not set -# CONFIG_IMXRT_LCD is not set - -# -# FlexIO Peripherals -# - -# -# LPUART Peripherals -# -CONFIG_IMXRT_LPUART1=y -CONFIG_IMXRT_LPUART2=y -CONFIG_IMXRT_LPUART3=y -# CONFIG_IMXRT_LPUART4 is not set -# CONFIG_IMXRT_LPUART5 is not set -# CONFIG_IMXRT_LPUART6 is not set -# CONFIG_IMXRT_LPUART7 is not set -# CONFIG_IMXRT_LPUART8 is not set - -# -# LPUART Configuration -# -CONFIG_IMXRT_LPUART_INVERT=y - -# -# LPI2C Peripherals -# -# CONFIG_IMXRT_LPI2C1 is not set -# CONFIG_IMXRT_LPI2C2 is not set -# CONFIG_IMXRT_LPI2C3 is not set -# CONFIG_IMXRT_LPI2C4 is not set - -# -# LPSPI Peripherals -# -# CONFIG_IMXRT_LPSPI1 is not set -# CONFIG_IMXRT_LPSPI2 is not set -CONFIG_IMXRT_LPSPI3=y -# CONFIG_IMXRT_LPSPI4 is not set -# CONFIG_IMXRT_SEMC is not set -CONFIG_IMXRT_SNVS_LPSRTC=y -CONFIG_IMXRT_SNVS_HPRTC=y -CONFIG_IMXRT_USDHC=y -# CONFIG_IMXRT_GPIO_IRQ is not set - -# -# Memory Configuration -# -CONFIG_IMXRT_BOOT_OCRAM=y -CONFIG_IMXRT_OCRAM_PRIMARY=y - -# -# i.MX RT Heap Configuration -# - -# -# USDHC Configuration -# -CONFIG_IMXRT_USDHC_DMA=y -# CONFIG_IMXRT_USDHC_WIDTH_D1_ONLY is not set - -# -# eDMA Configuration -# -CONFIG_IMXRT_EDMA_NTCD=0 -# CONFIG_IMXRT_EDMA_ELINK is not set -# CONFIG_IMXRT_EDMA_ERCA is not set -CONFIG_IMXRT_EDMA_HOE=y -# CONFIG_IMXRT_EDMA_CLM is not set -# CONFIG_IMXRT_EDMA_EMLIM is not set -# CONFIG_IMXRT_EDMA_EDBG is not set - -# -# RTC Configuration -# -CONFIG_IMXRT_RTC_MAGIC_REG=1 -CONFIG_IMXRT_RTC_MAGIC=0xfacefeed -# CONFIG_ARCH_TOOLCHAIN_IAR is not set -CONFIG_ARCH_TOOLCHAIN_GNU=y -# CONFIG_ARCH_GNU_NO_WEAKFUNCTIONS is not set - -# -# Architecture Options -# -# CONFIG_ARCH_NOINTC is not set -# CONFIG_ARCH_VECNOTIRQ is not set -CONFIG_ARCH_HAVE_IRQTRIGGER=y -CONFIG_ARCH_DMA=y -CONFIG_ARCH_HAVE_IRQPRIO=y -CONFIG_ARCH_ICACHE=y -CONFIG_ARCH_DCACHE=y -# CONFIG_ARCH_L2CACHE is not set -# CONFIG_ARCH_HAVE_ADDRENV is not set -# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set -# CONFIG_ARCH_HAVE_MULTICPU is not set -CONFIG_ARCH_HAVE_VFORK=y -CONFIG_ARCH_HAVE_FPU=y -CONFIG_ARCH_HAVE_DPFPU=y -CONFIG_ARCH_HAVE_LAZYFPU=y -# CONFIG_ARCH_HAVE_MMU is not set -CONFIG_ARCH_HAVE_MPU=y -# CONFIG_ARCH_NAND_HWECC is not set -# CONFIG_ARCH_HAVE_EXTCLK is not set -# CONFIG_ARCH_HAVE_POWEROFF is not set -# CONFIG_ARCH_HAVE_PROGMEM is not set -CONFIG_ARCH_HAVE_RESET=y -CONFIG_ARCH_HAVE_TESTSET=y -CONFIG_ARCH_HAVE_FETCHADD=y -# CONFIG_ARCH_HAVE_RTC_SUBSECONDS is not set -# CONFIG_ARCH_HAVE_GARBAGE is not set -# CONFIG_ARCH_GLOBAL_IRQDISABLE is not set -CONFIG_ARCH_FPU=y -CONFIG_ARCH_DPFPU=y -# CONFIG_ARCH_USE_MPU is not set -# CONFIG_ARCH_IRQPRIO is not set -CONFIG_ARCH_STACKDUMP=y -# CONFIG_ENDIAN_BIG is not set -# CONFIG_ARCH_IDLE_CUSTOM is not set -CONFIG_ARCH_HAVE_RAMFUNCS=y -CONFIG_ARCH_RAMFUNCS=y -CONFIG_ARCH_HAVE_RAMVECTORS=y -# CONFIG_ARCH_RAMVECTORS is not set -# CONFIG_ARCH_MINIMAL_VECTORTABLE is not set - -# -# Board Settings -# -CONFIG_BOARD_LOOPSPERMSEC=104926 - -# -# Interrupt options -# -CONFIG_ARCH_HAVE_INTERRUPTSTACK=y -CONFIG_ARCH_INTERRUPTSTACK=750 -CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y -# CONFIG_ARCH_HIPRI_INTERRUPT is not set - -# -# Boot options -# -# CONFIG_BOOT_RUNFROMEXTSRAM is not set -CONFIG_BOOT_RUNFROMFLASH=y -# CONFIG_BOOT_RUNFROMISRAM is not set -# CONFIG_BOOT_RUNFROMSDRAM is not set -# CONFIG_BOOT_COPYTORAM is not set - -# -# Boot Memory Configuration -# -CONFIG_RAM_START=0x20200000 -CONFIG_RAM_SIZE=1048576 -# CONFIG_ARCH_HAVE_SDRAM is not set - -# -# Board Selection -# -# CONFIG_ARCH_BOARD_IMXRT1060_EVK is not set -CONFIG_ARCH_BOARD_CUSTOM=y - -# -# Custom Board Configuration -# -CONFIG_ARCH_BOARD_CUSTOM_NAME="px4" -CONFIG_ARCH_BOARD_CUSTOM_DIR="../nuttx-config" -CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y -CONFIG_BOARD_CUSTOM_LEDS=y -# CONFIG_BOARD_CUSTOM_BUTTONS is not set - -# -# Common Board Options -# -CONFIG_ARCH_HAVE_LEDS=y -CONFIG_ARCH_LEDS=y - -# -# Board-Specific Options -# -# CONFIG_NXP_FMURT1062_V3_HYPER_FLASH is not set -CONFIG_NXP_FMURT1062_V3_QSPI_FLASH=y -CONFIG_BOARD_CRASHDUMP=y -CONFIG_LIB_BOARDCTL=y -# CONFIG_BOARDCTL_FINALINIT is not set +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_MEMCPY=y +CONFIG_ARMV7M_USEBASEPRI=y CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_CRASHDUMP=y +CONFIG_BOARD_CUSTOM_LEDS=y +CONFIG_BOARD_LOOPSPERMSEC=104926 CONFIG_BOARD_RESET_ON_ASSERT=2 -CONFIG_BOARD_ASSERT_RESET_VALUE=0 -# CONFIG_BOARDCTL_UNIQUEID is not set -# CONFIG_BOARDCTL_APP_SYMTAB is not set -CONFIG_BOARDCTL_USBDEVCTRL=y -# CONFIG_BOARDCTL_TESTSET is not set -# CONFIG_BOARDCTL_IOCTL is not set - -# -# RTOS Features -# -# CONFIG_DISABLE_OS_API is not set - -# -# Clocks and Timers -# -CONFIG_ARCH_HAVE_TICKLESS=y -# CONFIG_SCHED_TICKLESS is not set -CONFIG_USEC_PER_TICK=1000 -# CONFIG_SYSTEMTICK_HOOK is not set -# CONFIG_SYSTEM_TIME64 is not set -CONFIG_CLOCK_MONOTONIC=y -# CONFIG_ARCH_HAVE_TIMEKEEPING is not set -# CONFIG_JULIAN_TIME is not set -CONFIG_START_YEAR=2018 -CONFIG_START_MONTH=11 -CONFIG_START_DAY=30 -CONFIG_MAX_WDOGPARMS=2 -CONFIG_PREALLOC_WDOGS=50 -CONFIG_WDOG_INTRESERVE=4 -CONFIG_PREALLOC_TIMERS=50 - -# -# Tasks and Scheduling -# -# CONFIG_SPINLOCK is not set -# CONFIG_IRQCHAIN is not set -# CONFIG_IRQCOUNT is not set -# CONFIG_INIT_NONE is not set -CONFIG_INIT_ENTRYPOINT=y -# CONFIG_INIT_FILEPATH is not set -CONFIG_USER_ENTRYPOINT="nsh_main" -CONFIG_USERMAIN_PRIORITY=100 -CONFIG_RR_INTERVAL=0 -# CONFIG_SCHED_SPORADIC is not set -CONFIG_TASK_NAME_SIZE=24 -CONFIG_MAX_TASKS=32 -# CONFIG_SCHED_HAVE_PARENT is not set -CONFIG_SCHED_WAITPID=y - -# -# Pthread Options -# -CONFIG_NPTHREAD_KEYS=4 -# CONFIG_PTHREAD_MUTEX_TYPES is not set -CONFIG_PTHREAD_MUTEX_ROBUST=y -# CONFIG_PTHREAD_MUTEX_UNSAFE is not set -# CONFIG_PTHREAD_MUTEX_BOTH is not set -# CONFIG_PTHREAD_CLEANUP is not set -# CONFIG_CANCELLATION_POINTS is not set - -# -# Performance Monitoring -# -CONFIG_SCHED_SUSPENDSCHEDULER=y -CONFIG_SCHED_RESUMESCHEDULER=y -# CONFIG_SCHED_IRQMONITOR is not set -# CONFIG_SCHED_CRITMONITOR is not set -# CONFIG_SCHED_CPULOAD is not set -CONFIG_SCHED_INSTRUMENTATION=y -# CONFIG_SCHED_INSTRUMENTATION_PREEMPTION is not set -# CONFIG_SCHED_INSTRUMENTATION_CSECTION is not set -# CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS is not set -# CONFIG_SCHED_INSTRUMENTATION_BUFFER is not set - -# -# Files and I/O -# -CONFIG_DEV_CONSOLE=y -# CONFIG_FDCLONE_DISABLE is not set -CONFIG_FDCLONE_STDIO=y -CONFIG_SDCLONE_DISABLE=y -CONFIG_NFILE_DESCRIPTORS=54 -CONFIG_NFILE_STREAMS=8 -CONFIG_NAME_MAX=32 -CONFIG_PRIORITY_INHERITANCE=y -CONFIG_SEM_PREALLOCHOLDERS=0 -CONFIG_SEM_NNESTPRIO=8 - -# -# RTOS hooks -# -# CONFIG_BOARD_EARLY_INITIALIZE is not set -# CONFIG_BOARD_LATE_INITIALIZE is not set -# CONFIG_SCHED_STARTHOOK is not set -CONFIG_SCHED_ATEXIT=y -CONFIG_SCHED_ATEXIT_MAX=1 -# CONFIG_SCHED_ONEXIT is not set - -# -# Signal Configuration -# -# CONFIG_SIG_EVTHREAD is not set -CONFIG_SIG_DEFAULT=y - -# -# Per-signal Default Actions -# -CONFIG_SIG_SIGUSR1_ACTION=y -CONFIG_SIG_SIGUSR2_ACTION=y -CONFIG_SIG_SIGALRM_ACTION=y -CONFIG_SIG_SIGSTOP_ACTION=y -CONFIG_SIG_SIGKILL_ACTION=y - -# -# Signal Numbers -# - -# -# Standard Signal Numbers -# -CONFIG_SIG_SIGUSR1=1 -CONFIG_SIG_SIGUSR2=2 -CONFIG_SIG_SIGALRM=3 -CONFIG_SIG_STOP=6 -CONFIG_SIG_STP=7 -CONFIG_SIG_CONT=8 -CONFIG_SIG_KILL=9 -CONFIG_SIG_INT=10 - -# -# Non-standard Signal Numbers -# -CONFIG_SIG_SIGCONDTIMEDOUT=16 -CONFIG_SIG_SIGWORK=4 - -# -# POSIX Message Queue Options -# -CONFIG_PREALLOC_MQ_MSGS=4 -CONFIG_MQ_MAXMSGSIZE=32 -# CONFIG_MODULE is not set - -# -# Work queue support -# -CONFIG_SCHED_WORKQUEUE=y -# CONFIG_WQUEUE_NOTIFIER is not set -CONFIG_SCHED_HPWORK=y -CONFIG_SCHED_HPNTHREADS=1 -CONFIG_SCHED_HPWORKPRIORITY=249 -CONFIG_SCHED_HPWORKSTACKSIZE=1800 -CONFIG_SCHED_LPWORK=y -CONFIG_SCHED_LPNTHREADS=1 -CONFIG_SCHED_LPWORKPRIORITY=50 -CONFIG_SCHED_LPWORKPRIOMAX=176 -CONFIG_SCHED_LPWORKSTACKSIZE=1800 - -# -# Stack and heap information -# -CONFIG_IDLETHREAD_STACKSIZE=750 -CONFIG_USERMAIN_STACKSIZE=2500 -CONFIG_PTHREAD_STACK_MIN=512 -CONFIG_PTHREAD_STACK_DEFAULT=2048 -# CONFIG_LIB_SYSCALL is not set - -# -# Device Drivers -# -CONFIG_DEV_NULL=y -# CONFIG_DEV_ZERO is not set -# CONFIG_DEV_URANDOM is not set -# CONFIG_DEV_LOOP is not set - -# -# Buffering -# -# CONFIG_DRVR_WRITEBUFFER is not set -# CONFIG_DRVR_READAHEAD is not set -# CONFIG_RAMDISK is not set -# CONFIG_CAN is not set -# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set -# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set -# CONFIG_PWM is not set -CONFIG_ARCH_HAVE_I2CRESET=y -CONFIG_I2C=y -# CONFIG_I2C_SLAVE is not set -# CONFIG_I2C_POLLED is not set -CONFIG_I2C_RESET=y -# CONFIG_I2C_TRACE is not set -# CONFIG_I2C_DRIVER is not set - -# -# I2C Multiplexer Support -# -# CONFIG_I2CMULTIPLEXER_PCA9540BDP is not set -# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set -CONFIG_ARCH_HAVE_SPI_CS_CONTROL=y -# CONFIG_ARCH_HAVE_SPI_BITORDER is not set -CONFIG_SPI=y -# CONFIG_SPI_SLAVE is not set -CONFIG_SPI_EXCHANGE=y -# CONFIG_SPI_CMDDATA is not set -# CONFIG_SPI_CALLBACK is not set -# CONFIG_SPI_HWFEATURES is not set -# CONFIG_SPI_CS_CONTROL is not set -# CONFIG_SPI_CS_DELAY_CONTROL is not set -# CONFIG_SPI_TRIGGER is not set -CONFIG_SPI_DRIVER=y -# CONFIG_SPI_BITBANG is not set -# CONFIG_I2S is not set - -# -# Timer Driver Support -# -# CONFIG_TIMER is not set -# CONFIG_ONESHOT is not set -CONFIG_RTC=y -# CONFIG_RTC_DATETIME is not set -# CONFIG_RTC_HIRES is not set -# CONFIG_RTC_ALARM is not set -# CONFIG_RTC_DRIVER is not set -# CONFIG_RTC_EXTERNAL is not set -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" -# CONFIG_WATCHDOG_AUTOMONITOR is not set -# CONFIG_TIMERS_CS2100CP is not set -# CONFIG_ANALOG is not set -# CONFIG_DRIVERS_AUDIO is not set -# CONFIG_FB_CMAP is not set -# CONFIG_FB_TRANSPARENCY is not set -# CONFIG_DRIVERS_VIDEO is not set -# CONFIG_BCH is not set -# CONFIG_INPUT is not set - -# -# IO Expander/GPIO Support -# -# CONFIG_IOEXPANDER is not set -# CONFIG_DEV_GPIO is not set - -# -# LCD Driver Support -# -# CONFIG_LCD is not set - -# -# Character/Segment LCD Devices -# -# CONFIG_SLCD is not set - -# -# Other LCD-related Devices -# -# CONFIG_LCD_OTHER is not set - -# -# LED Support -# -# CONFIG_USERLED is not set -# CONFIG_LEDS_APA102 is not set -# CONFIG_LEDS_MAX7219 is not set -# CONFIG_RGBLED is not set -# CONFIG_PCA9635PW is not set -# CONFIG_NCP5623C is not set -CONFIG_ARCH_HAVE_SDIO=y -# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set -# CONFIG_ARCH_HAVE_SDIO_PREFLIGHT is not set -# CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT is not set -CONFIG_MMCSD=y -CONFIG_MMCSD_NSLOTS=1 -# CONFIG_MMCSD_READONLY is not set -# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set -CONFIG_MMCSD_MMCSUPPORT=y -CONFIG_MMCSD_HAVE_CARDDETECT=y -# CONFIG_MMCSD_HAVE_WRITEPROTECT is not set -# CONFIG_MMCSD_SPI is not set -CONFIG_SDIO_DMA=y -CONFIG_MMCSD_SDIO=y -# CONFIG_SDIO_MUXBUS is not set -# CONFIG_SDIO_WIDTH_D1_ONLY is not set -CONFIG_SDIO_BLOCKSETUP=y -# CONFIG_MODEM is not set -# CONFIG_MTD is not set -# CONFIG_EEPROM is not set -CONFIG_PIPES=y -CONFIG_DEV_PIPE_MAXSIZE=1024 -CONFIG_DEV_PIPE_SIZE=70 -CONFIG_DEV_FIFO_SIZE=0 -# CONFIG_PM is not set -# CONFIG_DRIVERS_POWERLED is not set -# CONFIG_DRIVERS_SMPS is not set -# CONFIG_DRIVERS_MOTOR is not set -# CONFIG_POWER is not set -# CONFIG_SENSORS is not set -CONFIG_SERIAL=y -# CONFIG_DEV_LOWCONSOLE is not set -CONFIG_SERIAL_REMOVABLE=y -CONFIG_SERIAL_CONSOLE=y -# CONFIG_16550_UART is not set -# CONFIG_OTHER_UART_SERIALDRIVER is not set -CONFIG_MCU_SERIAL=y -CONFIG_STANDARD_SERIAL=y -CONFIG_SERIAL_NPOLLWAITERS=2 -# CONFIG_SERIAL_IFLOWCONTROL is not set -# CONFIG_SERIAL_RS485CONTROL is not set -# CONFIG_SERIAL_OFLOWCONTROL is not set -# CONFIG_SERIAL_TXDMA is not set -# CONFIG_SERIAL_RXDMA is not set -CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y -CONFIG_SERIAL_TERMIOS=y -# CONFIG_TTY_SIGINT is not set -# CONFIG_TTY_SIGSTP is not set -# CONFIG_LPUART1_SERIAL_CONSOLE is not set -# CONFIG_LPUART2_SERIAL_CONSOLE is not set -CONFIG_LPUART3_SERIAL_CONSOLE=y -# CONFIG_OTHER_SERIAL_CONSOLE is not set -# CONFIG_NO_SERIAL_CONSOLE is not set -# CONFIG_UART_SERIALDRIVER is not set -# CONFIG_UART0_SERIALDRIVER is not set -# CONFIG_UART1_SERIALDRIVER is not set -# CONFIG_UART2_SERIALDRIVER is not set -# CONFIG_UART3_SERIALDRIVER is not set -# CONFIG_UART4_SERIALDRIVER is not set -# CONFIG_UART5_SERIALDRIVER is not set -# CONFIG_UART6_SERIALDRIVER is not set -# CONFIG_UART7_SERIALDRIVER is not set -# CONFIG_UART8_SERIALDRIVER is not set -# CONFIG_LPUART_SERIALDRIVER is not set -# CONFIG_LPUART0_SERIALDRIVER is not set -CONFIG_LPUART1_SERIALDRIVER=y -CONFIG_LPUART2_SERIALDRIVER=y -CONFIG_LPUART3_SERIALDRIVER=y -# CONFIG_LPUART4_SERIALDRIVER is not set -# CONFIG_LPUART5_SERIALDRIVER is not set -# CONFIG_LPUART6_SERIALDRIVER is not set -# CONFIG_LPUART7_SERIALDRIVER is not set -# CONFIG_LPUART8_SERIALDRIVER is not set - -# -# LPUART1 Configuration -# -CONFIG_LPUART1_RXBUFSIZE=256 -CONFIG_LPUART1_TXBUFSIZE=256 -CONFIG_LPUART1_BAUD=115200 -CONFIG_LPUART1_BITS=8 -CONFIG_LPUART1_PARITY=0 -CONFIG_LPUART1_2STOP=0 -CONFIG_LPUART1_NOIFLOWCONTROL=y -# CONFIG_LPUART1_RS485RTSCONTROL is not set -# CONFIG_LPUART1_IFLOWCONTROL is not set -# CONFIG_LPUART1_OFLOWCONTROL is not set -# CONFIG_LPUART1_DMA is not set - -# -# LPUART2 Configuration -# -CONFIG_LPUART2_RXBUFSIZE=600 -CONFIG_LPUART2_TXBUFSIZE=1500 -CONFIG_LPUART2_BAUD=115200 -CONFIG_LPUART2_BITS=8 -CONFIG_LPUART2_PARITY=0 -CONFIG_LPUART2_2STOP=0 -CONFIG_LPUART2_NOIFLOWCONTROL=y -# CONFIG_LPUART2_RS485RTSCONTROL is not set -# CONFIG_LPUART2_IFLOWCONTROL is not set -# CONFIG_LPUART2_OFLOWCONTROL is not set -CONFIG_LPUART2_DMA=y - -# -# LPUART3 Configuration -# -CONFIG_LPUART3_RXBUFSIZE=600 -CONFIG_LPUART3_TXBUFSIZE=3000 -CONFIG_LPUART3_BAUD=57600 -CONFIG_LPUART3_BITS=8 -CONFIG_LPUART3_PARITY=0 -CONFIG_LPUART3_2STOP=0 -CONFIG_LPUART3_NOIFLOWCONTROL=y -# CONFIG_LPUART3_RS485RTSCONTROL is not set -# CONFIG_LPUART3_IFLOWCONTROL is not set -# CONFIG_LPUART3_OFLOWCONTROL is not set -# CONFIG_LPUART3_DMA is not set -# CONFIG_USART0_SERIALDRIVER is not set -# CONFIG_USART1_SERIALDRIVER is not set -# CONFIG_USART2_SERIALDRIVER is not set -# CONFIG_USART3_SERIALDRIVER is not set -# CONFIG_USART4_SERIALDRIVER is not set -# CONFIG_USART5_SERIALDRIVER is not set -# CONFIG_USART6_SERIALDRIVER is not set -# CONFIG_USART7_SERIALDRIVER is not set -# CONFIG_USART8_SERIALDRIVER is not set -# CONFIG_USART9_SERIALDRIVER is not set -# CONFIG_SCI0_SERIALDRIVER is not set -# CONFIG_SCI1_SERIALDRIVER is not set -# CONFIG_PSEUDOTERM is not set -CONFIG_USBDEV=y - -# -# USB Device Controller Driver Options -# -# CONFIG_USBDEV_ISOCHRONOUS is not set -# CONFIG_USBDEV_DUALSPEED is not set -# CONFIG_USBDEV_SELFPOWERED is not set -CONFIG_USBDEV_BUSPOWERED=y -CONFIG_USBDEV_MAXPOWER=500 -# CONFIG_USBDEV_DMA is not set -# CONFIG_ARCH_USBDEV_STALLQUEUE is not set -# CONFIG_USBDEV_TRACE is not set -# CONFIG_USBDEV_CUSTOM_TXFIFO_SIZE is not set - -# -# USB Device Class Driver Options -# -# CONFIG_USBDEV_COMPOSITE is not set -# CONFIG_PL2303 is not set +CONFIG_BUILTIN=y +CONFIG_C99_BOOL8=y CONFIG_CDCACM=y -# CONFIG_CDCACM_CONSOLE is not set -# CONFIG_CDCACM_IFLOWCONTROL is not set -CONFIG_CDCACM_EP0MAXPACKET=64 -CONFIG_CDCACM_EPINTIN=1 -CONFIG_CDCACM_EPINTIN_FSSIZE=64 -CONFIG_CDCACM_EPINTIN_HSSIZE=64 -CONFIG_CDCACM_EPBULKOUT=3 -CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 -CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 -CONFIG_CDCACM_EPBULKIN=2 -CONFIG_CDCACM_EPBULKIN_FSSIZE=64 -CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NRDREQS=4 -CONFIG_CDCACM_NWRREQS=4 -CONFIG_CDCACM_BULKIN_REQLEN=96 +CONFIG_CDCACM_PRODUCTID=0x001d +CONFIG_CDCACM_PRODUCTSTR="PX4 FMURT1062 v1.x" CONFIG_CDCACM_RXBUFSIZE=600 CONFIG_CDCACM_TXBUFSIZE=12000 CONFIG_CDCACM_VENDORID=0x1FC9 -CONFIG_CDCACM_PRODUCTID=0x001d CONFIG_CDCACM_VENDORSTR="NXP SEMICONDUCTORS" -CONFIG_CDCACM_PRODUCTSTR="PX4 FMURT1062 v1.x" -# CONFIG_USBMSC is not set -# CONFIG_RNDIS is not set -# CONFIG_DFU is not set -# CONFIG_NET_CDCECM is not set -# CONFIG_USBHOST is not set -# CONFIG_USBMISC is not set -# CONFIG_HAVE_USBTRACE is not set -# CONFIG_DRIVERS_WIRELESS is not set -# CONFIG_DRIVERS_CONTACTLESS is not set -# CONFIG_1WIRE is not set - -# -# System Logging -# -# CONFIG_ARCH_SYSLOG is not set -CONFIG_SYSLOG_WRITE=y -# CONFIG_RAMLOG is not set -# CONFIG_SYSLOG_BUFFER is not set -# CONFIG_SYSLOG_INTBUFFER is not set -# CONFIG_SYSLOG_TIMESTAMP is not set -# CONFIG_SYSLOG_PREFIX is not set -CONFIG_SYSLOG_SERIAL_CONSOLE=y -# CONFIG_SYSLOG_CHAR is not set -CONFIG_SYSLOG_CONSOLE=y -# CONFIG_SYSLOG_NONE is not set -# CONFIG_SYSLOG_FILE is not set -# CONFIG_SYSLOG_CHARDEV is not set - -# -# Networking Support -# -# CONFIG_ARCH_HAVE_NET is not set -# CONFIG_ARCH_HAVE_PHY is not set -# CONFIG_NET_WRITE_BUFFERS is not set -# CONFIG_NET_READAHEAD is not set -# CONFIG_NET_MCASTGROUP is not set -# CONFIG_NET is not set - -# -# Crypto API -# -# CONFIG_CRYPTO is not set - -# -# File Systems -# - -# -# File system configuration -# -# CONFIG_DISABLE_MOUNTPOINT is not set -# CONFIG_FS_AUTOMOUNTER is not set -# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set -# CONFIG_PSEUDOFS_SOFTLINKS is not set -CONFIG_FS_READABLE=y -CONFIG_FS_WRITABLE=y -# CONFIG_FS_AIO is not set -# CONFIG_FS_NAMED_SEMAPHORES is not set -CONFIG_FS_MQUEUE_MPATH="/var/mqueue" -# CONFIG_FS_RAMMAP is not set - -# -# Partition Table -# -# CONFIG_PTABLE_PARTITION is not set -CONFIG_FS_FAT=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_HARDFAULT_ALERT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEFAULT_SMALL=y +CONFIG_DEV_FIFO_SIZE=0 +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=70 +CONFIG_FAT_DMAMEMORY=y CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y -CONFIG_FAT_MAXFNAME=32 CONFIG_FAT_LFN_ALIAS_HASH=y -CONFIG_FAT_LFN_ALIAS_TRAILCHARS=0 -CONFIG_FS_FATTIME=y -# CONFIG_FAT_FORCE_INDIRECT is not set -CONFIG_FAT_DMAMEMORY=y -CONFIG_FAT_DIRECT_RETRY=y -# CONFIG_FS_NXFFS is not set -CONFIG_FS_ROMFS=y -CONFIG_FS_CROMFS=y -# CONFIG_FS_TMPFS is not set -# CONFIG_FS_SMARTFS is not set +CONFIG_FDCLONE_STDIO=y CONFIG_FS_BINFS=y +CONFIG_FS_CROMFS=y +CONFIG_FS_FAT=y +CONFIG_FS_FATTIME=y CONFIG_FS_PROCFS=y -CONFIG_FS_PROCFS_REGISTER=y - -# -# Exclude individual procfs entries -# -# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set -CONFIG_FS_PROCFS_EXCLUDE_ENVIRON=y CONFIG_FS_PROCFS_EXCLUDE_BLOCKS=y CONFIG_FS_PROCFS_EXCLUDE_MOUNT=y -CONFIG_FS_PROCFS_EXCLUDE_USAGE=y -# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set -CONFIG_FS_PROCFS_EXCLUDE_VERSION=y -# CONFIG_FS_PROCFS_EXCLUDE_MEMINFO is not set CONFIG_FS_PROCFS_EXCLUDE_MOUNTS=y -# CONFIG_FS_SPIFFS is not set -# CONFIG_FS_LITTLEFS is not set -# CONFIG_FS_UNIONFS is not set -# CONFIG_FS_HOSTFS is not set - -# -# Graphics Support -# -# CONFIG_NX is not set -# CONFIG_NXFONTS is not set - -# -# Font Cache Pixel Depths -# -CONFIG_NXFONTS_DISABLE_1BPP=y -CONFIG_NXFONTS_DISABLE_2BPP=y -CONFIG_NXFONTS_DISABLE_4BPP=y -CONFIG_NXFONTS_DISABLE_8BPP=y -CONFIG_NXFONTS_DISABLE_16BPP=y -CONFIG_NXFONTS_DISABLE_24BPP=y -CONFIG_NXFONTS_DISABLE_32BPP=y -CONFIG_NXFONTS_PACKEDMSFIRST=y -# CONFIG_NXGLIB is not set - -# -# Memory Management -# -# CONFIG_MM_SMALL is not set -CONFIG_MM_REGIONS=1 -# CONFIG_ARCH_HAVE_HEAP2 is not set +CONFIG_FS_PROCFS_EXCLUDE_USAGE=y +CONFIG_FS_PROCFS_REGISTER=y +CONFIG_FS_ROMFS=y CONFIG_GRAN=y CONFIG_GRAN_INTR=y -# CONFIG_MM_FILL_ALLOCATIONS is not set - -# -# Common I/O Buffer Support -# -# CONFIG_MM_IOB is not set - -# -# Audio Support -# -# CONFIG_AUDIO is not set - -# -# Wireless Support -# -# CONFIG_WIRELESS is not set - -# -# Binary Loader -# -# CONFIG_BINFMT_DISABLE is not set -# CONFIG_BINFMT_LOADABLE is not set -# CONFIG_PIC is not set -# CONFIG_NXFLAT is not set -# CONFIG_ELF is not set -CONFIG_BUILTIN=y -# CONFIG_SYMTAB_ORDEREDBYNAME is not set - -# -# Library Routines -# - -# -# Standard C Library Options -# - -# -# Standard C I/O -# -# CONFIG_STDIO_DISABLE_BUFFERING is not set -CONFIG_STDIO_BUFFER_SIZE=32 -CONFIG_STDIO_LINEBUFFER=y -CONFIG_NUNGET_CHARS=2 -# CONFIG_LIBC_PRINT_LEGACY is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_I2C=y +CONFIG_I2C_RESET=y +CONFIG_IDLETHREAD_STACKSIZE=750 +CONFIG_IMXRT_EDMA=y +CONFIG_IMXRT_LPSPI3=y +CONFIG_IMXRT_LPUART1=y +CONFIG_IMXRT_LPUART2=y +CONFIG_IMXRT_LPUART3=y +CONFIG_IMXRT_LPUART_INVERT=y +CONFIG_IMXRT_RTC_MAGIC_REG=1 +CONFIG_IMXRT_SNVS_LPSRTC=y +CONFIG_IMXRT_USDHC1=y CONFIG_LIBC_FLOATINGPOINT=y CONFIG_LIBC_LONG_LONG=y -# CONFIG_LIBC_NUMBERED_ARGS is not set -# CONFIG_LIBC_SCANSET is not set -# CONFIG_EOL_IS_CR is not set -# CONFIG_EOL_IS_LF is not set -# CONFIG_EOL_IS_BOTH_CRLF is not set -CONFIG_EOL_IS_EITHER_CRLF=y - -# -# Architecture-Specific Support -# -CONFIG_ARCH_LOWPUTC=y -# CONFIG_ARCH_ROMGETC is not set -CONFIG_LIBC_ARCH_MEMCPY=y -# CONFIG_LIBC_ARCH_MEMCMP is not set -# CONFIG_LIBC_ARCH_MEMMOVE is not set -# CONFIG_LIBC_ARCH_MEMSET is not set -# CONFIG_LIBC_ARCH_STRCHR is not set -# CONFIG_LIBC_ARCH_STRCMP is not set -# CONFIG_LIBC_ARCH_STRCPY is not set -# CONFIG_LIBC_ARCH_STRNCPY is not set -# CONFIG_LIBC_ARCH_STRLEN is not set -# CONFIG_LIBC_ARCH_STRNLEN is not set -# CONFIG_LIBC_ARCH_ELF is not set -CONFIG_ARMV7M_MEMCPY=y - -# -# stdlib Options -# -CONFIG_LIB_RAND_ORDER=1 -CONFIG_LIB_HOMEDIR="/" -CONFIG_LIBC_TMPDIR="/tmp" -CONFIG_LIBC_MAX_TMPFILE=32 - -# -# Program Execution Options -# -# CONFIG_LIBC_EXECFUNCS is not set -CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 -CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 -CONFIG_LIB_HOSTNAME="" - -# -# errno Decode Support -# CONFIG_LIBC_STRERROR=y -# CONFIG_LIBC_STRERROR_SHORT is not set -# CONFIG_LIBC_PERROR_STDOUT is not set - -# -# memcpy/memset Options -# -CONFIG_MEMSET_OPTSPEED=y +CONFIG_LPUART2_DMA=y +CONFIG_LPUART2_RXBUFSIZE=600 +CONFIG_LPUART2_TXBUFSIZE=1500 +CONFIG_LPUART3_BAUD=57600 +CONFIG_LPUART3_RXBUFSIZE=600 +CONFIG_LPUART3_SERIAL_CONSOLE=y +CONFIG_LPUART3_TXBUFSIZE=3000 +CONFIG_MAX_WDOGPARMS=2 CONFIG_MEMSET_64BIT=y - -# -# pthread support -# -# CONFIG_LIBC_DLFCN is not set -# CONFIG_LIBC_MODLIB is not set -# CONFIG_LIBC_WCHAR is not set -# CONFIG_LIBC_LOCALE is not set -CONFIG_LIBC_LZF=y -CONFIG_LIBC_LZF_SMALL=y -# CONFIG_LIBC_LZF_FAST is not set -# CONFIG_LIBC_LZF_FASTEST is not set -CONFIG_LIBC_LZF_HLOG=13 -CONFIG_LIBC_LZF_ALIGN=y - -# -# Time/Time Zone Support -# -# CONFIG_LIBC_LOCALTIME is not set -CONFIG_TIME_EXTENDED=y -CONFIG_ARCH_HAVE_TLS=y - -# -# Thread Local Storage (TLS) -# -# CONFIG_TLS is not set - -# -# Network-Related Options -# -# CONFIG_LIBC_IPv4_ADDRCONV is not set -# CONFIG_LIBC_IPv6_ADDRCONV is not set -# CONFIG_LIBC_NETDB is not set - -# -# NETDB Support -# -# CONFIG_LIBC_GAISTRERROR is not set -# CONFIG_NETDB_HOSTFILE is not set -# CONFIG_LIBC_IOCTL_VARIADIC is not set -CONFIG_LIB_SENDFILE_BUFSIZE=512 - -# -# Non-standard Library Support -# -# CONFIG_LIB_CRC64_FAST is not set -# CONFIG_LIB_KBDCODEC is not set -# CONFIG_LIB_SLCDCODEC is not set -# CONFIG_LIB_ENVPATH is not set -# CONFIG_LIB_HEX2BIN is not set - -# -# Basic CXX Support -# -CONFIG_C99_BOOL8=y -CONFIG_HAVE_CXX=y -# CONFIG_CXX_NEWLONG is not set - -# -# LLVM C++ Library (libcxx) -# -# CONFIG_LIBCXX is not set - -# -# uClibc++ Standard C++ Library -# -# CONFIG_UCLIBCXX is not set -# CONFIG_LIBDSP is not set - -# -# Application Configuration -# - -# -# Built-In Applications -# -CONFIG_BUILTIN_PROXY_STACKSIZE=1024 - -# -# CAN Utilities -# - -# -# Examples -# -# CONFIG_EXAMPLES_ABNTCODI is not set -# CONFIG_EXAMPLES_ADXL372_TEST is not set -# CONFIG_EXAMPLES_APA102 is not set -# CONFIG_EXAMPLES_BATTERY is not set -# CONFIG_EXAMPLES_CALIB_UDELAY is not set -# CONFIG_EXAMPLES_CCTYPE is not set -# CONFIG_EXAMPLES_CHAT is not set -# CONFIG_EXAMPLES_CONFIGDATA is not set -# CONFIG_EXAMPLES_CPUHOG is not set -# CONFIG_EXAMPLES_CROMFS is not set -# CONFIG_EXAMPLES_DHCPD is not set -# CONFIG_EXAMPLES_DHTXX is not set -# CONFIG_EXAMPLES_DSPTEST is not set -# CONFIG_EXAMPLES_FLOWC is not set -# CONFIG_EXAMPLES_FTPC is not set -# CONFIG_EXAMPLES_FTPD is not set -# CONFIG_EXAMPLES_GPS is not set -# CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_IGMP is not set -# CONFIG_EXAMPLES_INA219 is not set -# CONFIG_EXAMPLES_INA226 is not set -# CONFIG_EXAMPLES_LSM330SPI_TEST is not set -# CONFIG_EXAMPLES_LVGLDEMO is not set -# CONFIG_EXAMPLES_MAX31855 is not set -# CONFIG_EXAMPLES_MEDIA is not set -# CONFIG_EXAMPLES_MLX90614 is not set -# CONFIG_EXAMPLES_MM is not set -# CONFIG_EXAMPLES_MODBUS is not set -# CONFIG_EXAMPLES_MODBUSMASTER is not set -# CONFIG_EXAMPLES_MOUNT is not set -# CONFIG_EXAMPLES_NULL is not set -# CONFIG_EXAMPLES_NXDEMO is not set -# CONFIG_EXAMPLES_OBD2 is not set -# CONFIG_EXAMPLES_PCA9635 is not set -# CONFIG_EXAMPLES_PDCURSES is not set -# CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_POWERLED is not set -# CONFIG_EXAMPLES_POWERMONITOR is not set -# CONFIG_EXAMPLES_PPPD is not set -# CONFIG_EXAMPLES_RFID_READUID is not set -# CONFIG_EXAMPLES_RGBLED is not set -# CONFIG_EXAMPLES_ROMFS is not set -# CONFIG_EXAMPLES_SENDMAIL is not set -# CONFIG_EXAMPLES_SERIALBLASTER is not set -# CONFIG_EXAMPLES_SERIALRX is not set -# CONFIG_EXAMPLES_SERLOOP is not set -# CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMPS is not set -# CONFIG_EXAMPLES_STAT is not set -# CONFIG_EXAMPLES_TCPECHO is not set -# CONFIG_EXAMPLES_THTTPD is not set -# CONFIG_EXAMPLES_TIFF is not set -# CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_UNIONFS is not set -# CONFIG_EXAMPLES_USBSERIAL is not set -# CONFIG_EXAMPLES_USERFS is not set -# CONFIG_EXAMPLES_WATCHDOG is not set -# CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_XBC_TEST is not set - -# -# File System Utilities -# -# CONFIG_FSUTILS_INIFILE is not set -# CONFIG_FSUTILS_INIH is not set -CONFIG_FSUTILS_MKFATFS=y -# CONFIG_FSUTILS_PASSWD is not set - -# -# GPS Utilities -# -# CONFIG_GPSUTILS_MINMEA_LIB is not set - -# -# Graphics Support -# -# CONFIG_GRAPHICS_FT80X is not set -# CONFIG_GRAPHICS_LVGL is not set - -# -# NxWidgets -# - -# -# NxWM -# -# CONFIG_GRAPHICS_PDCURSES is not set -# CONFIG_TIFF is not set - -# -# Industrial Applications -# -# CONFIG_INDUSTRY_ABNT_CODI_LIB is not set - -# -# Interpreters -# -# CONFIG_INTERPRETERS_BAS is not set -# CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_MINIBASIC is not set -# CONFIG_INTERPRETERS_PCODE is not set - -# -# FreeModBus -# -# CONFIG_MODBUS is not set - -# -# Network Utilities -# -# CONFIG_NETUTILS_CHAT is not set -# CONFIG_NETUTILS_CJSON is not set -# CONFIG_NETUTILS_CODECS is not set -# CONFIG_NETUTILS_ESP8266 is not set -# CONFIG_NETUTILS_FTPC is not set -# CONFIG_NETUTILS_SMTP is not set -# CONFIG_NETUTILS_THTTPD is not set - -# -# NSH Library -# -CONFIG_NSH_LIBRARY=y -# CONFIG_NSH_MOTD is not set - -# -# Command Line Configuration -# -CONFIG_NSH_PROMPT_STRING="nsh> " -CONFIG_NSH_READLINE=y -# CONFIG_NSH_CLE is not set -CONFIG_NSH_LINELEN=128 -# CONFIG_NSH_DISABLE_SEMICOLON is not set -CONFIG_NSH_QUOTE=y -CONFIG_NSH_CMDPARMS=y -CONFIG_NSH_MAXARGUMENTS=12 +CONFIG_MEMSET_OPTSPEED=y +CONFIG_MMCSD=y +CONFIG_MMCSD_SDIO=y +CONFIG_NFILE_DESCRIPTORS=54 +CONFIG_NFILE_STREAMS=8 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_ARCHROMFS=y CONFIG_NSH_ARGCAT=y -CONFIG_NSH_NESTDEPTH=8 -# CONFIG_NSH_DISABLEBG is not set CONFIG_NSH_BUILTIN_APPS=y - -# -# Disable Individual commands -# -CONFIG_NSH_DISABLE_BASENAME=y -# CONFIG_NSH_DISABLE_CAT is not set -# CONFIG_NSH_DISABLE_CD is not set -# CONFIG_NSH_DISABLE_CP is not set -CONFIG_NSH_DISABLE_CMP=y -# CONFIG_NSH_DISABLE_DATE is not set -CONFIG_NSH_DISABLE_DD=y -# CONFIG_NSH_DISABLE_DF is not set -CONFIG_NSH_DISABLE_DIRNAME=y -# CONFIG_NSH_DISABLE_ECHO is not set -# CONFIG_NSH_DISABLE_ENV is not set -# CONFIG_NSH_DISABLE_EXEC is not set -# CONFIG_NSH_DISABLE_EXIT is not set -# CONFIG_NSH_DISABLE_EXPORT is not set -# CONFIG_NSH_DISABLE_FREE is not set -# CONFIG_NSH_DISABLE_GET is not set -# CONFIG_NSH_DISABLE_HELP is not set -CONFIG_NSH_DISABLE_HEXDUMP=y +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_CROMFSETC=y CONFIG_NSH_DISABLE_IFCONFIG=y CONFIG_NSH_DISABLE_IFUPDOWN=y -# CONFIG_NSH_DISABLE_KILL is not set -CONFIG_NSH_DISABLE_LOSETUP=y -CONFIG_NSH_DISABLE_LOSMART=y -# CONFIG_NSH_DISABLE_LS is not set CONFIG_NSH_DISABLE_MB=y -# CONFIG_NSH_DISABLE_MKDIR is not set -CONFIG_NSH_DISABLE_MKFIFO=y -CONFIG_NSH_DISABLE_MKRD=y CONFIG_NSH_DISABLE_MH=y -# CONFIG_NSH_DISABLE_MOUNT is not set -# CONFIG_NSH_DISABLE_MV is not set -# CONFIG_NSH_DISABLE_MW is not set -CONFIG_NSH_DISABLE_PRINTF=y -# CONFIG_NSH_DISABLE_PS is not set CONFIG_NSH_DISABLE_PSSTACKUSAGE=y -CONFIG_NSH_DISABLE_PUT=y -# CONFIG_NSH_DISABLE_PWD is not set -CONFIG_NSH_DISABLE_REBOOT=y -# CONFIG_NSH_DISABLE_RM is not set -# CONFIG_NSH_DISABLE_RMDIR is not set -# CONFIG_NSH_DISABLE_SET is not set -# CONFIG_NSH_DISABLE_SH is not set -CONFIG_NSH_DISABLE_SHUTDOWN=y -# CONFIG_NSH_DISABLE_SLEEP is not set -# CONFIG_NSH_DISABLE_TIME is not set -# CONFIG_NSH_DISABLE_TEST is not set CONFIG_NSH_DISABLE_TELNETD=y -CONFIG_NSH_DISABLE_TRUNCATE=y -# CONFIG_NSH_DISABLE_UMOUNT is not set -CONFIG_NSH_DISABLE_UNAME=y -# CONFIG_NSH_DISABLE_UNSET is not set -# CONFIG_NSH_DISABLE_USLEEP is not set -CONFIG_NSH_DISABLE_WGET=y -CONFIG_NSH_DISABLE_XD=y -CONFIG_NSH_MMCSDMINOR=0 -CONFIG_NSH_MMCSDSLOTNO=0 - -# -# Configure Command Options -# -CONFIG_NSH_VARS=y -CONFIG_NSH_CODECS_BUFSIZE=128 -CONFIG_NSH_PROC_MOUNTPOINT="/proc" -CONFIG_NSH_FILEIOSIZE=512 -CONFIG_NSH_STRERROR=y - -# -# Scripting Support -# -# CONFIG_NSH_DISABLESCRIPT is not set -# CONFIG_NSH_DISABLE_ITEF is not set -# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_LINELEN=128 +CONFIG_NSH_MAXARGUMENTS=12 +CONFIG_NSH_NESTDEPTH=8 +CONFIG_NSH_QUOTE=y CONFIG_NSH_ROMFSETC=y -CONFIG_NSH_CROMFSETC=y -# CONFIG_NSH_ROMFSRC is not set -CONFIG_NSH_ROMFSMOUNTPT="/etc" -CONFIG_NSH_INITSCRIPT="init.d/rcS" -CONFIG_NSH_ROMFSDEVNO=0 CONFIG_NSH_ROMFSSECTSIZE=128 -# CONFIG_NSH_DEFAULTROMFS is not set -CONFIG_NSH_ARCHROMFS=y -# CONFIG_NSH_CUSTOMROMFS is not set -CONFIG_NSH_FATDEVNO=1 -CONFIG_NSH_FATSECTSIZE=512 -CONFIG_NSH_FATNSECTORS=1024 -CONFIG_NSH_FATMOUNTPT="/tmp" - -# -# Console Configuration -# -CONFIG_NSH_CONSOLE=y -# CONFIG_NSH_USBCONSOLE is not set -# CONFIG_NSH_ALTCONDEV is not set -CONFIG_NSH_ARCHINIT=y -# CONFIG_NSH_LOGIN is not set -# CONFIG_NSH_CONSOLE_LOGIN is not set - -# -# Platform-specific Support -# -# CONFIG_PLATFORM_CONFIGDATA is not set -CONFIG_HAVE_CXXINITIALIZE=y - -# -# System Libraries and NSH Add-Ons -# +CONFIG_NSH_STRERROR=y +CONFIG_NSH_VARS=y +CONFIG_NXFONTS_DISABLE_16BPP=y +CONFIG_NXFONTS_DISABLE_1BPP=y +CONFIG_NXFONTS_DISABLE_24BPP=y +CONFIG_NXFONTS_DISABLE_2BPP=y +CONFIG_NXFONTS_DISABLE_32BPP=y +CONFIG_NXFONTS_DISABLE_4BPP=y +CONFIG_NXFONTS_DISABLE_8BPP=y +CONFIG_PIPES=y +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_PREALLOC_TIMERS=50 +CONFIG_PREALLOC_WDOGS=50 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_PTHREAD_MUTEX_ROBUST=y +CONFIG_PTHREAD_STACK_MIN=512 +CONFIG_RAM_SIZE=1048576 +CONFIG_RAM_START=0x20200000 +CONFIG_RAW_BINARY=y +CONFIG_RTC=y +CONFIG_SCHED_ATEXIT=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=249 +CONFIG_SCHED_HPWORKSTACKSIZE=1800 +CONFIG_SCHED_INSTRUMENTATION=y +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPWORKPRIORITY=50 +CONFIG_SCHED_LPWORKSTACKSIZE=1800 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SDIO_BLOCKSETUP=y +CONFIG_SEM_NNESTPRIO=8 +CONFIG_SEM_PREALLOCHOLDERS=0 +CONFIG_SERIAL_TERMIOS=y +CONFIG_SIG_DEFAULT=y +CONFIG_SIG_SIGALRM_ACTION=y +CONFIG_SIG_SIGUSR1_ACTION=y +CONFIG_SIG_SIGUSR2_ACTION=y +CONFIG_SIG_SIGWORK=4 +CONFIG_SPI=y +CONFIG_STACK_COLORATION=y +CONFIG_START_DAY=30 +CONFIG_START_MONTH=11 +CONFIG_STDIO_BUFFER_SIZE=32 CONFIG_SYSTEM_CDCACM=y -CONFIG_SYSTEM_CDCACM_DEVMINOR=0 -# CONFIG_SYSTEM_CLE is not set -# CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_EMBEDLOG is not set -# CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_SYSTEM_HEXED is not set -# CONFIG_SYSTEM_I2CTOOL is not set -# CONFIG_SYSTEM_LZF is not set CONFIG_SYSTEM_NSH=y -CONFIG_SYSTEM_NSH_PRIORITY=100 -CONFIG_SYSTEM_NSH_STACKSIZE=2048 -# CONFIG_SYSTEM_NSH_CXXINITIALIZE is not set -# CONFIG_SYSTEM_POPEN is not set -# CONFIG_SYSTEM_RAMTEST is not set -CONFIG_READLINE_HAVE_EXTMATCH=y -CONFIG_SYSTEM_READLINE=y -CONFIG_READLINE_ECHO=y -# CONFIG_READLINE_TABCOMPLETION is not set -# CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_SETLOGMASK is not set CONFIG_SYSTEM_SPITOOL=y -CONFIG_SPITOOL_PRIORITY=100 -CONFIG_SPITOOL_STACKSIZE=2048 -CONFIG_SPITOOL_MINBUS=0 -CONFIG_SPITOOL_MAXBUS=3 -CONFIG_SPITOOL_DEFFREQ=4000000 -CONFIG_SPITOOL_DEFMODE=0 -CONFIG_SPITOOL_DEFWIDTH=8 -CONFIG_SPITOOL_DEFWORDS=1 -# CONFIG_SYSTEM_STACKMONITOR is not set -# CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_SYSTEM is not set -# CONFIG_SYSTEM_TEE is not set -# CONFIG_SYSTEM_TERMCURSES is not set -# CONFIG_SYSTEM_UBLOXMODEM is not set -# CONFIG_SYSTEM_VI is not set -# CONFIG_SYSTEM_ZMODEM is not set - -# -# Testing -# -# CONFIG_TESTINGCXXTEST is not set -# CONFIG_TESTING_FSTEST is not set -# CONFIG_TESTING_NXFFS is not set -# CONFIG_TESTING_OSTEST is not set -# CONFIG_TESTING_SCANFTEST is not set -# CONFIG_TESTING_SMART is not set -# CONFIG_TESTING_SMART_TEST is not set -# CONFIG_TESTING_UNITY is not set - -# -# Wireless Libraries and NSH Add-Ons -# - -# -# Bluetooth applications -# -# CONFIG_BTSAK is not set - -# -# IEEE 802.15.4 applications -# -# CONFIG_IEEE802154_LIBMAC is not set -# CONFIG_IEEE802154_LIBUTILS is not set -# CONFIG_IEEE802154_I8SAK is not set +CONFIG_TASK_NAME_SIZE=24 +CONFIG_TIME_EXTENDED=y +CONFIG_USBDEV=y +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +CONFIG_USEC_PER_TICK=1000 +CONFIG_USERMAIN_STACKSIZE=2500 +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_WATCHDOG=y diff --git a/boards/nxp/fmurt1062-v1/nuttx-config/scripts/ld.script b/boards/nxp/fmurt1062-v1/nuttx-config/scripts/script.ld similarity index 100% rename from boards/nxp/fmurt1062-v1/nuttx-config/scripts/ld.script rename to boards/nxp/fmurt1062-v1/nuttx-config/scripts/script.ld diff --git a/boards/nxp/fmurt1062-v1/src/board_config.h b/boards/nxp/fmurt1062-v1/src/board_config.h index 999bbcf64541..14ee9e9a5244 100644 --- a/boards/nxp/fmurt1062-v1/src/board_config.h +++ b/boards/nxp/fmurt1062-v1/src/board_config.h @@ -607,6 +607,7 @@ } #endif //defined(ON_EVK) +#define BOARD_ENABLE_CONSOLE_BUFFER __BEGIN_DECLS /**************************************************************************************************** diff --git a/boards/nxp/fmurt1062-v1/src/init.c b/boards/nxp/fmurt1062-v1/src/init.c index d73b4016931a..95a66027a26e 100644 --- a/boards/nxp/fmurt1062-v1/src/init.c +++ b/boards/nxp/fmurt1062-v1/src/init.c @@ -45,9 +45,7 @@ * Included Files ****************************************************************************/ -#include -#include -#include +#include "board_config.h" #include #include @@ -55,6 +53,7 @@ #include #include +#include #include #include #include @@ -73,12 +72,9 @@ #include #include - #include - #include - -#include "up_internal.h" +#include /**************************************************************************** * Pre-Processor Definitions From ef75acfd6a2eb4c7104e1bd899638f8b5d0e1111 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Sat, 13 Jul 2019 10:32:45 -0700 Subject: [PATCH 12/12] Update Nuttx and to 7.30+ w/PX4 imxrt contrib --- platforms/nuttx/NuttX/nuttx | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platforms/nuttx/NuttX/nuttx b/platforms/nuttx/NuttX/nuttx index 324969142b92..4da872f05997 160000 --- a/platforms/nuttx/NuttX/nuttx +++ b/platforms/nuttx/NuttX/nuttx @@ -1 +1 @@ -Subproject commit 324969142b926e54b611fb5869689b559b1db803 +Subproject commit 4da872f0599791575269f7f40fee80f0ace986c5