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add/review serial port mapping for all boards #417

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dagar opened this issue Jan 16, 2019 · 3 comments · Fixed by #672
Closed
6 tasks

add/review serial port mapping for all boards #417

dagar opened this issue Jan 16, 2019 · 3 comments · Fixed by #672
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@dagar
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dagar commented Jan 16, 2019

PX4/PX4-Autopilot#11044

Until recently PX4/Firmware carried simple serial port mapping documentation in the init scripts. https://github.com/PX4/Firmware/blob/82aa24adfca29321cfd1209e287eab6c2b16780e/ROMFS/px4fmu_common/init.d/rcS#L16-L40
image

After the board reorganization it was decided this should exist only in the official user guide documentation.

Let's go through each currently supported board and make sure equivalent serial port mapping exists in the user guide.

https://docs.px4.io/en/flight_controller/

  • pixhawk 1
  • pixracer
  • pixhawk 2
  • pixhawk 3 pro
  • pixhawk 4
  • pixhawk 4 mini
    etc
@davids5
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davids5 commented Jan 16, 2019

# UART mapping on OMNIBUSF4SD:
#
# USART1		/dev/ttyS0		SerialRX
# USART4		/dev/ttyS1		TELEM1
# USART6		/dev/ttyS2		GPS
#
# UART mapping on FMUv2/3/4:
#
# UART1			/dev/ttyS0		IO debug (except v4, there ttyS0 is the wifi)
# USART2		/dev/ttyS1		TELEM1 (flow control)
# USART3		/dev/ttyS2		TELEM2 (flow control)
# UART4
# UART7							CONSOLE
# UART8							SERIAL4
#
#
# UART mapping on FMUv5:
#
# UART1			/dev/ttyS0		GPS
# USART2		/dev/ttyS1		TELEM1 (flow control)
# USART3		/dev/ttyS2		TELEM2 (flow control)
# UART4			/dev/ttyS3		TELEM4
# USART6		/dev/ttyS4		TX is RC input from sbus_RC connector *
# UART7			/dev/ttyS5		CONSOLE
# UART8			/dev/ttyS6		PX4IO if present

*From a HW perspective USART6 could be used as a third telem port with HW handshaking OR for Serial based RC protocols (SBUS,SUMD...). In the case as built for pixhawk 4 Hardware the RX, RTS and CTS are not connected. The TX is used as an RX in Single wire mode. This is to enable support for SBUS2 which is not supported as of this writing in FW.

When the PX4IO is not present the FMU (F7) manages the RC and Safety features. When the PX4IO is present the FMU initializes this pins to benign states. Fail over was envisioned but not implemented.

@hamishwillee
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Don't forget this one gentlemen

@dagar dagar pinned this issue Jan 31, 2019
@davids5
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davids5 commented Feb 28, 2020

@dagar did this make it somewhere?

@hamishwillee hamishwillee mentioned this issue Mar 4, 2020
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@hamishwillee hamishwillee unpinned this issue Jun 30, 2023
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4 participants