From 1d6b5ed922ca7fe30a04dc8f1fbb5c554a011511 Mon Sep 17 00:00:00 2001 From: JamieTx Date: Tue, 14 Jan 2025 17:45:17 +0800 Subject: [PATCH] Add some bsp drivers for F448, F472 and add bsp test codes. --- bsp/hc32/ev_hc32f448_lqfp80/.config | 280 +- bsp/hc32/ev_hc32f448_lqfp80/.cproject | 22 +- bsp/hc32/ev_hc32f448_lqfp80/.project | 10 + bsp/hc32/ev_hc32f448_lqfp80/README.md | 52 +- bsp/hc32/ev_hc32f448_lqfp80/SConstruct | 8 +- bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig | 37 +- bsp/hc32/ev_hc32f448_lqfp80/board/SConscript | 12 +- bsp/hc32/ev_hc32f448_lqfp80/board/board.c | 22 +- .../ev_hc32f448_lqfp80/board/board_config.c | 126 +- .../ev_hc32f448_lqfp80/board/board_config.h | 46 +- .../board/config/adc_config.h | 7 +- .../board/config/can_config.h | 381 +- .../board/config/dac_config.h | 12 +- .../board/config/dma_config.h | 10 + .../board/config/irq_config.h | 68 +- .../board/config/pulse_encoder_config.h | 436 +- .../board/config/pwm_tmr_config.h | 218 - .../board/config/qspi_config.h | 7 +- .../ev_hc32f448_lqfp80/board/drv_config.h | 3 +- .../ev_hc32f448_lqfp80/board/hc32f4xx_conf.h | 2 +- .../ev_hc32f448_lqfp80/board/ports/SConscript | 12 - .../board/ports/drv_spi_flash.c | 122 - .../board/ports/fal/SConscript | 20 - .../board/ports/fal/fal_flash_sfud_port.c | 85 - .../board/ports/{fal => }/fal_cfg.h | 0 .../ev_hc32f448_lqfp80/board/ports/tca9539.c | 320 - .../ev_hc32f448_lqfp80/board/ports/tca9539.h | 133 - .../board/ports/tca9539_port.h | 62 + .../jlink/ev_hc32f448_lqfp80 Debug.launch | 2 +- bsp/hc32/ev_hc32f448_lqfp80/project.ewd | 40 +- bsp/hc32/ev_hc32f448_lqfp80/project.ewp | 197 +- bsp/hc32/ev_hc32f448_lqfp80/project.uvoptx | 8 +- bsp/hc32/ev_hc32f448_lqfp80/project.uvprojx | 319 +- bsp/hc32/ev_hc32f448_lqfp80/rtconfig.h | 151 +- bsp/hc32/ev_hc32f448_lqfp80/template.uvoptx | 8 +- bsp/hc32/ev_hc32f448_lqfp80/template.uvprojx | 10 +- bsp/hc32/ev_hc32f460_lqfp100_v2/.config | 273 +- bsp/hc32/ev_hc32f460_lqfp100_v2/.cproject | 20 +- bsp/hc32/ev_hc32f460_lqfp100_v2/.project | 10 + bsp/hc32/ev_hc32f460_lqfp100_v2/README.md | 38 +- bsp/hc32/ev_hc32f460_lqfp100_v2/SConstruct | 8 +- .../applications/xtal32_fcm.c | 5 +- bsp/hc32/ev_hc32f460_lqfp100_v2/board/Kconfig | 80 +- .../ev_hc32f460_lqfp100_v2/board/SConscript | 9 +- bsp/hc32/ev_hc32f460_lqfp100_v2/board/board.c | 27 +- .../board/board_config.c | 77 +- .../board/board_config.h | 92 +- .../board/config/adc_config.h | 48 +- .../board/config/can_config.h | 42 +- .../board/config/dma_config.h | 18 + .../board/config/irq_config.h | 88 +- .../board/config/pm_config.h | 7 +- .../board/config/pulse_encoder_config.h | 126 +- .../board/config/tmr_capture_config.h | 69 + .../board/config/uart_config.h | 2 +- .../ev_hc32f460_lqfp100_v2/board/drv_config.h | 1 + .../board/hc32f4xx_conf.h | 2 +- .../board/ports/SConscript | 12 - .../board/ports/drv_spi_flash.c | 121 - .../board/ports/fal/SConscript | 20 - .../board/ports/fal/fal_flash_sfud_port.c | 84 - .../board/ports/{fal => }/fal_cfg.h | 0 .../jlink/ev_hc32f460_lqfp100_v2 Debug.launch | 2 +- bsp/hc32/ev_hc32f460_lqfp100_v2/project.ewd | 8 +- bsp/hc32/ev_hc32f460_lqfp100_v2/project.ewp | 228 +- .../ev_hc32f460_lqfp100_v2/project.uvoptx | 6 +- .../ev_hc32f460_lqfp100_v2/project.uvprojx | 364 +- bsp/hc32/ev_hc32f460_lqfp100_v2/rtconfig.h | 147 +- .../settings/project.dni | 2 +- .../ev_hc32f460_lqfp100_v2/template.uvoptx | 6 +- .../ev_hc32f460_lqfp100_v2/template.uvprojx | 4 +- bsp/hc32/ev_hc32f472_lqfp100/.config | 381 +- bsp/hc32/ev_hc32f472_lqfp100/.cproject | 224 + bsp/hc32/ev_hc32f472_lqfp100/.project | 78 + bsp/hc32/ev_hc32f472_lqfp100/README.md | 69 +- bsp/hc32/ev_hc32f472_lqfp100/SConstruct | 4 + bsp/hc32/ev_hc32f472_lqfp100/board/Kconfig | 75 +- bsp/hc32/ev_hc32f472_lqfp100/board/SConscript | 1 + bsp/hc32/ev_hc32f472_lqfp100/board/board.c | 36 +- .../ev_hc32f472_lqfp100/board/board_config.c | 123 +- .../ev_hc32f472_lqfp100/board/board_config.h | 126 +- .../board/config/adc_config.h | 9 +- .../board/config/can_config.h | 18 +- .../board/config/dac_config.h | 18 + .../board/config/irq_config.h | 115 +- .../board/config/pulse_encoder_config.h | 404 +- .../board/config/pwm_tmr_config.h | 360 +- .../board/config/timer_config.h | 19 + .../board/config/usb_config/usb_app_conf.h | 97 + .../board/config/usb_config/usb_bsp.h | 42 + .../ev_hc32f472_lqfp100/board/drv_config.h | 3 +- .../ev_hc32f472_lqfp100/board/hc32f4xx_conf.h | 11 +- .../board/linker_scripts/link.ld | 36 +- .../ev_hc32f472_lqfp100/board/ports/fal_cfg.h | 2 +- .../jlink/ev_hc32f472_lqfp100 Debug.launch | 80 + bsp/hc32/ev_hc32f472_lqfp100/project.ewp | 185 +- bsp/hc32/ev_hc32f472_lqfp100/project.uvprojx | 299 +- bsp/hc32/ev_hc32f472_lqfp100/rtconfig.h | 169 +- bsp/hc32/ev_hc32f4a0_lqfp176/.config | 281 +- bsp/hc32/ev_hc32f4a0_lqfp176/.cproject | 22 +- bsp/hc32/ev_hc32f4a0_lqfp176/.project | 10 + bsp/hc32/ev_hc32f4a0_lqfp176/README.md | 4 +- bsp/hc32/ev_hc32f4a0_lqfp176/SConstruct | 8 +- bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig | 198 +- bsp/hc32/ev_hc32f4a0_lqfp176/board/SConscript | 12 +- bsp/hc32/ev_hc32f4a0_lqfp176/board/board.c | 25 +- .../ev_hc32f4a0_lqfp176/board/board_config.c | 58 +- .../ev_hc32f4a0_lqfp176/board/board_config.h | 27 +- .../board/config/adc_config.h | 59 + .../board/config/dma_config.h | 27 + .../board/config/irq_config.h | 31 +- .../board/config/pm_config.h | 5 +- .../board/config/pulse_encoder_config.h | 40 +- .../board/config/tmr_capture_config.h | 69 + .../board/config/usb_config/usb_app_conf.h | 12 +- .../ev_hc32f4a0_lqfp176/board/drv_config.h | 1 + .../ev_hc32f4a0_lqfp176/board/hc32f4xx_conf.h | 2 +- .../board/ports/SConscript | 12 - .../board/ports/drv_spi_flash.c | 121 - .../board/ports/fal/SConscript | 20 - .../board/ports/fal/fal_flash_sfud_port.c | 84 - .../board/ports/{fal => }/fal_cfg.h | 0 .../board/ports/sdram_port.h | 2 - .../ev_hc32f4a0_lqfp176/board/ports/tca9539.c | 319 - .../board/ports/tca9539_port.h} | 76 +- .../jlink/ev_hc32f4a0_lqfp176 Debug.launch | 2 +- bsp/hc32/ev_hc32f4a0_lqfp176/project.ewd | 30 +- bsp/hc32/ev_hc32f4a0_lqfp176/project.ewp | 205 +- bsp/hc32/ev_hc32f4a0_lqfp176/project.uvoptx | 8 +- bsp/hc32/ev_hc32f4a0_lqfp176/project.uvprojx | 330 +- bsp/hc32/ev_hc32f4a0_lqfp176/rtconfig.h | 150 +- .../ev_hc32f4a0_lqfp176/settings/project.dni | 2 +- bsp/hc32/ev_hc32f4a0_lqfp176/template.uvoptx | 8 +- bsp/hc32/ev_hc32f4a0_lqfp176/template.uvprojx | 13 +- bsp/hc32/lckfb-hc32f4a0-lqfp100/.config | 147 +- bsp/hc32/lckfb-hc32f4a0-lqfp100/.cproject | 22 +- bsp/hc32/lckfb-hc32f4a0-lqfp100/.project | 10 + bsp/hc32/lckfb-hc32f4a0-lqfp100/SConstruct | 8 +- bsp/hc32/lckfb-hc32f4a0-lqfp100/board/Kconfig | 1 + .../lckfb-hc32f4a0-lqfp100/board/SConscript | 12 +- .../board/board_config.c | 2 +- .../board/config/irq_config.h | 13 +- .../board/config/pulse_encoder_config.h | 40 +- .../board/config/usb_config/usb_app_conf.h | 12 +- .../board/ports/SConscript | 12 - .../board/ports/drv_spi_flash.c | 121 - .../board/ports/fal/SConscript | 20 - .../board/ports/fal/fal_flash_sfud_port.c | 84 - .../board/ports/{fal => }/fal_cfg.h | 0 .../board/ports/tca9539.c | 319 - .../board/ports/tca9539_port.h} | 76 +- bsp/hc32/lckfb-hc32f4a0-lqfp100/project.ewd | 12 +- bsp/hc32/lckfb-hc32f4a0-lqfp100/project.ewp | 205 +- .../lckfb-hc32f4a0-lqfp100/project.uvoptx | 916 - .../lckfb-hc32f4a0-lqfp100/project.uvprojx | 1643 +- bsp/hc32/lckfb-hc32f4a0-lqfp100/rtconfig.h | 74 +- bsp/hc32/libraries/hc32_drivers/SConscript | 10 +- bsp/hc32/libraries/hc32_drivers/drv_adc.c | 8 +- bsp/hc32/libraries/hc32_drivers/drv_adc.h | 1 - bsp/hc32/libraries/hc32_drivers/drv_can.c | 215 +- bsp/hc32/libraries/hc32_drivers/drv_common.c | 24 +- bsp/hc32/libraries/hc32_drivers/drv_common.h | 2 +- bsp/hc32/libraries/hc32_drivers/drv_crypto.c | 30 +- bsp/hc32/libraries/hc32_drivers/drv_dac.c | 49 +- .../hc32_drivers/drv_flash/drv_flash_f4.c | 25 +- bsp/hc32/libraries/hc32_drivers/drv_gpio.c | 83 + bsp/hc32/libraries/hc32_drivers/drv_hwtimer.c | 40 +- bsp/hc32/libraries/hc32_drivers/drv_irq.c | 56 +- bsp/hc32/libraries/hc32_drivers/drv_mcan.c | 1228 + bsp/hc32/libraries/hc32_drivers/drv_mcan.h | 54 + bsp/hc32/libraries/hc32_drivers/drv_nand.c | 25 +- bsp/hc32/libraries/hc32_drivers/drv_pm.c | 18 +- bsp/hc32/libraries/hc32_drivers/drv_pm.h | 2 +- .../hc32_drivers/drv_pulse_encoder.c | 295 +- bsp/hc32/libraries/hc32_drivers/drv_pwm.c | 99 +- bsp/hc32/libraries/hc32_drivers/drv_qspi.c | 18 +- bsp/hc32/libraries/hc32_drivers/drv_rtc.c | 46 +- bsp/hc32/libraries/hc32_drivers/drv_sdram.c | 2 + .../libraries/hc32_drivers/drv_soft_i2c.c | 4 +- .../libraries/hc32_drivers/drv_soft_i2c.h | 1 - .../libraries/hc32_drivers/drv_tmr_capture.c | 475 + .../libraries/hc32_drivers/drv_tmr_capture.h | 44 + .../libraries/hc32_drivers/drv_usart_v2.c | 3 +- bsp/hc32/libraries/hc32_drivers/drv_usbd.c | 69 +- bsp/hc32/libraries/hc32_drivers/drv_usbd.h | 3 - bsp/hc32/libraries/hc32_drivers/drv_usbh.c | 55 +- bsp/hc32/libraries/hc32_drivers/drv_usbh.h | 3 - bsp/hc32/libraries/hc32_drivers/drv_wdt.c | 14 +- bsp/hc32/libraries/hc32_drivers/drv_wktm.c | 21 +- bsp/hc32/libraries/hc32_drivers/drv_wktm.h | 2 +- bsp/hc32/libraries/hc32f448_ddl/SConscript | 86 +- .../Device/HDSC/hc32f4xx/Include/hc32f448.h | 0 .../Device/HDSC/hc32f4xx/Include/hc32f4xx.h | 0 .../HDSC/hc32f4xx/Include/system_hc32f448.h | 0 .../Source/ARM/flashloader/HC32F448_128K.FLM | Bin .../Source/ARM/flashloader/HC32F448_256K.FLM | Bin .../Source/ARM/flashloader/HC32F448_RAM.FLM | Bin .../Source/ARM/flashloader/HC32F448_otp.FLM | Bin .../hc32f4xx/Source/ARM/flashloader/ram.ini | 0 .../HDSC/hc32f4xx/Source/ARM/sfr/HC32F448.SFR | Bin .../hc32f4xx/Source/ARM/startup_hc32f448.s | 0 .../hc32f4xx/Source/GCC/linker/HC32F448xA.ld | 0 .../hc32f4xx/Source/GCC/linker/HC32F448xC.ld | 0 .../hc32f4xx/Source/GCC/startup_hc32f448.S | 2 +- .../HDSC/hc32f4xx/Source/GCC/svd/HC32F448.svd | 0 .../Source/IAR}/flashloader/FlashHC32F448.mac | 0 .../Source/IAR}/flashloader/FlashHC32F448.out | Bin .../IAR/flashloader/FlashHC32F448_otp.flash | 10 + .../IAR}/flashloader/FlashHC32F448_otp.out | Bin .../IAR}/flashloader/FlashHC32F448_qspi.flash | 2 +- .../IAR}/flashloader/FlashHC32F448_qspi.out | Bin .../IAR/flashloader/FlashHC32F448xA.board | 16 + .../IAR/flashloader/FlashHC32F448xA.flash | 10 + .../IAR/flashloader/FlashHC32F448xC.board | 16 + .../IAR/flashloader/FlashHC32F448xC.flash | 10 + .../Source/IAR/linker/HC32F448_RAM.icf | 0 .../hc32f4xx/Source/IAR/linker/HC32F448xA.icf | 0 .../hc32f4xx/Source/IAR/linker/HC32F448xC.icf | 0 .../hc32f4xx/Source/IAR/startup_hc32f448.s | 0 .../HDSC/hc32f4xx/Source/IAR/svd/HC32F448.svd | 0 .../HDSC/hc32f4xx/Source/system_hc32f448.c | 0 .../cmsis/Include/arm_common_tables.h | 0 .../cmsis/Include/arm_const_structs.h | 0 .../cmsis/Include/arm_helium_utils.h | 0 .../{drivers => }/cmsis/Include/arm_math.h | 0 .../cmsis/Include/arm_mve_tables.h | 0 .../cmsis/Include/arm_vec_math.h | 0 .../cmsis/Include/cachel1_armv7.h | 0 .../{drivers => }/cmsis/Include/cmsis_armcc.h | 0 .../cmsis/Include/cmsis_armclang.h | 0 .../cmsis/Include/cmsis_armclang_ltm.h | 0 .../cmsis/Include/cmsis_compiler.h | 0 .../{drivers => }/cmsis/Include/cmsis_gcc.h | 0 .../cmsis/Include/cmsis_iccarm.h | 0 .../cmsis/Include/cmsis_version.h | 0 .../cmsis/Include/core_armv81mml.h | 0 .../cmsis/Include/core_armv8mbl.h | 0 .../cmsis/Include/core_armv8mml.h | 0 .../{drivers => }/cmsis/Include/core_cm0.h | 0 .../cmsis/Include/core_cm0plus.h | 0 .../{drivers => }/cmsis/Include/core_cm1.h | 0 .../{drivers => }/cmsis/Include/core_cm23.h | 0 .../{drivers => }/cmsis/Include/core_cm3.h | 0 .../{drivers => }/cmsis/Include/core_cm33.h | 0 .../{drivers => }/cmsis/Include/core_cm35p.h | 0 .../{drivers => }/cmsis/Include/core_cm4.h | 0 .../{drivers => }/cmsis/Include/core_cm55.h | 0 .../{drivers => }/cmsis/Include/core_cm7.h | 0 .../{drivers => }/cmsis/Include/core_sc000.h | 0 .../{drivers => }/cmsis/Include/core_sc300.h | 0 .../{drivers => }/cmsis/Include/mpu_armv7.h | 0 .../{drivers => }/cmsis/Include/mpu_armv8.h | 0 .../{drivers => }/cmsis/Include/pmu_armv8.h | 0 .../{drivers => }/cmsis/Include/tz_context.h | 0 .../flashloader/FlashHC32F448_otp.flash | 10 - .../config/flashloader/FlashHC32F448xA.board | 16 - .../config/flashloader/FlashHC32F448xA.flash | 10 - .../config/flashloader/FlashHC32F448xC.board | 16 - .../config/flashloader/FlashHC32F448xC.flash | 10 - .../drivers/bsp/components/24cxx/24cxx.c | 278 - .../drivers/bsp/components/24cxx/24cxx.h | 121 - .../drivers/bsp/components/gt9xx/gt9xx.c | 183 - .../drivers/bsp/components/gt9xx/gt9xx.h | 150 - .../drivers/bsp/components/nt35510/nt35510.c | 2078 - .../drivers/bsp/components/nt35510/nt35510.h | 202 - .../drivers/bsp/components/tca9539/tca9539.c | 337 - .../drivers/bsp/components/tca9539/tca9539.h | 193 - .../drivers/bsp/components/w25qxx/w25qxx.c | 596 - .../drivers/bsp/components/w25qxx/w25qxx.h | 199 - .../ev_hc32f448_lqfp80/ev_hc32f448_lqfp80.c | 672 - .../ev_hc32f448_lqfp80/ev_hc32f448_lqfp80.h | 249 - .../ev_hc32f448_lqfp80_24cxx.c | 290 - .../ev_hc32f448_lqfp80_24cxx.h | 126 - .../ev_hc32f448_lqfp80_bsp.h | 91 - .../ev_hc32f448_lqfp80_gt9xx.c | 261 - .../ev_hc32f448_lqfp80_gt9xx.h | 135 - .../ev_hc32f448_lqfp80_is61lv6416.c | 321 - .../ev_hc32f448_lqfp80_is61lv6416.h | 203 - .../ev_hc32f448_lqfp80_nt35510.c | 535 - .../ev_hc32f448_lqfp80_nt35510.h | 205 - .../ev_hc32f448_lqfp80_tca9539.c | 387 - .../ev_hc32f448_lqfp80_tca9539.h | 290 - .../ev_hc32f448_lqfp80_w25qxx.c | 324 - .../ev_hc32f448_lqfp80_w25qxx.h | 162 - .../Source/IAR/flashloader/FlashHC32F448.mac | 16 - .../Source/IAR/flashloader/FlashHC32F448.out | Bin 48368 -> 0 bytes .../IAR/flashloader/FlashHC32F448_otp.out | Bin 47664 -> 0 bytes .../hc32_ll_driver/inc/hc32_ll.h | 0 .../hc32_ll_driver/inc/hc32_ll_adc.h | 0 .../hc32_ll_driver/inc/hc32_ll_aes.h | 0 .../hc32_ll_driver/inc/hc32_ll_aos.h | 0 .../hc32_ll_driver/inc/hc32_ll_clk.h | 0 .../hc32_ll_driver/inc/hc32_ll_cmp.h | 0 .../hc32_ll_driver/inc/hc32_ll_crc.h | 0 .../hc32_ll_driver/inc/hc32_ll_ctc.h | 0 .../hc32_ll_driver/inc/hc32_ll_dac.h | 0 .../hc32_ll_driver/inc/hc32_ll_dbgc.h | 0 .../hc32_ll_driver/inc/hc32_ll_dcu.h | 0 .../hc32_ll_driver/inc/hc32_ll_def.h | 0 .../hc32_ll_driver/inc/hc32_ll_dma.h | 0 .../hc32_ll_driver/inc/hc32_ll_efm.h | 4 +- .../hc32_ll_driver/inc/hc32_ll_emb.h | 0 .../hc32_ll_driver/inc/hc32_ll_event_port.h | 0 .../hc32_ll_driver/inc/hc32_ll_fcg.h | 0 .../hc32_ll_driver/inc/hc32_ll_fcm.h | 0 .../hc32_ll_driver/inc/hc32_ll_gpio.h | 0 .../hc32_ll_driver/inc/hc32_ll_hash.h | 0 .../hc32_ll_driver/inc/hc32_ll_i2c.h | 0 .../hc32_ll_driver/inc/hc32_ll_icg.h | 0 .../hc32_ll_driver/inc/hc32_ll_interrupts.h | 0 .../hc32_ll_driver/inc/hc32_ll_keyscan.h | 0 .../hc32_ll_driver/inc/hc32_ll_mcan.h | 0 .../hc32_ll_driver/inc/hc32_ll_mpu.h | 0 .../hc32_ll_driver/inc/hc32_ll_pwc.h | 0 .../hc32_ll_driver/inc/hc32_ll_qspi.h | 0 .../hc32_ll_driver/inc/hc32_ll_rmu.h | 0 .../hc32_ll_driver/inc/hc32_ll_rtc.h | 0 .../hc32_ll_driver/inc/hc32_ll_smc.h | 0 .../hc32_ll_driver/inc/hc32_ll_spi.h | 0 .../hc32_ll_driver/inc/hc32_ll_sram.h | 0 .../hc32_ll_driver/inc/hc32_ll_swdt.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr0.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr4.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr6.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmra.h | 0 .../hc32_ll_driver/inc/hc32_ll_trng.h | 0 .../hc32_ll_driver/inc/hc32_ll_usart.h | 0 .../hc32_ll_driver/inc/hc32_ll_utility.h | 0 .../hc32_ll_driver/inc/hc32_ll_wdt.h | 0 .../hc32_ll_driver/src/hc32_ll.c | 0 .../hc32_ll_driver/src/hc32_ll_adc.c | 0 .../hc32_ll_driver/src/hc32_ll_aes.c | 0 .../hc32_ll_driver/src/hc32_ll_aos.c | 0 .../hc32_ll_driver/src/hc32_ll_clk.c | 0 .../hc32_ll_driver/src/hc32_ll_cmp.c | 0 .../hc32_ll_driver/src/hc32_ll_crc.c | 0 .../hc32_ll_driver/src/hc32_ll_ctc.c | 0 .../hc32_ll_driver/src/hc32_ll_dac.c | 0 .../hc32_ll_driver/src/hc32_ll_dbgc.c | 0 .../hc32_ll_driver/src/hc32_ll_dcu.c | 0 .../hc32_ll_driver/src/hc32_ll_dma.c | 0 .../hc32_ll_driver/src/hc32_ll_efm.c | 0 .../hc32_ll_driver/src/hc32_ll_emb.c | 0 .../hc32_ll_driver/src/hc32_ll_event_port.c | 0 .../hc32_ll_driver/src/hc32_ll_fcg.c | 0 .../hc32_ll_driver/src/hc32_ll_fcm.c | 0 .../hc32_ll_driver/src/hc32_ll_gpio.c | 0 .../hc32_ll_driver/src/hc32_ll_hash.c | 0 .../hc32_ll_driver/src/hc32_ll_i2c.c | 0 .../hc32_ll_driver/src/hc32_ll_icg.c | 0 .../hc32_ll_driver/src/hc32_ll_interrupts.c | 0 .../hc32_ll_driver/src/hc32_ll_keyscan.c | 0 .../hc32_ll_driver/src/hc32_ll_mcan.c | 0 .../hc32_ll_driver/src/hc32_ll_mpu.c | 0 .../hc32_ll_driver/src/hc32_ll_pwc.c | 0 .../hc32_ll_driver/src/hc32_ll_qspi.c | 0 .../hc32_ll_driver/src/hc32_ll_rmu.c | 0 .../hc32_ll_driver/src/hc32_ll_rtc.c | 0 .../hc32_ll_driver/src/hc32_ll_smc.c | 0 .../hc32_ll_driver/src/hc32_ll_spi.c | 0 .../hc32_ll_driver/src/hc32_ll_sram.c | 0 .../hc32_ll_driver/src/hc32_ll_swdt.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr0.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr4.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr6.c | 0 .../hc32_ll_driver/src/hc32_ll_tmra.c | 0 .../hc32_ll_driver/src/hc32_ll_trng.c | 0 .../hc32_ll_driver/src/hc32_ll_usart.c | 0 .../hc32_ll_driver/src/hc32_ll_utility.c | 0 .../hc32_ll_driver/src/hc32_ll_wdt.c | 0 bsp/hc32/libraries/hc32f460_ddl/README.txt | 4 - bsp/hc32/libraries/hc32f460_ddl/SConscript | 109 +- .../Device/HDSC/hc32f4xx/Include/hc32f460.h | 0 .../Device/HDSC/hc32f4xx/Include/hc32f4xx.h | 0 .../HDSC/hc32f4xx/Include/system_hc32f460.h | 0 .../Source/ARM/flashloader/HC32F460_256K.FLM | Bin .../Source/ARM/flashloader/HC32F460_512K.FLM | Bin .../Source/ARM/flashloader/HC32F460_RAM.FLM | Bin .../Source/ARM/flashloader/HC32F460_otp.FLM | Bin .../hc32f4xx/Source/ARM/flashloader/ram.ini | 0 .../HDSC/hc32f4xx/Source/ARM/sfr/HC32F460.SFR | Bin .../hc32f4xx/Source/ARM/startup_hc32f460.s | 0 .../hc32f4xx/Source/GCC/linker/HC32F460xC.ld | 0 .../hc32f4xx/Source/GCC/linker/HC32F460xE.ld | 0 .../hc32f4xx/Source/GCC/startup_hc32f460.S | 0 .../HDSC/hc32f4xx/Source/GCC/svd/HC32F460.svd | 0 .../Source/IAR}/flashloader/FlashHC32F460.mac | 0 .../Source/IAR/flashloader/FlashHC32F460.out | Bin .../IAR/flashloader/FlashHC32F460_otp.flash | 10 + .../IAR}/flashloader/FlashHC32F460_otp.mac | 0 .../IAR/flashloader/FlashHC32F460_otp.out | Bin .../IAR}/flashloader/FlashHC32F460_qspi.flash | 2 +- .../IAR}/flashloader/FlashHC32F460_qspi.out | Bin .../IAR/flashloader/FlashHC32F460xC.board | 16 + .../IAR/flashloader/FlashHC32F460xC.flash | 10 + .../IAR/flashloader/FlashHC32F460xE.board | 16 + .../IAR/flashloader/FlashHC32F460xE.flash | 10 + .../Source/IAR/linker/HC32F460_RAM.icf | 0 .../hc32f4xx/Source/IAR/linker/HC32F460xC.icf | 0 .../hc32f4xx/Source/IAR/linker/HC32F460xE.icf | 0 .../hc32f4xx/Source/IAR/startup_hc32f460.s | 0 .../HDSC/hc32f4xx/Source/IAR/svd/HC32F460.svd | 0 .../HDSC/hc32f4xx/Source/system_hc32f460.c | 0 .../cmsis/Include/arm_common_tables.h | 0 .../cmsis/Include/arm_const_structs.h | 0 .../cmsis/Include/arm_helium_utils.h | 0 .../{drivers => }/cmsis/Include/arm_math.h | 0 .../cmsis/Include/arm_mve_tables.h | 0 .../cmsis/Include/arm_vec_math.h | 0 .../cmsis/Include/cachel1_armv7.h | 0 .../{drivers => }/cmsis/Include/cmsis_armcc.h | 0 .../cmsis/Include/cmsis_armclang.h | 0 .../cmsis/Include/cmsis_armclang_ltm.h | 0 .../cmsis/Include/cmsis_compiler.h | 0 .../{drivers => }/cmsis/Include/cmsis_gcc.h | 0 .../cmsis/Include/cmsis_iccarm.h | 0 .../cmsis/Include/cmsis_version.h | 0 .../cmsis/Include/core_armv81mml.h | 0 .../cmsis/Include/core_armv8mbl.h | 0 .../cmsis/Include/core_armv8mml.h | 0 .../{drivers => }/cmsis/Include/core_cm0.h | 0 .../cmsis/Include/core_cm0plus.h | 0 .../{drivers => }/cmsis/Include/core_cm1.h | 0 .../{drivers => }/cmsis/Include/core_cm23.h | 0 .../{drivers => }/cmsis/Include/core_cm3.h | 0 .../{drivers => }/cmsis/Include/core_cm33.h | 0 .../{drivers => }/cmsis/Include/core_cm35p.h | 0 .../{drivers => }/cmsis/Include/core_cm4.h | 0 .../{drivers => }/cmsis/Include/core_cm55.h | 0 .../{drivers => }/cmsis/Include/core_cm7.h | 0 .../{drivers => }/cmsis/Include/core_sc000.h | 0 .../{drivers => }/cmsis/Include/core_sc300.h | 0 .../{drivers => }/cmsis/Include/mpu_armv7.h | 0 .../{drivers => }/cmsis/Include/mpu_armv8.h | 0 .../{drivers => }/cmsis/Include/pmu_armv8.h | 0 .../{drivers => }/cmsis/Include/tz_context.h | 0 .../config/flashloader/FlashHC32F460.out | Bin 26660 -> 0 bytes .../flashloader/FlashHC32F460_otp.flash | 10 - .../config/flashloader/FlashHC32F460_otp.out | Bin 23452 -> 0 bytes .../config/flashloader/FlashHC32F460xC.board | 16 - .../config/flashloader/FlashHC32F460xC.flash | 10 - .../config/flashloader/FlashHC32F460xE.board | 16 - .../config/flashloader/FlashHC32F460xE.flash | 10 - .../config/flashloader/HC32F460xC.board | 12 - .../config/flashloader/HC32F460xE.board | 12 - .../drivers/bsp/components/24cxx/24cxx.c | 255 - .../drivers/bsp/components/24cxx/24cxx.h | 112 - .../drivers/bsp/components/w25qxx/w25qxx.c | 567 - .../drivers/bsp/components/w25qxx/w25qxx.h | 190 - .../drivers/bsp/components/wm8731/wm8731.c | 375 - .../drivers/bsp/components/wm8731/wm8731.h | 218 - .../ev_hc32f460_lqfp100_v2.c | 780 - .../ev_hc32f460_lqfp100_v2.h | 322 - .../ev_hc32f460_lqfp100_v2_24cxx.c | 290 - .../ev_hc32f460_lqfp100_v2_24cxx.h | 126 - .../ev_hc32f460_lqfp100_v2_bsp.h | 80 - .../ev_hc32f460_lqfp100_v2_w25qxx.c | 341 - .../ev_hc32f460_lqfp100_v2_w25qxx.h | 171 - .../ev_hc32f460_lqfp100_v2_wm8731.c | 399 - .../ev_hc32f460_lqfp100_v2_wm8731.h | 219 - .../hc32f4xx/Source/ARM/sfr/HDSC_HC32F460.SFR | Bin 1625032 -> 0 bytes .../hc32f4xx/Source/GCC/svd/HDSC_HC32F460.svd | 53428 -------- .../Source/IAR/flashloader/FlashHC32F460.mac | 16 - .../IAR/flashloader/FlashHC32F460_otp.mac | 16 - .../hc32f4xx/Source/IAR/svd/HDSC_HC32F460.svd | 53428 -------- .../hc32_ll_driver/inc/hc32_ll.h | 0 .../hc32_ll_driver/inc/hc32_ll_adc.h | 0 .../hc32_ll_driver/inc/hc32_ll_aes.h | 0 .../hc32_ll_driver/inc/hc32_ll_aos.h | 0 .../hc32_ll_driver/inc/hc32_ll_can.h | 0 .../hc32_ll_driver/inc/hc32_ll_clk.h | 0 .../hc32_ll_driver/inc/hc32_ll_cmp.h | 0 .../hc32_ll_driver/inc/hc32_ll_crc.h | 0 .../hc32_ll_driver/inc/hc32_ll_dbgc.h | 0 .../hc32_ll_driver/inc/hc32_ll_dcu.h | 0 .../hc32_ll_driver/inc/hc32_ll_def.h | 0 .../hc32_ll_driver/inc/hc32_ll_dma.h | 0 .../hc32_ll_driver/inc/hc32_ll_efm.h | 4 +- .../hc32_ll_driver/inc/hc32_ll_emb.h | 0 .../hc32_ll_driver/inc/hc32_ll_event_port.h | 0 .../hc32_ll_driver/inc/hc32_ll_fcg.h | 0 .../hc32_ll_driver/inc/hc32_ll_fcm.h | 0 .../hc32_ll_driver/inc/hc32_ll_gpio.h | 0 .../hc32_ll_driver/inc/hc32_ll_hash.h | 0 .../hc32_ll_driver/inc/hc32_ll_i2c.h | 0 .../hc32_ll_driver/inc/hc32_ll_i2s.h | 0 .../hc32_ll_driver/inc/hc32_ll_icg.h | 0 .../hc32_ll_driver/inc/hc32_ll_interrupts.h | 0 .../hc32_ll_driver/inc/hc32_ll_keyscan.h | 0 .../hc32_ll_driver/inc/hc32_ll_mpu.h | 0 .../hc32_ll_driver/inc/hc32_ll_ots.h | 0 .../hc32_ll_driver/inc/hc32_ll_pwc.h | 0 .../hc32_ll_driver/inc/hc32_ll_qspi.h | 0 .../hc32_ll_driver/inc/hc32_ll_rmu.h | 0 .../hc32_ll_driver/inc/hc32_ll_rtc.h | 0 .../hc32_ll_driver/inc/hc32_ll_sdioc.h | 0 .../hc32_ll_driver/inc/hc32_ll_spi.h | 0 .../hc32_ll_driver/inc/hc32_ll_sram.h | 0 .../hc32_ll_driver/inc/hc32_ll_swdt.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr0.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr4.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr6.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmra.h | 0 .../hc32_ll_driver/inc/hc32_ll_trng.h | 0 .../hc32_ll_driver/inc/hc32_ll_usart.h | 0 .../hc32_ll_driver/inc/hc32_ll_usb.h | 0 .../hc32_ll_driver/inc/hc32_ll_utility.h | 0 .../hc32_ll_driver/inc/hc32_ll_wdt.h | 0 .../inc/hc32f460_ll_interrupts_share.h | 0 .../hc32_ll_driver/src/hc32_ll.c | 0 .../hc32_ll_driver/src/hc32_ll_adc.c | 0 .../hc32_ll_driver/src/hc32_ll_aes.c | 0 .../hc32_ll_driver/src/hc32_ll_aos.c | 0 .../hc32_ll_driver/src/hc32_ll_can.c | 0 .../hc32_ll_driver/src/hc32_ll_clk.c | 0 .../hc32_ll_driver/src/hc32_ll_cmp.c | 0 .../hc32_ll_driver/src/hc32_ll_crc.c | 0 .../hc32_ll_driver/src/hc32_ll_dbgc.c | 0 .../hc32_ll_driver/src/hc32_ll_dcu.c | 0 .../hc32_ll_driver/src/hc32_ll_dma.c | 0 .../hc32_ll_driver/src/hc32_ll_efm.c | 0 .../hc32_ll_driver/src/hc32_ll_emb.c | 0 .../hc32_ll_driver/src/hc32_ll_event_port.c | 0 .../hc32_ll_driver/src/hc32_ll_fcg.c | 0 .../hc32_ll_driver/src/hc32_ll_fcm.c | 0 .../hc32_ll_driver/src/hc32_ll_gpio.c | 0 .../hc32_ll_driver/src/hc32_ll_hash.c | 0 .../hc32_ll_driver/src/hc32_ll_i2c.c | 0 .../hc32_ll_driver/src/hc32_ll_i2s.c | 0 .../hc32_ll_driver/src/hc32_ll_icg.c | 0 .../hc32_ll_driver/src/hc32_ll_interrupts.c | 0 .../hc32_ll_driver/src/hc32_ll_keyscan.c | 0 .../hc32_ll_driver/src/hc32_ll_mpu.c | 0 .../hc32_ll_driver/src/hc32_ll_ots.c | 0 .../hc32_ll_driver/src/hc32_ll_pwc.c | 0 .../hc32_ll_driver/src/hc32_ll_qspi.c | 0 .../hc32_ll_driver/src/hc32_ll_rmu.c | 0 .../hc32_ll_driver/src/hc32_ll_rtc.c | 0 .../hc32_ll_driver/src/hc32_ll_sdioc.c | 0 .../hc32_ll_driver/src/hc32_ll_spi.c | 8 +- .../hc32_ll_driver/src/hc32_ll_sram.c | 0 .../hc32_ll_driver/src/hc32_ll_swdt.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr0.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr4.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr6.c | 0 .../hc32_ll_driver/src/hc32_ll_tmra.c | 0 .../hc32_ll_driver/src/hc32_ll_trng.c | 0 .../hc32_ll_driver/src/hc32_ll_usart.c | 0 .../hc32_ll_driver/src/hc32_ll_usb.c | 0 .../hc32_ll_driver/src/hc32_ll_utility.c | 0 .../hc32_ll_driver/src/hc32_ll_wdt.c | 0 .../src/hc32f460_ll_interrupts_share.c | 0 bsp/hc32/libraries/hc32f472_ddl/SConscript | 5 +- .../hc32f4xx/Source/GCC/linker/HC32F472xE.ld | 208 + .../hc32f4xx/Source/GCC/startup_hc32f472.S | 2 +- .../hc32_ll_driver/inc/hc32_ll_efm.h | 4 +- .../hc32_ll_driver/inc/hc32_ll_rtc.h | 1 + .../hc32_ll_driver/src/hc32_ll_rtc.c | 30 +- bsp/hc32/libraries/hc32f4a0_ddl/README.txt | 4 - bsp/hc32/libraries/hc32f4a0_ddl/SConscript | 101 +- .../Device/HDSC/hc32f4xx/Include/hc32f4a0.h | 0 .../Device/HDSC/hc32f4xx/Include/hc32f4xx.h | 0 .../HDSC/hc32f4xx/Include/system_hc32f4a0.h | 0 .../Source/ARM/flashloader/HC32F4A0_1M.FLM | Bin .../Source/ARM/flashloader/HC32F4A0_2M.FLM | Bin .../ARM/flashloader/HC32F4A0_512K_0.FLM | Bin .../ARM/flashloader/HC32F4A0_512K_1.FLM | Bin .../Source/ARM/flashloader/HC32F4A0_RAM.FLM | Bin .../Source/ARM/flashloader/HC32F4A0_otp.FLM | Bin .../hc32f4xx/Source/ARM/flashloader/ram.ini | 0 .../HDSC/hc32f4xx/Source/ARM/sfr/HC32F4A0.SFR | Bin .../hc32f4xx/Source/ARM/startup_hc32f4a0.s | 0 .../hc32f4xx/Source/GCC/linker/HC32F4A0xG.ld | 0 .../hc32f4xx/Source/GCC/linker/HC32F4A0xI.ld | 0 .../hc32f4xx/Source/GCC/startup_hc32f4a0.S | 0 .../HDSC/hc32f4xx/Source/GCC/svd/HC32F4A0.svd | 0 .../Source/IAR}/flashloader/FlashHC32F4A0.mac | 0 .../Source/IAR/flashloader/FlashHC32F4A0.out | Bin .../IAR/flashloader/FlashHC32F4A0_otp.flash | 10 + .../IAR/flashloader/FlashHC32F4A0_otp.out | Bin .../IAR}/flashloader/FlashHC32F4A0_qspi.flash | 2 +- .../IAR}/flashloader/FlashHC32F4A0_qspi.out | Bin .../IAR/flashloader/FlashHC32F4A0xG.board | 18 + .../IAR/flashloader/FlashHC32F4A0xG.flash | 10 + .../IAR/flashloader/FlashHC32F4A0xI.board | 18 + .../IAR/flashloader/FlashHC32F4A0xI.flash | 10 + .../Source/IAR/linker/HC32F4A0_RAM.icf | 0 .../hc32f4xx/Source/IAR/linker/HC32F4A0xG.icf | 0 .../hc32f4xx/Source/IAR/linker/HC32F4A0xI.icf | 0 .../hc32f4xx/Source/IAR/startup_hc32f4a0.s | 0 .../HDSC/hc32f4xx/Source/IAR/svd/HC32F4A0.svd | 0 .../HDSC/hc32f4xx/Source/system_hc32f4a0.c | 0 .../cmsis/Include/arm_common_tables.h | 0 .../cmsis/Include/arm_const_structs.h | 0 .../cmsis/Include/arm_helium_utils.h | 0 .../{drivers => }/cmsis/Include/arm_math.h | 0 .../cmsis/Include/arm_mve_tables.h | 0 .../cmsis/Include/arm_vec_math.h | 0 .../cmsis/Include/cachel1_armv7.h | 0 .../{drivers => }/cmsis/Include/cmsis_armcc.h | 0 .../cmsis/Include/cmsis_armclang.h | 0 .../cmsis/Include/cmsis_armclang_ltm.h | 0 .../cmsis/Include/cmsis_compiler.h | 0 .../{drivers => }/cmsis/Include/cmsis_gcc.h | 0 .../cmsis/Include/cmsis_iccarm.h | 0 .../cmsis/Include/cmsis_version.h | 0 .../cmsis/Include/core_armv81mml.h | 0 .../cmsis/Include/core_armv8mbl.h | 0 .../cmsis/Include/core_armv8mml.h | 0 .../{drivers => }/cmsis/Include/core_cm0.h | 0 .../cmsis/Include/core_cm0plus.h | 0 .../{drivers => }/cmsis/Include/core_cm1.h | 0 .../{drivers => }/cmsis/Include/core_cm23.h | 0 .../{drivers => }/cmsis/Include/core_cm3.h | 0 .../{drivers => }/cmsis/Include/core_cm33.h | 0 .../{drivers => }/cmsis/Include/core_cm35p.h | 0 .../{drivers => }/cmsis/Include/core_cm4.h | 0 .../{drivers => }/cmsis/Include/core_cm55.h | 0 .../{drivers => }/cmsis/Include/core_cm7.h | 0 .../{drivers => }/cmsis/Include/core_sc000.h | 0 .../{drivers => }/cmsis/Include/core_sc300.h | 0 .../{drivers => }/cmsis/Include/mpu_armv7.h | 0 .../{drivers => }/cmsis/Include/mpu_armv8.h | 0 .../{drivers => }/cmsis/Include/pmu_armv8.h | 0 .../{drivers => }/cmsis/Include/tz_context.h | 0 .../config/flashloader/FlashHC32F4A0.out | Bin 47100 -> 0 bytes .../flashloader/FlashHC32F4A0_otp.flash | 10 - .../config/flashloader/FlashHC32F4A0_otp.out | Bin 47280 -> 0 bytes .../config/flashloader/FlashHC32F4A0xG.board | 18 - .../config/flashloader/FlashHC32F4A0xG.flash | 10 - .../config/flashloader/FlashHC32F4A0xI.board | 18 - .../config/flashloader/FlashHC32F4A0xI.flash | 10 - .../config/flashloader/HC32F4A0xG.board | 18 - .../config/flashloader/HC32F4A0xI.board | 18 - .../drivers/bsp/components/24cxx/24cxx.c | 255 - .../drivers/bsp/components/24cxx/24cxx.h | 112 - .../drivers/bsp/components/gt9xx/gt9xx.c | 182 - .../drivers/bsp/components/gt9xx/gt9xx.h | 150 - .../drivers/bsp/components/nt35510/nt35510.c | 2033 - .../drivers/bsp/components/nt35510/nt35510.h | 202 - .../drivers/bsp/components/ov5640/ov5640.c | 404 - .../drivers/bsp/components/ov5640/ov5640.h | 147 - .../s29gl064n90tfi03/s29gl064n90tfi03.c | 454 - .../s29gl064n90tfi03/s29gl064n90tfi03.h | 153 - .../drivers/bsp/components/tca9539/tca9539.c | 335 - .../drivers/bsp/components/tca9539/tca9539.h | 184 - .../drivers/bsp/components/w25qxx/w25qxx.c | 567 - .../drivers/bsp/components/w25qxx/w25qxx.h | 190 - .../drivers/bsp/components/wm8731/wm8731.c | 375 - .../drivers/bsp/components/wm8731/wm8731.h | 218 - .../ev_hc32f4a0_lqfp176/ev_hc32f4a0_lqfp176.c | 710 - .../ev_hc32f4a0_lqfp176/ev_hc32f4a0_lqfp176.h | 271 - .../ev_hc32f4a0_lqfp176_24cxx.c | 291 - .../ev_hc32f4a0_lqfp176_24cxx.h | 125 - .../ev_hc32f4a0_lqfp176_bsp.h | 108 - .../ev_hc32f4a0_lqfp176_gt9xx.c | 261 - .../ev_hc32f4a0_lqfp176_gt9xx.h | 135 - .../ev_hc32f4a0_lqfp176_is42s16400j7tli.c | 422 - .../ev_hc32f4a0_lqfp176_is42s16400j7tli.h | 241 - .../ev_hc32f4a0_lqfp176_is62wv51216.c | 353 - .../ev_hc32f4a0_lqfp176_is62wv51216.h | 239 - .../ev_hc32f4a0_lqfp176_mt29f2g08ab.c | 571 - .../ev_hc32f4a0_lqfp176_mt29f2g08ab.h | 205 - .../ev_hc32f4a0_lqfp176_nt35510.c | 539 - .../ev_hc32f4a0_lqfp176_nt35510.h | 206 - .../ev_hc32f4a0_lqfp176_ov5640.c | 620 - .../ev_hc32f4a0_lqfp176_ov5640.h | 167 - .../ev_hc32f4a0_lqfp176_tca9539.c | 441 - .../ev_hc32f4a0_lqfp176_tca9539.h | 320 - .../ev_hc32f4a0_lqfp176_w25qxx.c | 336 - .../ev_hc32f4a0_lqfp176_w25qxx.h | 171 - .../ev_hc32f4a0_lqfp176_wm8731.c | 395 - .../ev_hc32f4a0_lqfp176_wm8731.h | 211 - .../hc32f4xx/Source/ARM/sfr/HDSC_HC32F4A0.SFR | Bin 3121534 -> 0 bytes .../hc32f4xx/Source/GCC/svd/HDSC_HC32F4A0.svd | 102653 --------------- .../Source/IAR/flashloader/FlashHC32F4A0.mac | 16 - .../hc32f4xx/Source/IAR/svd/HDSC_HC32F4A0.svd | 102653 --------------- .../hc32_ll_driver/inc/hc32_ll.h | 0 .../hc32_ll_driver/inc/hc32_ll_adc.h | 0 .../hc32_ll_driver/inc/hc32_ll_aes.h | 0 .../hc32_ll_driver/inc/hc32_ll_aos.h | 0 .../hc32_ll_driver/inc/hc32_ll_can.h | 0 .../hc32_ll_driver/inc/hc32_ll_clk.h | 0 .../hc32_ll_driver/inc/hc32_ll_cmp.h | 0 .../hc32_ll_driver/inc/hc32_ll_crc.h | 0 .../hc32_ll_driver/inc/hc32_ll_ctc.h | 0 .../hc32_ll_driver/inc/hc32_ll_dac.h | 0 .../hc32_ll_driver/inc/hc32_ll_dbgc.h | 0 .../hc32_ll_driver/inc/hc32_ll_dcu.h | 0 .../hc32_ll_driver/inc/hc32_ll_def.h | 0 .../hc32_ll_driver/inc/hc32_ll_dma.h | 0 .../hc32_ll_driver/inc/hc32_ll_dmc.h | 0 .../hc32_ll_driver/inc/hc32_ll_dvp.h | 0 .../hc32_ll_driver/inc/hc32_ll_efm.h | 4 +- .../hc32_ll_driver/inc/hc32_ll_emb.h | 0 .../hc32_ll_driver/inc/hc32_ll_eth.h | 0 .../hc32_ll_driver/inc/hc32_ll_event_port.h | 0 .../hc32_ll_driver/inc/hc32_ll_fcg.h | 0 .../hc32_ll_driver/inc/hc32_ll_fcm.h | 0 .../hc32_ll_driver/inc/hc32_ll_fmac.h | 0 .../hc32_ll_driver/inc/hc32_ll_gpio.h | 0 .../hc32_ll_driver/inc/hc32_ll_hash.h | 0 .../hc32_ll_driver/inc/hc32_ll_hrpwm.h | 0 .../hc32_ll_driver/inc/hc32_ll_i2c.h | 0 .../hc32_ll_driver/inc/hc32_ll_i2s.h | 0 .../hc32_ll_driver/inc/hc32_ll_icg.h | 0 .../hc32_ll_driver/inc/hc32_ll_interrupts.h | 0 .../hc32_ll_driver/inc/hc32_ll_keyscan.h | 0 .../hc32_ll_driver/inc/hc32_ll_mau.h | 0 .../hc32_ll_driver/inc/hc32_ll_mpu.h | 0 .../hc32_ll_driver/inc/hc32_ll_nfc.h | 0 .../hc32_ll_driver/inc/hc32_ll_ots.h | 0 .../hc32_ll_driver/inc/hc32_ll_pwc.h | 0 .../hc32_ll_driver/inc/hc32_ll_qspi.h | 0 .../hc32_ll_driver/inc/hc32_ll_rmu.h | 0 .../hc32_ll_driver/inc/hc32_ll_rtc.h | 0 .../hc32_ll_driver/inc/hc32_ll_sdioc.h | 0 .../hc32_ll_driver/inc/hc32_ll_smc.h | 0 .../hc32_ll_driver/inc/hc32_ll_spi.h | 0 .../hc32_ll_driver/inc/hc32_ll_sram.h | 0 .../hc32_ll_driver/inc/hc32_ll_swdt.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr0.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr2.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr4.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmr6.h | 0 .../hc32_ll_driver/inc/hc32_ll_tmra.h | 0 .../hc32_ll_driver/inc/hc32_ll_trng.h | 0 .../hc32_ll_driver/inc/hc32_ll_usart.h | 0 .../hc32_ll_driver/inc/hc32_ll_usb.h | 0 .../hc32_ll_driver/inc/hc32_ll_utility.h | 0 .../hc32_ll_driver/inc/hc32_ll_wdt.h | 0 .../inc/hc32f4a0_ll_interrupts_share.h | 0 .../hc32_ll_driver/src/hc32_ll.c | 0 .../hc32_ll_driver/src/hc32_ll_adc.c | 0 .../hc32_ll_driver/src/hc32_ll_aes.c | 0 .../hc32_ll_driver/src/hc32_ll_aos.c | 0 .../hc32_ll_driver/src/hc32_ll_can.c | 0 .../hc32_ll_driver/src/hc32_ll_clk.c | 0 .../hc32_ll_driver/src/hc32_ll_cmp.c | 0 .../hc32_ll_driver/src/hc32_ll_crc.c | 0 .../hc32_ll_driver/src/hc32_ll_ctc.c | 0 .../hc32_ll_driver/src/hc32_ll_dac.c | 0 .../hc32_ll_driver/src/hc32_ll_dbgc.c | 0 .../hc32_ll_driver/src/hc32_ll_dcu.c | 0 .../hc32_ll_driver/src/hc32_ll_dma.c | 0 .../hc32_ll_driver/src/hc32_ll_dmc.c | 0 .../hc32_ll_driver/src/hc32_ll_dvp.c | 0 .../hc32_ll_driver/src/hc32_ll_efm.c | 0 .../hc32_ll_driver/src/hc32_ll_emb.c | 0 .../hc32_ll_driver/src/hc32_ll_eth.c | 0 .../hc32_ll_driver/src/hc32_ll_event_port.c | 0 .../hc32_ll_driver/src/hc32_ll_fcg.c | 0 .../hc32_ll_driver/src/hc32_ll_fcm.c | 0 .../hc32_ll_driver/src/hc32_ll_fmac.c | 0 .../hc32_ll_driver/src/hc32_ll_gpio.c | 0 .../hc32_ll_driver/src/hc32_ll_hash.c | 0 .../hc32_ll_driver/src/hc32_ll_hrpwm.c | 0 .../hc32_ll_driver/src/hc32_ll_i2c.c | 0 .../hc32_ll_driver/src/hc32_ll_i2s.c | 0 .../hc32_ll_driver/src/hc32_ll_icg.c | 0 .../hc32_ll_driver/src/hc32_ll_interrupts.c | 0 .../hc32_ll_driver/src/hc32_ll_keyscan.c | 0 .../hc32_ll_driver/src/hc32_ll_mau.c | 0 .../hc32_ll_driver/src/hc32_ll_mpu.c | 0 .../hc32_ll_driver/src/hc32_ll_nfc.c | 0 .../hc32_ll_driver/src/hc32_ll_ots.c | 0 .../hc32_ll_driver/src/hc32_ll_pwc.c | 0 .../hc32_ll_driver/src/hc32_ll_qspi.c | 0 .../hc32_ll_driver/src/hc32_ll_rmu.c | 0 .../hc32_ll_driver/src/hc32_ll_rtc.c | 0 .../hc32_ll_driver/src/hc32_ll_sdioc.c | 0 .../hc32_ll_driver/src/hc32_ll_smc.c | 0 .../hc32_ll_driver/src/hc32_ll_spi.c | 8 +- .../hc32_ll_driver/src/hc32_ll_sram.c | 0 .../hc32_ll_driver/src/hc32_ll_swdt.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr0.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr2.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr4.c | 0 .../hc32_ll_driver/src/hc32_ll_tmr6.c | 0 .../hc32_ll_driver/src/hc32_ll_tmra.c | 0 .../hc32_ll_driver/src/hc32_ll_trng.c | 0 .../hc32_ll_driver/src/hc32_ll_usart.c | 0 .../hc32_ll_driver/src/hc32_ll_usb.c | 0 .../hc32_ll_driver/src/hc32_ll_utility.c | 0 .../hc32_ll_driver/src/hc32_ll_wdt.c | 0 .../src/hc32f4a0_ll_interrupts_share.c | 0 bsp/hc32/platform/sfud/SConscript | 2 +- bsp/hc32/platform/tca9539/SConscript | 2 +- bsp/hc32/tests/SConscript | 98 + bsp/hc32/tests/test_adc.c | 157 + bsp/hc32/tests/test_can.c | 421 + bsp/hc32/tests/test_crypto.c | 300 + bsp/hc32/tests/test_dac.c | 106 + bsp/hc32/tests/test_eth.c | 74 + bsp/hc32/tests/test_fal.c | 134 + bsp/hc32/tests/test_gpio.c | 77 + bsp/hc32/tests/test_hwtimer.c | 164 + bsp/hc32/tests/test_i2c.c | 275 + bsp/hc32/tests/test_nand.c | 283 + bsp/hc32/tests/test_pfc8563_i2c.c | 206 + bsp/hc32/tests/test_pm.c | 456 + bsp/hc32/tests/test_pulse_encoder.c | 218 + bsp/hc32/tests/test_pwm.c | 68 + bsp/hc32/tests/test_qspi.c | 571 + bsp/hc32/tests/test_rtc.c | 271 + bsp/hc32/tests/test_sdmmc.c | 159 + bsp/hc32/tests/test_sdram.c | 184 + bsp/hc32/tests/test_soft_i2c.c | 312 + bsp/hc32/tests/test_spi.c | 353 + bsp/hc32/tests/test_tmr_capture.c | 297 + bsp/hc32/tests/test_uart_v1.c | 276 + bsp/hc32/tests/test_uart_v2.c | 297 + bsp/hc32/tests/test_usbd.c | 332 + bsp/hc32/tests/test_usbh.c | 116 + bsp/hc32/tests/test_wdt.c | 125 + 815 files changed, 16638 insertions(+), 346608 deletions(-) delete mode 100644 bsp/hc32/ev_hc32f448_lqfp80/board/ports/SConscript delete mode 100644 bsp/hc32/ev_hc32f448_lqfp80/board/ports/drv_spi_flash.c delete mode 100644 bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/SConscript delete mode 100644 bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/fal_flash_sfud_port.c rename bsp/hc32/ev_hc32f448_lqfp80/board/ports/{fal => }/fal_cfg.h (100%) delete mode 100644 bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.c delete mode 100644 bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.h create mode 100644 bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539_port.h create mode 100644 bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/tmr_capture_config.h delete mode 100644 bsp/hc32/ev_hc32f460_lqfp100_v2/board/ports/SConscript delete mode 100644 bsp/hc32/ev_hc32f460_lqfp100_v2/board/ports/drv_spi_flash.c delete mode 100644 bsp/hc32/ev_hc32f460_lqfp100_v2/board/ports/fal/SConscript delete mode 100644 bsp/hc32/ev_hc32f460_lqfp100_v2/board/ports/fal/fal_flash_sfud_port.c rename bsp/hc32/ev_hc32f460_lqfp100_v2/board/ports/{fal => }/fal_cfg.h (100%) create mode 100644 bsp/hc32/ev_hc32f472_lqfp100/.cproject create mode 100644 bsp/hc32/ev_hc32f472_lqfp100/.project create mode 100644 bsp/hc32/ev_hc32f472_lqfp100/board/config/usb_config/usb_app_conf.h create mode 100644 bsp/hc32/ev_hc32f472_lqfp100/board/config/usb_config/usb_bsp.h create mode 100644 bsp/hc32/ev_hc32f472_lqfp100/jlink/ev_hc32f472_lqfp100 Debug.launch create mode 100644 bsp/hc32/ev_hc32f4a0_lqfp176/board/config/tmr_capture_config.h delete mode 100644 bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/SConscript delete mode 100644 bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/drv_spi_flash.c delete mode 100644 bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/fal/SConscript delete mode 100644 bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/fal/fal_flash_sfud_port.c rename bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/{fal => }/fal_cfg.h (100%) delete mode 100644 bsp/hc32/ev_hc32f4a0_lqfp176/board/ports/tca9539.c rename bsp/hc32/{lckfb-hc32f4a0-lqfp100/board/ports/tca9539.h => ev_hc32f4a0_lqfp176/board/ports/tca9539_port.h} (54%) delete mode 100644 bsp/hc32/lckfb-hc32f4a0-lqfp100/board/ports/SConscript delete mode 100644 bsp/hc32/lckfb-hc32f4a0-lqfp100/board/ports/drv_spi_flash.c delete mode 100644 bsp/hc32/lckfb-hc32f4a0-lqfp100/board/ports/fal/SConscript delete mode 100644 bsp/hc32/lckfb-hc32f4a0-lqfp100/board/ports/fal/fal_flash_sfud_port.c rename bsp/hc32/lckfb-hc32f4a0-lqfp100/board/ports/{fal => }/fal_cfg.h (100%) delete mode 100644 bsp/hc32/lckfb-hc32f4a0-lqfp100/board/ports/tca9539.c rename bsp/hc32/{ev_hc32f4a0_lqfp176/board/ports/tca9539.h => lckfb-hc32f4a0-lqfp100/board/ports/tca9539_port.h} (54%) create mode 100644 bsp/hc32/libraries/hc32_drivers/drv_mcan.c create mode 100644 bsp/hc32/libraries/hc32_drivers/drv_mcan.h create mode 100644 bsp/hc32/libraries/hc32_drivers/drv_tmr_capture.c create mode 100644 bsp/hc32/libraries/hc32_drivers/drv_tmr_capture.h rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Include/hc32f448.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Include/hc32f4xx.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Include/system_hc32f448.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F448_128K.FLM (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F448_256K.FLM (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F448_RAM.FLM (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F448_otp.FLM (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/ram.ini (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F448.SFR (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f448.s (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/linker/HC32F448xA.ld (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/linker/HC32F448xC.ld (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f448.S (99%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/svd/HC32F448.svd (100%) rename bsp/hc32/libraries/hc32f448_ddl/{config => cmsis/Device/HDSC/hc32f4xx/Source/IAR}/flashloader/FlashHC32F448.mac (100%) rename bsp/hc32/libraries/hc32f448_ddl/{config => cmsis/Device/HDSC/hc32f4xx/Source/IAR}/flashloader/FlashHC32F448.out (100%) create mode 100644 bsp/hc32/libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448_otp.flash rename bsp/hc32/libraries/hc32f448_ddl/{config => cmsis/Device/HDSC/hc32f4xx/Source/IAR}/flashloader/FlashHC32F448_otp.out (100%) rename bsp/hc32/libraries/hc32f448_ddl/{config => cmsis/Device/HDSC/hc32f4xx/Source/IAR}/flashloader/FlashHC32F448_qspi.flash (60%) rename bsp/hc32/libraries/hc32f448_ddl/{config => cmsis/Device/HDSC/hc32f4xx/Source/IAR}/flashloader/FlashHC32F448_qspi.out (100%) create mode 100644 bsp/hc32/libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448xA.board create mode 100644 bsp/hc32/libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448xA.flash create mode 100644 bsp/hc32/libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448xC.board create mode 100644 bsp/hc32/libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448xC.flash rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/linker/HC32F448_RAM.icf (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/linker/HC32F448xA.icf (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/linker/HC32F448xC.icf (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f448.s (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F448.svd (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/system_hc32f448.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/arm_common_tables.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/arm_const_structs.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/arm_helium_utils.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/arm_math.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/arm_mve_tables.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/arm_vec_math.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/cachel1_armv7.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/cmsis_armcc.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/cmsis_armclang.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/cmsis_armclang_ltm.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/cmsis_compiler.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/cmsis_gcc.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/cmsis_iccarm.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/cmsis_version.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_armv81mml.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_armv8mbl.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_armv8mml.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm0.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm0plus.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm1.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm23.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm3.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm33.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm35p.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm4.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm55.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_cm7.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_sc000.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/core_sc300.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/mpu_armv7.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/mpu_armv8.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/pmu_armv8.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/cmsis/Include/tz_context.h (100%) delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/config/flashloader/FlashHC32F448_otp.flash delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/config/flashloader/FlashHC32F448xA.board delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/config/flashloader/FlashHC32F448xA.flash delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/config/flashloader/FlashHC32F448xC.board delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/config/flashloader/FlashHC32F448xC.flash delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/24cxx/24cxx.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/24cxx/24cxx.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/gt9xx/gt9xx.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/gt9xx/gt9xx.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/nt35510/nt35510.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/nt35510/nt35510.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/tca9539/tca9539.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/tca9539/tca9539.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/w25qxx/w25qxx.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/components/w25qxx/w25qxx.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_24cxx.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_24cxx.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_bsp.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_gt9xx.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_gt9xx.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_is61lv6416.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_is61lv6416.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_nt35510.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_nt35510.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_tca9539.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_tca9539.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_w25qxx.c delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/bsp/ev_hc32f448_lqfp80/ev_hc32f448_lqfp80_w25qxx.h delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448.mac delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448.out delete mode 100644 bsp/hc32/libraries/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448_otp.out rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_adc.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_aes.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_aos.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_clk.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_cmp.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_crc.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_ctc.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_dac.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_dbgc.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_dcu.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_def.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_dma.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_efm.h (99%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_emb.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_event_port.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_fcg.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_fcm.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_gpio.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_hash.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_i2c.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_icg.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_interrupts.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_keyscan.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_mcan.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_mpu.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_pwc.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_qspi.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_rmu.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_rtc.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_smc.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_spi.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_sram.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_swdt.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr0.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr4.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr6.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmra.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_trng.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_usart.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_utility.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_wdt.h (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_adc.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_aes.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_aos.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_clk.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_cmp.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_crc.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_ctc.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dac.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dbgc.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dcu.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dma.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_efm.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_emb.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_event_port.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_fcg.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_fcm.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_gpio.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_hash.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_i2c.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_icg.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_interrupts.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_keyscan.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_mcan.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_mpu.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_pwc.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_qspi.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_rmu.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_rtc.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_smc.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_spi.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_sram.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_swdt.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr0.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr4.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr6.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmra.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_trng.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_usart.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_utility.c (100%) rename bsp/hc32/libraries/hc32f448_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_wdt.c (100%) delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/README.txt rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Include/hc32f460.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Include/hc32f4xx.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Include/system_hc32f460.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F460_256K.FLM (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F460_512K.FLM (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F460_RAM.FLM (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F460_otp.FLM (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/ram.ini (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F460.SFR (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f460.s (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/linker/HC32F460xC.ld (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/linker/HC32F460xE.ld (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f460.S (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/svd/HC32F460.svd (100%) rename bsp/hc32/libraries/hc32f460_ddl/{config => cmsis/Device/HDSC/hc32f4xx/Source/IAR}/flashloader/FlashHC32F460.mac (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460.out (100%) create mode 100644 bsp/hc32/libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460_otp.flash rename bsp/hc32/libraries/hc32f460_ddl/{config => cmsis/Device/HDSC/hc32f4xx/Source/IAR}/flashloader/FlashHC32F460_otp.mac (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460_otp.out (100%) rename bsp/hc32/libraries/hc32f460_ddl/{config => cmsis/Device/HDSC/hc32f4xx/Source/IAR}/flashloader/FlashHC32F460_qspi.flash (60%) rename bsp/hc32/libraries/hc32f460_ddl/{config => cmsis/Device/HDSC/hc32f4xx/Source/IAR}/flashloader/FlashHC32F460_qspi.out (100%) create mode 100644 bsp/hc32/libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460xC.board create mode 100644 bsp/hc32/libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460xC.flash create mode 100644 bsp/hc32/libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460xE.board create mode 100644 bsp/hc32/libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460xE.flash rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/linker/HC32F460_RAM.icf (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/linker/HC32F460xC.icf (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/linker/HC32F460xE.icf (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f460.s (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F460.svd (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/system_hc32f460.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/arm_common_tables.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/arm_const_structs.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/arm_helium_utils.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/arm_math.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/arm_mve_tables.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/arm_vec_math.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/cachel1_armv7.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/cmsis_armcc.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/cmsis_armclang.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/cmsis_armclang_ltm.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/cmsis_compiler.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/cmsis_gcc.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/cmsis_iccarm.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/cmsis_version.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_armv81mml.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_armv8mbl.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_armv8mml.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm0.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm0plus.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm1.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm23.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm3.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm33.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm35p.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm4.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm55.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_cm7.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_sc000.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/core_sc300.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/mpu_armv7.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/mpu_armv8.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/pmu_armv8.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/cmsis/Include/tz_context.h (100%) delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460.out delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460_otp.flash delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460_otp.out delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460xC.board delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460xC.flash delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460xE.board delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/config/flashloader/FlashHC32F460xE.flash delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/config/flashloader/HC32F460xC.board delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/config/flashloader/HC32F460xE.board delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/components/24cxx/24cxx.c delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/components/24cxx/24cxx.h delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/components/w25qxx/w25qxx.c delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/components/w25qxx/w25qxx.h delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/components/wm8731/wm8731.c delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/components/wm8731/wm8731.h delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/ev_hc32f460_lqfp100_v2/ev_hc32f460_lqfp100_v2.c delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/ev_hc32f460_lqfp100_v2/ev_hc32f460_lqfp100_v2.h delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/ev_hc32f460_lqfp100_v2/ev_hc32f460_lqfp100_v2_24cxx.c delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/ev_hc32f460_lqfp100_v2/ev_hc32f460_lqfp100_v2_24cxx.h delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/ev_hc32f460_lqfp100_v2/ev_hc32f460_lqfp100_v2_bsp.h delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/ev_hc32f460_lqfp100_v2/ev_hc32f460_lqfp100_v2_w25qxx.c delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/ev_hc32f460_lqfp100_v2/ev_hc32f460_lqfp100_v2_w25qxx.h delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/ev_hc32f460_lqfp100_v2/ev_hc32f460_lqfp100_v2_wm8731.c delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/bsp/ev_hc32f460_lqfp100_v2/ev_hc32f460_lqfp100_v2_wm8731.h delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HDSC_HC32F460.SFR delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/GCC/svd/HDSC_HC32F460.svd delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460.mac delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460_otp.mac delete mode 100644 bsp/hc32/libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HDSC_HC32F460.svd rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_adc.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_aes.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_aos.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_can.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_clk.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_cmp.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_crc.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_dbgc.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_dcu.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_def.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_dma.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_efm.h (99%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_emb.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_event_port.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_fcg.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_fcm.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_gpio.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_hash.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_i2c.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_i2s.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_icg.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_interrupts.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_keyscan.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_mpu.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_ots.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_pwc.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_qspi.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_rmu.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_rtc.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_sdioc.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_spi.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_sram.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_swdt.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr0.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr4.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr6.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmra.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_trng.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_usart.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_usb.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_utility.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_wdt.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/inc/hc32f460_ll_interrupts_share.h (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_adc.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_aes.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_aos.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_can.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_clk.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_cmp.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_crc.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dbgc.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dcu.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dma.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_efm.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_emb.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_event_port.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_fcg.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_fcm.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_gpio.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_hash.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_i2c.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_i2s.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_icg.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_interrupts.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_keyscan.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_mpu.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_ots.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_pwc.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_qspi.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_rmu.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_rtc.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_sdioc.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_spi.c (99%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_sram.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_swdt.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr0.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr4.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr6.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmra.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_trng.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_usart.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_usb.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_utility.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_wdt.c (100%) rename bsp/hc32/libraries/hc32f460_ddl/{drivers => }/hc32_ll_driver/src/hc32f460_ll_interrupts_share.c (100%) create mode 100644 bsp/hc32/libraries/hc32f472_ddl/cmsis/Device/HDSC/hc32f4xx/Source/GCC/linker/HC32F472xE.ld delete mode 100644 bsp/hc32/libraries/hc32f4a0_ddl/README.txt rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Include/hc32f4a0.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Include/hc32f4xx.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Include/system_hc32f4a0.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F4A0_1M.FLM (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F4A0_2M.FLM (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F4A0_512K_0.FLM (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F4A0_512K_1.FLM (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F4A0_RAM.FLM (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/HC32F4A0_otp.FLM (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/flashloader/ram.ini (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F4A0.SFR (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f4a0.s (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/linker/HC32F4A0xG.ld (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/linker/HC32F4A0xI.ld (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f4a0.S (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers 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bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_hrpwm.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_i2c.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_i2s.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_icg.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_interrupts.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_keyscan.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_mau.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_mpu.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_nfc.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_ots.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_pwc.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_qspi.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_rmu.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_rtc.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_sdioc.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_smc.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_spi.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_sram.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_swdt.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr0.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr2.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr4.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmr6.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_tmra.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_trng.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_usart.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_usb.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_utility.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32_ll_wdt.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/inc/hc32f4a0_ll_interrupts_share.h (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_adc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_aes.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_aos.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_can.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_clk.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_cmp.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_crc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_ctc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dac.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dbgc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dcu.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dma.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dmc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_dvp.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_efm.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_emb.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_eth.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_event_port.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_fcg.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_fcm.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_fmac.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_gpio.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_hash.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_hrpwm.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_i2c.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_i2s.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_icg.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_interrupts.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_keyscan.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_mau.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_mpu.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_nfc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_ots.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_pwc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_qspi.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_rmu.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_rtc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_sdioc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_smc.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_spi.c (99%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_sram.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_swdt.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr0.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr2.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr4.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmr6.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_tmra.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_trng.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_usart.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_usb.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_utility.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32_ll_wdt.c (100%) rename bsp/hc32/libraries/hc32f4a0_ddl/{drivers => }/hc32_ll_driver/src/hc32f4a0_ll_interrupts_share.c (100%) create mode 100644 bsp/hc32/tests/SConscript create mode 100644 bsp/hc32/tests/test_adc.c create mode 100644 bsp/hc32/tests/test_can.c create mode 100644 bsp/hc32/tests/test_crypto.c create mode 100644 bsp/hc32/tests/test_dac.c create mode 100644 bsp/hc32/tests/test_eth.c create mode 100644 bsp/hc32/tests/test_fal.c create mode 100644 bsp/hc32/tests/test_gpio.c create mode 100644 bsp/hc32/tests/test_hwtimer.c create mode 100644 bsp/hc32/tests/test_i2c.c create mode 100644 bsp/hc32/tests/test_nand.c create mode 100644 bsp/hc32/tests/test_pfc8563_i2c.c create mode 100644 bsp/hc32/tests/test_pm.c create mode 100644 bsp/hc32/tests/test_pulse_encoder.c create mode 100644 bsp/hc32/tests/test_pwm.c create mode 100644 bsp/hc32/tests/test_qspi.c create mode 100644 bsp/hc32/tests/test_rtc.c create mode 100644 bsp/hc32/tests/test_sdmmc.c create mode 100644 bsp/hc32/tests/test_sdram.c create mode 100644 bsp/hc32/tests/test_soft_i2c.c create mode 100644 bsp/hc32/tests/test_spi.c create mode 100644 bsp/hc32/tests/test_tmr_capture.c create mode 100644 bsp/hc32/tests/test_uart_v1.c create mode 100644 bsp/hc32/tests/test_uart_v2.c create mode 100644 bsp/hc32/tests/test_usbd.c create mode 100644 bsp/hc32/tests/test_usbh.c create mode 100644 bsp/hc32/tests/test_wdt.c diff --git a/bsp/hc32/ev_hc32f448_lqfp80/.config b/bsp/hc32/ev_hc32f448_lqfp80/.config index d6c32cff916..8c7b664b6aa 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/.config +++ b/bsp/hc32/ev_hc32f448_lqfp80/.config @@ -1,15 +1,117 @@ + # -# Automatically generated file; DO NOT EDIT. -# RT-Thread Configuration +# RT-Thread Kernel # # -# RT-Thread Kernel +# klibc options +# + +# +# rt_vsnprintf options +# +# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set +# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set +# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set +# end of rt_vsnprintf options + +# +# rt_vsscanf options +# +# CONFIG_RT_KLIBC_USING_LIBC_VSSCANF is not set +# end of rt_vsscanf options + +# +# rt_memset options +# +# CONFIG_RT_KLIBC_USING_USER_MEMSET is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMSET is not set +# CONFIG_RT_KLIBC_USING_TINY_MEMSET is not set +# end of rt_memset options + +# +# rt_memcpy options +# +# CONFIG_RT_KLIBC_USING_USER_MEMCPY is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMCPY is not set +# CONFIG_RT_KLIBC_USING_TINY_MEMCPY is not set +# end of rt_memcpy options + +# +# rt_memmove options +# +# CONFIG_RT_KLIBC_USING_USER_MEMMOVE is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMMOVE is not set +# end of rt_memmove options + +# +# rt_memcmp options +# +# CONFIG_RT_KLIBC_USING_USER_MEMCMP is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMCMP is not set +# end of rt_memcmp options + +# +# rt_strstr options +# +# CONFIG_RT_KLIBC_USING_USER_STRSTR is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRSTR is not set +# end of rt_strstr options + +# +# rt_strcasecmp options +# +# CONFIG_RT_KLIBC_USING_USER_STRCASECMP is not set +# end of rt_strcasecmp options + +# +# rt_strncpy options +# +# CONFIG_RT_KLIBC_USING_USER_STRNCPY is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRNCPY is not set +# end of rt_strncpy options + +# +# rt_strcpy options +# +# CONFIG_RT_KLIBC_USING_USER_STRCPY is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRCPY is not set +# end of rt_strcpy options + +# +# rt_strncmp options +# +# CONFIG_RT_KLIBC_USING_USER_STRNCMP is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRNCMP is not set +# end of rt_strncmp options + +# +# rt_strcmp options +# +# CONFIG_RT_KLIBC_USING_USER_STRCMP is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRCMP is not set +# end of rt_strcmp options + +# +# rt_strlen options +# +# CONFIG_RT_KLIBC_USING_USER_STRLEN is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRLEN is not set +# end of rt_strlen options + # +# rt_strnlen options +# +# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set +# end of rt_strnlen options + +# CONFIG_RT_UTEST_TC_USING_KLIBC is not set +# end of klibc options + CONFIG_RT_NAME_MAX=8 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set -# CONFIG_RT_USING_SMART is not set # CONFIG_RT_USING_NANO is not set +# CONFIG_RT_USING_SMART is not set # CONFIG_RT_USING_AMP is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_CPUS_NR=1 @@ -27,18 +129,20 @@ CONFIG_RT_USING_IDLE_HOOK=y CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 CONFIG_IDLE_THREAD_STACK_SIZE=256 # CONFIG_RT_USING_TIMER_SOFT is not set +# CONFIG_RT_USING_CPU_USAGE_TRACER is not set # -# kservice optimization +# kservice options # -# CONFIG_RT_KSERVICE_USING_STDLIB is not set -# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set # CONFIG_RT_USING_TINY_FFS is not set -# CONFIG_RT_KPRINTF_USING_LONGLONG is not set +# end of kservice options + CONFIG_RT_USING_DEBUG=y +CONFIG_RT_DEBUGING_ASSERT=y CONFIG_RT_DEBUGING_COLOR=y CONFIG_RT_DEBUGING_CONTEXT=y # CONFIG_RT_DEBUGING_AUTO_INIT is not set +# CONFIG_RT_USING_CI_ACTION is not set # # Inter-Thread communication @@ -50,6 +154,7 @@ CONFIG_RT_USING_MAILBOX=y CONFIG_RT_USING_MESSAGEQUEUE=y # CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set # CONFIG_RT_USING_SIGNALS is not set +# end of Inter-Thread communication # # Memory Management @@ -66,21 +171,21 @@ CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y # CONFIG_RT_USING_MEMTRACE is not set # CONFIG_RT_USING_HEAP_ISR is not set CONFIG_RT_USING_HEAP=y +# end of Memory Management + CONFIG_RT_USING_DEVICE=y # CONFIG_RT_USING_DEVICE_OPS is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set # CONFIG_RT_USING_THREADSAFE_PRINTF is not set -# CONFIG_RT_USING_SCHED_THREAD_CTX is not set CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart2" -CONFIG_RT_VER_NUM=0x50100 +CONFIG_RT_VER_NUM=0x50200 # CONFIG_RT_USING_STDC_ATOMIC is not set CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 -# CONFIG_RT_USING_CACHE is not set +# end of RT-Thread Kernel + CONFIG_RT_USING_HW_ATOMIC=y -# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set -# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set CONFIG_RT_USING_CPU_FFS=y CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM_CORTEX_M=y @@ -115,12 +220,15 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y # DFS: device virtual file system # # CONFIG_RT_USING_DFS is not set +# end of DFS: device virtual file system + # CONFIG_RT_USING_FAL is not set # # Device Drivers # # CONFIG_RT_USING_DM is not set +# CONFIG_RT_USING_DEV_BUS is not set CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_UNAMED_PIPE_NUMBER=64 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y @@ -131,16 +239,24 @@ CONFIG_RT_USING_SERIAL_V1=y # CONFIG_RT_USING_SERIAL_V2 is not set CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_SERIAL_BYPASS is not set # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_CPUTIME is not set -# CONFIG_RT_USING_I2C is not set +CONFIG_RT_USING_I2C=y +# CONFIG_RT_I2C_DEBUG is not set +CONFIG_RT_USING_I2C_BITOPS=y +# CONFIG_RT_I2C_BITOPS_DEBUG is not set +# CONFIG_RT_USING_SOFT_I2C is not set # CONFIG_RT_USING_PHY is not set +# CONFIG_RT_USING_PHY_V2 is not set # CONFIG_RT_USING_ADC is not set # CONFIG_RT_USING_DAC is not set # CONFIG_RT_USING_NULL is not set # CONFIG_RT_USING_ZERO is not set # CONFIG_RT_USING_RANDOM is not set # CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set # CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_PM is not set @@ -153,21 +269,14 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_TOUCH is not set # CONFIG_RT_USING_LCD is not set # CONFIG_RT_USING_HWCRYPTO is not set -# CONFIG_RT_USING_PULSE_ENCODER is not set -# CONFIG_RT_USING_INPUT_CAPTURE is not set -# CONFIG_RT_USING_DEV_BUS is not set # CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_BLK is not set # CONFIG_RT_USING_VIRTIO is not set CONFIG_RT_USING_PIN=y # CONFIG_RT_USING_KTIME is not set # CONFIG_RT_USING_HWTIMER is not set - -# -# Using USB -# -# CONFIG_RT_USING_USB is not set -# CONFIG_RT_USING_USB_HOST is not set -# CONFIG_RT_USING_USB_DEVICE is not set +# CONFIG_RT_USING_CHERRYUSB is not set +# end of Device Drivers # # C/C++ and POSIX layer @@ -185,6 +294,8 @@ CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8 CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0 CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 +# end of Timezone and Daylight Saving Time +# end of ISO-ANSI C layer # # POSIX (Portable Operating System Interface) layer @@ -206,7 +317,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # Socket is in the 'Network' category # +# end of Interprocess Communication (IPC) +# end of POSIX (Portable Operating System Interface) layer + # CONFIG_RT_USING_CPLUSPLUS is not set +# end of C/C++ and POSIX layer # # Network @@ -215,12 +330,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_RT_USING_NETDEV is not set # CONFIG_RT_USING_LWIP is not set # CONFIG_RT_USING_AT is not set +# end of Network # # Memory protection # # CONFIG_RT_USING_MEM_PROTECTION is not set # CONFIG_RT_USING_HW_STACK_GUARD is not set +# end of Memory protection # # Utilities @@ -232,12 +349,25 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_RT_USING_RESOURCE_ID is not set # CONFIG_RT_USING_ADT is not set # CONFIG_RT_USING_RT_LINK is not set +# end of Utilities + # CONFIG_RT_USING_VBUS is not set +# +# Using USB legacy version +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set +# end of Using USB legacy version + +# CONFIG_RT_USING_FDT is not set +# end of RT-Thread Components + # # RT-Thread Utestcases # # CONFIG_RT_USING_UTESTCASES is not set +# end of RT-Thread Utestcases # # RT-Thread online packages @@ -246,7 +376,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # IoT - internet of things # -# CONFIG_PKG_USING_LWIP is not set # CONFIG_PKG_USING_LORAWAN_DRIVER is not set # CONFIG_PKG_USING_PAHOMQTT is not set # CONFIG_PKG_USING_UMQTT is not set @@ -259,6 +388,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_FREEMODBUS is not set # CONFIG_PKG_USING_NANOPB is not set +# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set # # Wi-Fi @@ -268,27 +398,35 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # Marvell WiFi # # CONFIG_PKG_USING_WLANMARVELL is not set +# end of Marvell WiFi # # Wiced WiFi # # CONFIG_PKG_USING_WLAN_WICED is not set +# end of Wiced WiFi + # CONFIG_PKG_USING_RW007 is not set # # CYW43012 WiFi # # CONFIG_PKG_USING_WLAN_CYW43012 is not set +# end of CYW43012 WiFi # # BL808 WiFi # # CONFIG_PKG_USING_WLAN_BL808 is not set +# end of BL808 WiFi # # CYW43439 WiFi # # CONFIG_PKG_USING_WLAN_CYW43439 is not set +# end of CYW43439 WiFi +# end of Wi-Fi + # CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NETUTILS is not set @@ -311,6 +449,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set # CONFIG_PKG_USING_JOYLINK is not set # CONFIG_PKG_USING_IOTSHARP_SDK is not set +# end of IoT Cloud + # CONFIG_PKG_USING_NIMBLE is not set # CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set # CONFIG_PKG_USING_OTA_DOWNLOADER is not set @@ -353,6 +493,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ZEPHYR_POLLING is not set # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set # CONFIG_PKG_USING_LHC_MODBUS is not set +# CONFIG_PKG_USING_QMODBUS is not set +# end of IoT - internet of things # # security packages @@ -363,6 +505,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_TINYCRYPT is not set # CONFIG_PKG_USING_TFM is not set # CONFIG_PKG_USING_YD_CRYPTO is not set +# end of security packages # # language packages @@ -378,18 +521,22 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_PARSON is not set +# end of JSON: JavaScript Object Notation, a lightweight data-interchange format # # XML: Extensible Markup Language # # CONFIG_PKG_USING_SIMPLE_XML is not set # CONFIG_PKG_USING_EZXML is not set +# end of XML: Extensible Markup Language + # CONFIG_PKG_USING_LUATOS_SOC is not set # CONFIG_PKG_USING_LUA is not set # CONFIG_PKG_USING_JERRYSCRIPT is not set # CONFIG_PKG_USING_MICROPYTHON is not set # CONFIG_PKG_USING_PIKASCRIPT is not set # CONFIG_PKG_USING_RTT_RUST is not set +# end of language packages # # multimedia packages @@ -401,12 +548,15 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_LVGL is not set # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set # CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set +# end of LVGL: powerful and easy-to-use embedded GUI library # # u8g2: a monochrome graphic library # # CONFIG_PKG_USING_U8G2_OFFICIAL is not set # CONFIG_PKG_USING_U8G2 is not set +# end of u8g2: a monochrome graphic library + # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set @@ -427,6 +577,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_GUIENGINE is not set # CONFIG_PKG_USING_PERSIMMON is not set # CONFIG_PKG_USING_3GPP_AMRNB is not set +# end of multimedia packages # # tools packages @@ -476,6 +627,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_VOFA_PLUS is not set # CONFIG_PKG_USING_RT_TRACE is not set # CONFIG_PKG_USING_ZDEBUG is not set +# end of tools packages # # system packages @@ -487,6 +639,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_RT_MEMCPY_CM is not set # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set +# end of enhanced kernel services + +# CONFIG_PKG_USING_AUNITY is not set # # acceleration: Assembly language or algorithmic acceleration packages @@ -494,6 +649,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_QFPLIB_M0_FULL is not set # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set # CONFIG_PKG_USING_QFPLIB_M3 is not set +# end of acceleration: Assembly language or algorithmic acceleration packages # # CMSIS: ARM Cortex-M Microcontroller Software Interface Standard @@ -504,6 +660,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_CMSIS_NN is not set # CONFIG_PKG_USING_CMSIS_RTOS1 is not set # CONFIG_PKG_USING_CMSIS_RTOS2 is not set +# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard # # Micrium: Micrium software products porting for RT-Thread @@ -514,6 +671,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_UC_CLK is not set # CONFIG_PKG_USING_UC_COMMON is not set # CONFIG_PKG_USING_UC_MODBUS is not set +# end of Micrium: Micrium software products porting for RT-Thread + # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set # CONFIG_PKG_USING_LITEOS_SDK is not set # CONFIG_PKG_USING_TZ_DATABASE is not set @@ -561,6 +720,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_RTP is not set # CONFIG_PKG_USING_REB is not set # CONFIG_PKG_USING_R_RHEALSTONE is not set +# end of system packages # # peripheral libraries and drivers @@ -573,9 +733,27 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # STM32 HAL & SDK Drivers # -# CONFIG_PKG_USING_STM32L4XX_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32_SDIO is not set +# end of STM32 HAL & SDK Drivers + +# +# Infineon HAL Packages +# +# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set +# CONFIG_PKG_USING_INFINEON_CMSIS is not set +# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set +# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set +# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set +# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set +# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set +# CONFIG_PKG_USING_INFINEON_USBDEV is not set +# end of Infineon HAL Packages + # CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_EMBARC_BSP is not set # CONFIG_PKG_USING_ESP_IDF is not set @@ -585,9 +763,12 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # CONFIG_PKG_USING_K210_SDK is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set +# end of Kendryte SDK + # CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_NRFX is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# end of HAL & SDK Drivers # # sensors drivers @@ -657,6 +838,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_STHS34PF80 is not set +# end of sensors drivers # # touch drivers @@ -671,6 +853,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_XPT2046_TOUCH is not set # CONFIG_PKG_USING_CST816X is not set # CONFIG_PKG_USING_CST812T is not set +# end of touch drivers + # CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set @@ -743,6 +927,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_RGPOWER is not set # CONFIG_PKG_USING_SPI_TOOLS is not set +# end of peripheral libraries and drivers # # AI packages @@ -757,15 +942,18 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set # CONFIG_PKG_USING_R_TINYMAIX is not set +# end of AI packages # # Signal Processing and Control Algorithm Packages # +# CONFIG_PKG_USING_APID is not set # CONFIG_PKG_USING_FIRE_PID_CURVE is not set # CONFIG_PKG_USING_QPID is not set # CONFIG_PKG_USING_UKAL is not set # CONFIG_PKG_USING_DIGITALCTRL is not set # CONFIG_PKG_USING_KISSFFT is not set +# end of Signal Processing and Control Algorithm Packages # # miscellaneous packages @@ -774,6 +962,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # project laboratory # +# end of project laboratory # # samples: kernel and components samples @@ -782,6 +971,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set # CONFIG_PKG_USING_NETWORK_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# end of samples: kernel and components samples # # entertainment: terminal games and other interesting software packages @@ -798,6 +988,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_COWSAY is not set # CONFIG_PKG_USING_MORSE is not set # CONFIG_PKG_USING_TINYSQUARE is not set +# end of entertainment: terminal games and other interesting software packages + # CONFIG_PKG_USING_LIBCSV is not set # CONFIG_PKG_USING_OPTPARSE is not set # CONFIG_PKG_USING_FASTLZ is not set @@ -831,6 +1023,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_SOEM is not set # CONFIG_PKG_USING_QPARAM is not set # CONFIG_PKG_USING_CorevMCU_CLI is not set +# end of miscellaneous packages # # Arduino libraries @@ -846,6 +1039,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set +# end of Projects and Demos # # Sensors @@ -985,6 +1179,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set # CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set # CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set +# end of Sensors # # Display @@ -996,6 +1192,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set # CONFIG_PKG_USING_SEEED_TM1637 is not set +# end of Display # # Timing @@ -1004,6 +1201,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set # CONFIG_PKG_USING_ARDUINO_TICKER is not set # CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set +# end of Timing # # Data Processing @@ -1011,6 +1209,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set # CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set # CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set +# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set +# end of Data Processing # # Data Storage @@ -1021,6 +1221,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set +# end of Communication # # Device Control @@ -1032,12 +1233,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set # CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set +# end of Device Control # # Other # # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set +# end of Other # # Signal IO @@ -1050,10 +1253,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set +# end of Signal IO # # Uncategorized # +# end of Arduino libraries +# end of RT-Thread online packages + CONFIG_SOC_FAMILY_HC32=y CONFIG_SOC_SERIES_HC32F4=y @@ -1069,12 +1276,15 @@ CONFIG_BSP_USING_ON_CHIP_FLASH_CACHE=y CONFIG_BSP_USING_ON_CHIP_FLASH_ICODE_CACHE=y CONFIG_BSP_USING_ON_CHIP_FLASH_DCODE_CACHE=y CONFIG_BSP_USING_ON_CHIP_FLASH_ICODE_PREFETCH=y +# end of On-chip Drivers # # Onboard Peripheral Drivers # -# CONFIG_BSP_USING_TCA9539 is not set +CONFIG_BSP_USING_TCA9539=y # CONFIG_BSP_USING_SPI_FLASH is not set +CONFIG_BSP_USING_EXT_IO=y +# end of Onboard Peripheral Drivers # # On-chip Peripheral Drivers @@ -1083,18 +1293,24 @@ CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_UART=y # CONFIG_BSP_USING_UART1 is not set CONFIG_BSP_USING_UART2=y -CONFIG_BSP_UART2_RX_USING_DMA=y -CONFIG_BSP_UART2_TX_USING_DMA=y +# CONFIG_BSP_UART2_RX_USING_DMA is not set +# CONFIG_BSP_UART2_TX_USING_DMA is not set # CONFIG_BSP_USING_UART3 is not set # CONFIG_BSP_USING_UART4 is not set # CONFIG_BSP_USING_UART5 is not set # CONFIG_BSP_USING_UART6 is not set -# CONFIG_BSP_USING_I2C is not set +CONFIG_BSP_USING_I2C=y +# CONFIG_BSP_USING_I2C1_SW is not set +CONFIG_BSP_USING_I2C_HW=y +CONFIG_BSP_USING_I2C1=y +# CONFIG_BSP_I2C1_TX_USING_DMA is not set +# CONFIG_BSP_I2C1_RX_USING_DMA is not set +# CONFIG_BSP_USING_I2C2 is not set # CONFIG_BSP_USING_ON_CHIP_FLASH is not set # CONFIG_BSP_USING_SPI is not set # CONFIG_BSP_USING_ADC is not set # CONFIG_BSP_USING_DAC is not set -# CONFIG_BSP_USING_CAN is not set +# CONFIG_BSP_USING_MCAN is not set # CONFIG_BSP_USING_WDT_TMR is not set # CONFIG_BSP_USING_RTC is not set # CONFIG_BSP_USING_PM is not set @@ -1104,7 +1320,9 @@ CONFIG_BSP_UART2_TX_USING_DMA=y # CONFIG_BSP_USING_PULSE_ENCODER is not set # CONFIG_BSP_USING_HWTIMER is not set # CONFIG_BSP_USING_SENSOR is not set +# end of On-chip Peripheral Drivers # # Board extended module Drivers # +# end of Hardware Drivers Config diff --git a/bsp/hc32/ev_hc32f448_lqfp80/.cproject b/bsp/hc32/ev_hc32f448_lqfp80/.cproject index 5cfcd3d9d9f..f24a2c2e431 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/.cproject +++ b/bsp/hc32/ev_hc32f448_lqfp80/.cproject @@ -68,10 +68,14 @@ - - - + + + + + + + @@ -163,10 +167,14 @@ - - - + + + + + + + @@ -186,7 +194,7 @@ - + diff --git a/bsp/hc32/ev_hc32f448_lqfp80/.project b/bsp/hc32/ev_hc32f448_lqfp80/.project index d8904aee726..cb1c6b03b3a 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/.project +++ b/bsp/hc32/ev_hc32f448_lqfp80/.project @@ -64,5 +64,15 @@ 2 $%7BPARENT-1-PROJECT_LOC%7D/libraries + + rt-thread/bsp/hc32/platform + 2 + PARENT-1-PROJECT_LOC/platform + + + rt-thread/bsp/hc32/tests + 2 + PARENT-1-PROJECT_LOC/tests + diff --git a/bsp/hc32/ev_hc32f448_lqfp80/README.md b/bsp/hc32/ev_hc32f448_lqfp80/README.md index 8fb40187348..aedac9baecb 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/README.md +++ b/bsp/hc32/ev_hc32f448_lqfp80/README.md @@ -50,35 +50,43 @@ EV_F448_LQ80_Rev1.0 开发板常用 **板载资源** 如下： 本 BSP 目前对外设的支持情况如下： -| **板载外设** | **支持情况** | **备注** | -| :------------ | :-----------: | :-----------------------------------: | -| USB 转串口 | 支持 | 使用 UART2 | -| LED | 支持 | LED1~4 | - -| **片上外设** | **支持情况** | **备注** | -| :------------ | :-----------: | :-----------------------------------: | -| ADC | 支持 | ADC1: CH10, CH11,
ADC3: CH1 | -| CAN | 支持 | CAN1、CAN2 | -| GPIO | 支持 | PA0, PA1... PH2 ---> PIN: 0, 1...82 | -| I2C | 支持 | 软件模拟
硬件I2C1~2
I2C1支持EEPROM（BL24C256） | -| Hwtimer | 支持 | Hwtimer1~5 | -| SPI | 支持 | SPI1~3
SPI1支持W25Q | -| UART | 支持 | UART1~6
UART2为console使用 | - +| **板载外设** | **支持情况** | **备注** | +|:-------- |:--------:|:--------:| +| USB 转串口 | 支持 | 使用 UART2 | +| LED | 支持 | LED1~4 | + +| **片上外设** | **支持情况** | **备注** | +|:------------- |:--------:|:------------------------------------------:| +| Crypto | 支持 | AES, CRC, HASH, RNG, UID | +| DAC | 支持 | | +| ADC | 支持 | ADC1: CH10, CH11,
ADC3: CH1 | +| CAN | 支持 | CAN1、CAN2 | +| GPIO | 支持 | PA0, PA1... PH2 ---> PIN: 0, 1...82 | +| I2C | 支持 | 软件模拟
硬件I2C1~2
I2C1支持EEPROM（BL24C256） | +| PM | 支持 | | +| Lptimer | 支持 | | +| Hwtimer | 支持 | Hwtimer1~5 | +| Pulse_encoder | 支持 | | +| PWM | 支持 | | +| RTC | 支持 | 闹钟精度为1分钟 | +| WDT | 支持 | | +| I2C | 支持 | 软件、硬件 I2C | +| QSPI | 支持 | | +| SPI | 支持 | SPI1~3
SPI1支持W25Q | +| UART | 支持 | UART1~6
UART2为console使用 | ## 使用说明 使用说明分为如下两个章节： - 快速上手 - + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 - 进阶使用 - + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 - ### 快速上手 本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 @@ -120,9 +128,13 @@ msh > 4. 输入`scons --target=mdk5/iar` 命令重新生成工程。 ## 注意事项 -无 + +| 板载外设 | 模式 | 注意事项 | +| ---- | ---- | ------------------------------------------------------------------------------------------------------ | +| USB | host | 若配置为U盘主机模式，出现部分U盘无法识别或者写入失败时，可以尝试将RTT抽象层中rt_udisk_run()函数的rt_usbh_storage_reset()操作注释掉，测试是否可以获得更好的兼容性。 | + ## 联系人信息 维护人: -- [小华半导体MCU](https://www.xhsc.com.cn)，邮箱： \ No newline at end of file +- [小华半导体MCU](https://www.xhsc.com.cn)，邮箱： \ No newline at end of file diff --git a/bsp/hc32/ev_hc32f448_lqfp80/SConstruct b/bsp/hc32/ev_hc32f448_lqfp80/SConstruct index ded3f4c66f5..a23677c9842 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/SConstruct +++ b/bsp/hc32/ev_hc32f448_lqfp80/SConstruct @@ -56,7 +56,13 @@ objs.extend(SConscript(os.path.join(libraries_path_prefix, hc32_library, 'SConsc # include drivers objs.extend(SConscript(os.path.join(libraries_path_prefix, 'hc32_drivers', 'SConscript'))) -objs.extend(SConscript(os.path.join(os.getcwd(), 'board', 'ports', 'SConscript'))) +# include platform +platform_path_prefix = os.path.dirname(SDK_ROOT) + '/platform' +objs.extend(SConscript(os.path.join(platform_path_prefix, 'SConscript'))) + +# include tests +test_path_prefix = os.path.dirname(SDK_ROOT) + '/tests' +objs.extend(SConscript(os.path.join(test_path_prefix, 'SConscript'))) # make a building DoBuilding(TARGET, objs) diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig b/bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig index 5af9b90959f..b8b97d7c755 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig @@ -42,12 +42,17 @@ menu "Onboard Peripheral Drivers" select RT_USING_MTD_NOR default n + config BSP_USING_EXT_IO + bool + default y + endmenu menu "On-chip Peripheral Drivers" config BSP_USING_GPIO bool "Enable GPIO" select RT_USING_PIN + select BSP_USING_TCA9539 default y menuconfig BSP_USING_UART @@ -212,12 +217,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_I2C1_SW config BSP_I2C1_SCL_PIN int "i2c1 scl pin number" - range 1 176 - default 51 + range 1 80 + default 10 config BSP_I2C1_SDA_PIN int "I2C1 sda pin number" - range 1 176 - default 90 + range 1 80 + default 9 endif endif @@ -368,23 +373,20 @@ menu "On-chip Peripheral Drivers" config BSP_USING_DAC1 bool "using dac1" default n - config BSP_USING_DAC2 - bool "using dac2" - default n endif - menuconfig BSP_USING_CAN - bool "Enable CAN" + menuconfig BSP_USING_MCAN + bool "Enable MCAN" default n select RT_USING_CAN select RT_CAN_USING_HDR select BSP_USING_TCA9539 - if BSP_USING_CAN - config BSP_USING_CAN1 - bool "using can1" + if BSP_USING_MCAN + config BSP_USING_MCAN1 + bool "using mcan1" default n - config BSP_USING_CAN2 - bool "using can2" + config BSP_USING_MCAN2 + bool "using mcan2" default n endif @@ -418,10 +420,13 @@ menu "On-chip Peripheral Drivers" default BSP_RTC_USING_XTAL32 config BSP_RTC_USING_XTAL32 - bool "RTC USING XTAL32" + bool "RTC Using XTAL32" config BSP_RTC_USING_LRC - bool "RTC USING LRC" + bool "RTC Using LRC" + + config BSP_RTC_USING_XTAL_DIV + bool "RTC Using XTAL Division" endchoice endif diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/SConscript b/bsp/hc32/ev_hc32f448_lqfp80/board/SConscript index 2062a20a604..16b28817c8d 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/SConscript +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/SConscript @@ -12,12 +12,6 @@ board.c board_config.c ''') -if GetDepend(['BSP_USING_TCA9539']): - src += Glob('ports/tca9539.c') - -if GetDepend(['BSP_USING_SPI_FLASH']): - src += Glob('ports/drv_spi_flash.c') - path = [cwd] path += [cwd + '/ports'] path += [cwd + '/config'] @@ -25,11 +19,11 @@ path += [cwd + '/config'] startup_path_prefix = SDK_LIB if rtconfig.PLATFORM in ['gcc']: - src += [startup_path_prefix + '/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f448.S'] + src += [startup_path_prefix + '/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f448.S'] elif rtconfig.PLATFORM in ['armcc', 'armclang']: - src += [startup_path_prefix + '/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f448.s'] + src += [startup_path_prefix + '/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f448.s'] elif rtconfig.PLATFORM in ['iccarm']: - src += [startup_path_prefix + '/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f448.s'] + src += [startup_path_prefix + '/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f448.s'] CPPDEFINES = ['HC32F448', '__DEBUG'] group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/board.c b/bsp/hc32/ev_hc32f448_lqfp80/board/board.c index 13dd21c5971..5e5aa64930c 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/board.c +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/board.c @@ -7,6 +7,7 @@ * Change Logs: * Date Author Notes * 2024-02-20 CDT first version + * 2024-06-07 CDT Add XTAL divider config code for RTC */ #include "board.h" @@ -41,6 +42,9 @@ void SystemClock_Config(void) #if defined(BSP_RTC_USING_XTAL32) || defined(RT_USING_PM) stc_clock_xtal32_init_t stcXtal32Init; #endif +#if defined(BSP_RTC_USING_XTAL_DIV) + stc_clock_xtaldiv_init_t stcXtaldivInit; +#endif /* PCLK0, HCLK Max 200MHz */ /* PCLK1, PCLK4 Max 100MHz */ @@ -87,17 +91,27 @@ void SystemClock_Config(void) stcXtal32Init.u8Filter = CLK_XTAL32_FILTER_RUN_MD; (void)CLK_Xtal32Init(&stcXtal32Init); #endif + +#if defined(BSP_RTC_USING_XTAL_DIV) + /* Xtal Div config */ + (void)CLK_XtalDivStructInit(&stcXtaldivInit); + /* 8000000Hz / 32768Hz = 0x7A12 / 0x80 */ + stcXtaldivInit.u32Num = 0x7A12UL; + stcXtaldivInit.u32Den = 0x80UL; + stcXtaldivInit.u32State = CLK_XTALDIV_ON; + (void)CLK_XtalDivInit(&stcXtaldivInit); +#endif } /** Peripheral Clock Configuration */ void PeripheralClock_Config(void) { -#if defined(BSP_USING_CAN1) - CLK_SetCANClockSrc(CLK_CAN1, CLK_CANCLK_SYSCLK_DIV6); +#if defined(BSP_USING_MCAN1) + CLK_SetCANClockSrc(CLK_MCAN1, CLK_MCANCLK_SYSCLK_DIV5); #endif -#if defined(BSP_USING_CAN2) - CLK_SetCANClockSrc(CLK_CAN2, CLK_CANCLK_SYSCLK_DIV6); +#if defined(BSP_USING_MCAN2) + CLK_SetCANClockSrc(CLK_MCAN2, CLK_MCANCLK_SYSCLK_DIV5); #endif #if defined(RT_USING_ADC) diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/board_config.c b/bsp/hc32/ev_hc32f448_lqfp80/board/board_config.c index 486db6c828f..aa364c3ed27 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/board_config.c +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/board_config.c @@ -11,7 +11,7 @@ #include #include "board_config.h" -#include "tca9539.h" +#include "tca9539_port.h" /** * The below functions will initialize HC32 board. @@ -130,7 +130,7 @@ rt_err_t rt_hw_board_dac_init(CM_DAC_TypeDef *DACx) switch ((rt_uint32_t)DACx) { #if defined(BSP_USING_DAC1) - case (rt_uint32_t)CM_DAC1: + case (rt_uint32_t)CM_DAC: (void)GPIO_Init(DAC1_CH1_PORT, DAC1_CH1_PIN, &stcGpioInit); (void)GPIO_Init(DAC1_CH2_PORT, DAC1_CH2_PIN, &stcGpioInit); break; @@ -144,34 +144,35 @@ rt_err_t rt_hw_board_dac_init(CM_DAC_TypeDef *DACx) } #endif + #if defined(RT_USING_CAN) void CanPhyEnable(void) { -#if defined(BSP_USING_CAN1) +#if defined(BSP_USING_MCAN1) TCA9539_WritePin(CAN1_STB_PORT, CAN1_STB_PIN, TCA9539_PIN_RESET); TCA9539_ConfigPin(CAN1_STB_PORT, CAN1_STB_PIN, TCA9539_DIR_OUT); #endif -#if defined(BSP_USING_CAN2) +#if defined(BSP_USING_MCAN2) TCA9539_WritePin(CAN2_STB_PORT, CAN2_STB_PIN, TCA9539_PIN_RESET); TCA9539_ConfigPin(CAN2_STB_PORT, CAN2_STB_PIN, TCA9539_DIR_OUT); #endif } -rt_err_t rt_hw_board_can_init(CM_CAN_TypeDef *CANx) +rt_err_t rt_hw_board_can_init(CM_MCAN_TypeDef *MCANx) { rt_err_t result = RT_EOK; - switch ((rt_uint32_t)CANx) + switch ((rt_uint32_t)MCANx) { -#if defined(BSP_USING_CAN1) - case (rt_uint32_t)CM_CAN1: - GPIO_SetFunc(CAN1_TX_PORT, CAN1_TX_PIN, CAN1_TX_PIN_FUNC); - GPIO_SetFunc(CAN1_RX_PORT, CAN1_RX_PIN, CAN1_RX_PIN_FUNC); +#if defined(BSP_USING_MCAN1) + case (rt_uint32_t)CM_MCAN1: + GPIO_SetFunc(MCAN1_TX_PORT, MCAN1_TX_PIN, MCAN1_TX_PIN_FUNC); + GPIO_SetFunc(MCAN1_RX_PORT, MCAN1_RX_PIN, MCAN1_RX_PIN_FUNC); break; #endif -#if defined(BSP_USING_CAN2) - case (rt_uint32_t)CM_CAN2: - GPIO_SetFunc(CAN2_TX_PORT, CAN2_TX_PIN, CAN2_TX_PIN_FUNC); - GPIO_SetFunc(CAN2_RX_PORT, CAN2_RX_PIN, CAN2_RX_PIN_FUNC); +#if defined(BSP_USING_MCAN2) + case (rt_uint32_t)CM_MCAN2: + GPIO_SetFunc(MCAN2_TX_PORT, MCAN2_TX_PIN, MCAN2_TX_PIN_FUNC); + GPIO_SetFunc(MCAN2_RX_PORT, MCAN2_RX_PIN, MCAN2_RX_PIN_FUNC); break; #endif default: @@ -183,7 +184,6 @@ rt_err_t rt_hw_board_can_init(CM_CAN_TypeDef *CANx) } #endif - #if defined (RT_USING_SPI) rt_err_t rt_hw_spi_board_init(CM_SPI_TypeDef *CM_SPIx) { @@ -333,103 +333,7 @@ rt_err_t rt_hw_board_pwm_tmr6_init(CM_TMR6_TypeDef *TMR6x) #endif #ifdef RT_USING_PM -#define EFM_ERASE_TIME_MAX_IN_MILLISECOND (20) #define PLL_SRC ((CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLSRC) >> CMU_PLLHCFGR_PLLSRC_POS) - -static void _pm_sleep_common_init(rt_bool_t b_disable_unused_clk) -{ - CLK_Xtal32Cmd(ENABLE); - - rt_tick_t tick_start = rt_tick_get_millisecond(); - rt_err_t rt_stat = RT_EOK; - //wait flash idle - while (SET != EFM_GetStatus(EFM_FLAG_RDY)) - { - if (rt_tick_get_millisecond() - tick_start > EFM_ERASE_TIME_MAX_IN_MILLISECOND) - { - rt_stat = RT_ERROR; - break; - } - } - RT_ASSERT(rt_stat == RT_EOK); - - if (b_disable_unused_clk) - { - uint32_t cur_clk_src = READ_REG8_BIT(CM_CMU->CKSWR, CMU_CKSWR_CKSW); - - switch (cur_clk_src) - { - case CLK_SYSCLK_SRC_HRC: - CLK_PLLCmd(DISABLE); - CLK_MrcCmd(DISABLE); - CLK_LrcCmd(DISABLE); - CLK_XtalCmd(DISABLE); - PWC_LDO_Cmd(PWC_LDO_PLL, DISABLE); - break; - case CLK_SYSCLK_SRC_MRC: - CLK_PLLCmd(DISABLE); - CLK_HrcCmd(DISABLE); - CLK_LrcCmd(DISABLE); - CLK_XtalCmd(DISABLE); - PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE); - - break; - case CLK_SYSCLK_SRC_XTAL: - CLK_PLLCmd(DISABLE); - CLK_HrcCmd(DISABLE); - CLK_MrcCmd(DISABLE); - CLK_LrcCmd(DISABLE); - PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE); - - break; - case CLK_SYSCLK_SRC_XTAL32: - CLK_PLLCmd(DISABLE); - CLK_HrcCmd(DISABLE); - CLK_MrcCmd(DISABLE); - CLK_LrcCmd(DISABLE); - CLK_XtalCmd(DISABLE); - PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE); - - break; - case CLK_SYSCLK_SRC_PLL: - if (CLK_PLL_SRC_XTAL == PLL_SRC) - { - CLK_HrcCmd(DISABLE); - } - else - { - CLK_XtalCmd(DISABLE); - } - CLK_MrcCmd(DISABLE); - CLK_LrcCmd(DISABLE); - PWC_LDO_Cmd(PWC_LDO_HRC, DISABLE); - - break; - default: - break; - } - } -} - -void rt_hw_board_pm_sleep_deep_init(void) -{ -#if (PM_SLEEP_DEEP_CFG_CLK == PWC_STOP_CLK_KEEP) - _pm_sleep_common_init(RT_TRUE); -#else - _pm_sleep_common_init(RT_FALSE); - CLK_PLLCmd(DISABLE); - CLK_HrcCmd(DISABLE); - CLK_LrcCmd(DISABLE); - CLK_XtalCmd(DISABLE); - PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE); -#endif -} - -void rt_hw_board_pm_sleep_shutdown_init(void) -{ - _pm_sleep_common_init(RT_TRUE); -} - void rt_hw_board_pm_sysclk_cfg(uint8_t run_mode) { switch (run_mode) diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/board_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/board_config.h index 0469ffb0496..487e4f2f88e 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/board_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/board_config.h @@ -78,17 +78,17 @@ /*********** ADC configure *********/ #if defined(BSP_USING_ADC1) - #define ADC1_CH_PORT (GPIO_PORT_C) + #define ADC1_CH_PORT (GPIO_PORT_C) /* Default ADC12_IN10 */ #define ADC1_CH_PIN (GPIO_PIN_00) #endif #if defined(BSP_USING_ADC2) - #define ADC2_CH_PORT (GPIO_PORT_C) - #define ADC2_CH_PIN (GPIO_PIN_01) + #define ADC2_CH_PORT (GPIO_PORT_A) /* Default ADC12_IN4 */ + #define ADC2_CH_PIN (GPIO_PIN_04) #endif #if defined(BSP_USING_ADC3) - #define ADC3_CH_PORT (GPIO_PORT_E) + #define ADC3_CH_PORT (GPIO_PORT_E) /* Default ADC3_IN1 */ #define ADC3_CH_PIN (GPIO_PIN_03) #endif @@ -101,24 +101,24 @@ #endif /*********** CAN configure *********/ -#if defined(BSP_USING_CAN1) - #define CAN1_TX_PORT (GPIO_PORT_C) - #define CAN1_TX_PIN (GPIO_PIN_12) - #define CAN1_TX_PIN_FUNC (GPIO_FUNC_56) - - #define CAN1_RX_PORT (GPIO_PORT_D) - #define CAN1_RX_PIN (GPIO_PIN_00) - #define CAN1_RX_PIN_FUNC (GPIO_FUNC_57) +#if defined(BSP_USING_MCAN1) + #define MCAN1_TX_PORT (GPIO_PORT_C) + #define MCAN1_TX_PIN (GPIO_PIN_12) + #define MCAN1_TX_PIN_FUNC (GPIO_FUNC_56) + + #define MCAN1_RX_PORT (GPIO_PORT_D) + #define MCAN1_RX_PIN (GPIO_PIN_00) + #define MCAN1_RX_PIN_FUNC (GPIO_FUNC_57) #endif -#if defined(BSP_USING_CAN2) - #define CAN2_TX_PORT (GPIO_PORT_H) - #define CAN2_TX_PIN (GPIO_PIN_02) - #define CAN2_TX_PIN_FUNC (GPIO_FUNC_56) +#if defined(BSP_USING_MCAN2) + #define MCAN2_TX_PORT (GPIO_PORT_H) + #define MCAN2_TX_PIN (GPIO_PIN_02) + #define MCAN2_TX_PIN_FUNC (GPIO_FUNC_56) - #define CAN2_RX_PORT (GPIO_PORT_E) - #define CAN2_RX_PIN (GPIO_PIN_04) - #define CAN2_RX_PIN_FUNC (GPIO_FUNC_57) + #define MCAN2_RX_PORT (GPIO_PORT_E) + #define MCAN2_RX_PIN (GPIO_PIN_04) + #define MCAN2_RX_PIN_FUNC (GPIO_FUNC_57) #endif /************************* SPI port ***********************/ @@ -296,11 +296,11 @@ #if defined(BSP_USING_TMR6_PULSE_ENCODER) #if defined(BSP_USING_PULSE_ENCODER_TMR6_1) - #define PULSE_ENCODER_TMR6_1_A_PORT (GPIO_PORT_A) - #define PULSE_ENCODER_TMR6_1_A_PIN (GPIO_PIN_08) + #define PULSE_ENCODER_TMR6_1_A_PORT (GPIO_PORT_B) + #define PULSE_ENCODER_TMR6_1_A_PIN (GPIO_PIN_05) #define PULSE_ENCODER_TMR6_1_A_PIN_FUNC (GPIO_FUNC_3) - #define PULSE_ENCODER_TMR6_1_B_PORT (GPIO_PORT_A) - #define PULSE_ENCODER_TMR6_1_B_PIN (GPIO_PIN_07) + #define PULSE_ENCODER_TMR6_1_B_PORT (GPIO_PORT_B) + #define PULSE_ENCODER_TMR6_1_B_PIN (GPIO_PIN_13) #define PULSE_ENCODER_TMR6_1_B_PIN_FUNC (GPIO_FUNC_3) #endif /* BSP_USING_PULSE_ENCODER_TMR6_1 */ #endif /* BSP_USING_TMR6_PULSE_ENCODER */ diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/config/adc_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/config/adc_config.h index 7fdc0d3e0fe..be6d4c6de34 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/config/adc_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/config/adc_config.h @@ -1,5 +1,4 @@ /* - * Copyright (c) 2006-2022, RT-Thread Development Team * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 @@ -32,7 +31,7 @@ extern "C" { .hard_trig_src = ADC_HARDTRIG_EVT0, \ .internal_trig0_comtrg0_enable = RT_FALSE, \ .internal_trig0_comtrg1_enable = RT_FALSE, \ - .internal_trig0_sel = EVT_SRC_TMR0_1_CMP_A, \ + .internal_trig0_sel = EVT_SRC_TMR0_1_CMP_B, \ .internal_trig1_comtrg0_enable = RT_FALSE, \ .internal_trig1_comtrg1_enable = RT_FALSE, \ .internal_trig1_sel = EVT_SRC_MAX, \ @@ -75,7 +74,7 @@ extern "C" { .hard_trig_src = ADC_HARDTRIG_EVT0, \ .internal_trig0_comtrg0_enable = RT_FALSE, \ .internal_trig0_comtrg1_enable = RT_FALSE, \ - .internal_trig0_sel = EVT_SRC_TMR0_1_CMP_A, \ + .internal_trig0_sel = EVT_SRC_TMR0_1_CMP_B, \ .internal_trig1_comtrg0_enable = RT_FALSE, \ .internal_trig1_comtrg1_enable = RT_FALSE, \ .internal_trig1_sel = EVT_SRC_MAX, \ @@ -118,7 +117,7 @@ extern "C" { .hard_trig_src = ADC_HARDTRIG_EVT0, \ .internal_trig0_comtrg0_enable = RT_FALSE, \ .internal_trig0_comtrg1_enable = RT_FALSE, \ - .internal_trig0_sel = EVT_SRC_TMR0_1_CMP_A, \ + .internal_trig0_sel = EVT_SRC_TMR0_1_CMP_B, \ .internal_trig1_comtrg0_enable = RT_FALSE, \ .internal_trig1_comtrg1_enable = RT_FALSE, \ .internal_trig1_sel = EVT_SRC_MAX, \ diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/config/can_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/config/can_config.h index eb25e856872..cd06fac8d17 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/config/can_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/config/can_config.h @@ -19,117 +19,352 @@ extern "C" { #endif -#ifdef BSP_USING_CAN1 -#define CAN1_CLOCK_SEL (CAN_CLOCK_SRC_40M) +/***********************************************************************************************/ +/***********************************************************************************************/ +// The arguments of RT command RT_CAN_CMD_SET_CANFD +#define MCAN_FD_CLASSICAL 0 /* CAN classical */ +#define MCAN_FD_ISO_FD_NO_BRS 1 /* ISO CAN FD without BRS */ +#define MCAN_FD_ISO_FD_BRS 2 /* ISO CAN FD with BRS */ +#define MCAN_FD_NON_ISO_FD_NO_BRS 3 /* non-ISO CAN FD without BRS */ +#define MCAN_FD_NON_ISO_FD_BRS 4 /* non-ISO CAN FD with BRS */ + +#define MCAN_FD_ARG_MIN MCAN_FD_ISO_FD_NO_BRS +#define MCAN_FD_ARG_MAX MCAN_FD_NON_ISO_FD_BRS + +/* The default configuration for MCANs. Users can modify the configurations based on the application. + For the message RAM: + 1. MCAN1 and MCAN2 share 2048 bytes message RAM + 2. User can modify the definitions of filter number, Rx FIFO number, Tx FIFO number. + 3. MCAN has two configurable Receive FIFOs, Rx FIFO0 and Rx FIFO1. There use Rx FIFO0 only by default. + If only one FIFO is needed, use Rx FIFO0. If Rx FIFO1 is needed, define it's macro between 1 and 64, + and pay attention the total size of meesage RAM that to be allocated. +*/ + #ifdef RT_CAN_USING_CANFD -#define CAN1_CANFD_MODE (CAN_FD_MD_ISO) +#define MCAN_FD_SEL MCAN_FD_ISO_FD_BRS +#define MCAN_TOTAL_FILTER_NUM (26U) +#define MCAN_STD_FILTER_NUM (13U) /* Each standard filter element size is 4 bytes */ +#define MCAN_EXT_FILTER_NUM (13U) /* Each extended filter element size is 8 bytes */ +#define MCAN_TX_FIFO_NUM (6U) +#define MCAN_RX_FIFO_NUM (6U) +#define MCAN_DATA_FIELD_SIZE (MCAN_DATA_SIZE_64BYTE) /* Each FIFO element size is 64+8 bytes */ +#else +#define MCAN_FD_SEL MCAN_FD_CLASSICAL +#define MCAN_TOTAL_FILTER_NUM (32U) +#define MCAN_STD_FILTER_NUM (16U) /* Each standard filter element size is 4 bytes */ +#define MCAN_EXT_FILTER_NUM (16U) /* Each extended filter element size is 8 bytes */ +#define MCAN_TX_FIFO_NUM (26U) +#define MCAN_RX_FIFO_NUM (26U) +#define MCAN_DATA_FIELD_SIZE (MCAN_DATA_SIZE_8BYTE) /* Each FIFO element size is 8+8 bytes */ #endif -#define CAN1_NAME ("can1") -#ifndef CAN1_INIT_PARAMS -#define CAN1_INIT_PARAMS \ + +#ifdef BSP_USING_MCAN1 +#define MCAN1_NAME ("can1") +#define MCAN1_WORK_MODE (RT_CAN_MODE_NORMAL) +#define MCAN1_TX_PRIV_MODE RT_CAN_MODE_NOPRIV /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */ + +#define MCAN1_FD_SEL MCAN_FD_SEL + +#define MCAN1_STD_FILTER_NUM MCAN_STD_FILTER_NUM +#define MCAN1_EXT_FILTER_NUM MCAN_EXT_FILTER_NUM + +#define MCAN1_RX_FIFO0_NUM MCAN_RX_FIFO_NUM +#define MCAN1_RX_FIFO0_DATA_FIELD_SIZE MCAN_DATA_FIELD_SIZE + +#define MCAN1_TX_FIFO_NUM MCAN_TX_FIFO_NUM +#define MCAN1_TX_FIFO_DATA_FIELD_SIZE MCAN_DATA_FIELD_SIZE +#define MCAN1_TX_NOTIFICATION_BUF ((1UL << MCAN1_TX_FIFO_NUM) - 1U) +#endif /* BSP_USING_MCAN1 */ + +#ifdef BSP_USING_MCAN2 +#define MCAN2_NAME ("can2") +#define MCAN2_WORK_MODE (RT_CAN_MODE_NORMAL) +#define MCAN2_TX_PRIV_MODE RT_CAN_MODE_NOPRIV /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */ + +#define MCAN2_FD_SEL MCAN_FD_SEL +#define MCAN2_STD_FILTER_NUM MCAN_STD_FILTER_NUM +#define MCAN2_EXT_FILTER_NUM MCAN_EXT_FILTER_NUM + +#define MCAN2_RX_FIFO0_NUM MCAN_RX_FIFO_NUM +#define MCAN2_RX_FIFO0_DATA_FIELD_SIZE MCAN_DATA_FIELD_SIZE + +#define MCAN2_TX_FIFO_NUM MCAN_TX_FIFO_NUM +#define MCAN2_TX_FIFO_DATA_FIELD_SIZE MCAN_DATA_FIELD_SIZE +#define MCAN2_TX_NOTIFICATION_BUF ((1UL << MCAN2_TX_FIFO_NUM) - 1U) +#endif /* BSP_USING_MCAN2 */ + +/***********************************************************************************************/ +/***********************************************************************************************/ + +/* + Bit rate configuration examples for CAN FD. + Nominal bit rate for CAN FD arbitration phase and data bit rate for CAN FD data phase. + BitRate(bps) = MCANClock(Hz) / (Prescaler * (TimeSeg1 + TimeSeg2)) + SamplePoint(%) = TimeSeg1 / (TimeSeg1 + TimeSeg2) + eg. + BitRate(bps) = 40000000(Hz) / (2 * (16 + 4)) = 1000000 = 1M(bps) + SamplePoint(%) = 16 / (16 + 4) = 80% + The following bit rate configurations are based on the max MCAN Clock(40MHz). + NOTE: + 1. It is better to limit u32NominalPrescaler and u32DataPrescaler between 1 and 2. + 1. The unit of u32SspOffset is MCANClock. + 2. For the corresponding function of u32TdcFilter, please refer to the reference manual for details(TDCR.TDCF). + The u32TdcFilter can be get from PSR.TDCV. +*/ +#define MCAN_FD_CFG_500K_1M \ { \ - .name = CAN1_NAME, \ - .single_trans_mode = RT_FALSE \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 64, \ + .u32NominalTimeSeg2 = 16, \ + .u32NominalSyncJumpWidth = 16, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 32, \ + .u32DataTimeSeg2 = 8, \ + .u32DataSyncJumpWidth = 8, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 32, \ + .u32TdcFilter = 32 + 1, \ } -#endif /* CAN1_INIT_PARAMS */ -#endif /* BSP_USING_CAN1 */ -#ifdef BSP_USING_CAN2 -#define CAN2_CLOCK_SEL (CAN_CLOCK_SRC_40M) -#ifdef RT_CAN_USING_CANFD -#define CAN2_CANFD_MODE (CAN_FD_MD_ISO) -#endif -#define CAN2_NAME ("can2") -#ifndef CAN2_INIT_PARAMS -#define CAN2_INIT_PARAMS \ +#define MCAN_FD_CFG_500K_2M \ { \ - .name = CAN2_NAME, \ - .single_trans_mode = RT_FALSE \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 64, \ + .u32NominalTimeSeg2 = 16, \ + .u32NominalSyncJumpWidth = 16, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 16, \ + .u32DataTimeSeg2 = 4, \ + .u32DataSyncJumpWidth = 4, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 16, \ + .u32TdcFilter = 16 + 1, \ } -#endif /* CAN2_INIT_PARAMS */ -#endif /* BSP_USING_CAN2 */ -/* Bit time config - Restrictions: u32TimeSeg1 >= u32TimeSeg2 + 1, u32TimeSeg2 >= u32SJW. +#define MCAN_FD_CFG_500K_4M \ + { \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 64, \ + .u32NominalTimeSeg2 = 16, \ + .u32NominalSyncJumpWidth = 16, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 8, \ + .u32DataTimeSeg2 = 2, \ + .u32DataSyncJumpWidth = 2, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 8, \ + .u32TdcFilter = 8 + 1, \ + } - Baudrate = CANClock/(u32Prescaler*(u32TimeSeg1 + u32TimeSeg2)) - TQ = u32Prescaler / CANClock. - Bit time = (u32TimeSeg2 + u32TimeSeg2) x TQ. +#define MCAN_FD_CFG_500K_5M \ + { \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 64, \ + .u32NominalTimeSeg2 = 16, \ + .u32NominalSyncJumpWidth = 16, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 6, \ + .u32DataTimeSeg2 = 2, \ + .u32DataSyncJumpWidth = 2, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 6, \ + .u32TdcFilter = 6 + 1, \ + } - The following bit time configures are based on CAN Clock 40M +#define MCAN_FD_CFG_500K_8M \ + { \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 64, \ + .u32NominalTimeSeg2 = 16, \ + .u32NominalSyncJumpWidth = 16, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 4, \ + .u32DataTimeSeg2 = 1, \ + .u32DataSyncJumpWidth = 1, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 4, \ + .u32TdcFilter = 4 + 1, \ + } + +#define MCAN_FD_CFG_1M_1M \ + { \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 32, \ + .u32NominalTimeSeg2 = 8, \ + .u32NominalSyncJumpWidth = 8, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 32, \ + .u32DataTimeSeg2 = 8, \ + .u32DataSyncJumpWidth = 8, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 2*32, \ + .u32TdcFilter = 2*32 + 1, \ + } + +#define MCAN_FD_CFG_1M_2M \ + { \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 32, \ + .u32NominalTimeSeg2 = 8, \ + .u32NominalSyncJumpWidth = 8, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 16, \ + .u32DataTimeSeg2 = 4, \ + .u32DataSyncJumpWidth = 4, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 16, \ + .u32TdcFilter = 16 + 1, \ + } + +#define MCAN_FD_CFG_1M_4M \ + { \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 32, \ + .u32NominalTimeSeg2 = 8, \ + .u32NominalSyncJumpWidth = 8, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 8, \ + .u32DataTimeSeg2 = 2, \ + .u32DataSyncJumpWidth = 2, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 8, \ + .u32TdcFilter = 8 + 1, \ + } + +#define MCAN_FD_CFG_1M_5M \ + { \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 64, \ + .u32NominalTimeSeg2 = 16, \ + .u32NominalSyncJumpWidth = 16, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 6, \ + .u32DataTimeSeg2 = 2, \ + .u32DataSyncJumpWidth = 2, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 6, \ + .u32TdcFilter = 6 + 1, \ + } + +#define MCAN_FD_CFG_1M_8M \ + { \ + .u32NominalPrescaler = 1, \ + .u32NominalTimeSeg1 = 64, \ + .u32NominalTimeSeg2 = 16, \ + .u32NominalSyncJumpWidth = 16, \ + .u32DataPrescaler = 1, \ + .u32DataTimeSeg1 = 4, \ + .u32DataTimeSeg2 = 1, \ + .u32DataSyncJumpWidth = 1, \ + .u32TDC = MCAN_FD_TDC_ENABLE, \ + .u32SspOffset = 4, \ + .u32TdcFilter = 4 + 1, \ + } + +/* + Bit rate configuration examples for classical CAN. + BitRate(bps) = MCANClock(Hz) / (u32NominalPrescaler * (u32NominalTimeSeg1 + u32NominalTimeSeg2)) + SamplePoint(%) = u32NominalTimeSeg1 / (u32NominalTimeSeg1 + u32NominalTimeSeg2) + eg. + BitRate(bps) = 40000000(Hz) / (2 * (16 + 4)) = 1000000 = 1M(bps) + SamplePoint(%) = 16 / (16 + 4) = 80% + The following bit rate configurations are based on the max MCAN Clock(40MHz). */ -#define CAN_BIT_TIME_CONFIG_1M_BAUD \ +#define MCAN_CC_CFG_1M \ { \ - .u32Prescaler = 2, \ - .u32TimeSeg1 = 16, \ - .u32TimeSeg2 = 4, \ - .u32SJW = 4 \ + .u32NominalPrescaler = 2, \ + .u32NominalTimeSeg1 = 16, \ + .u32NominalTimeSeg2 = 4, \ + .u32NominalSyncJumpWidth = 4, \ } -#define CAN_BIT_TIME_CONFIG_800K_BAUD \ +#define MCAN_CC_CFG_800K \ { \ - .u32Prescaler = 2, \ - .u32TimeSeg1 = 20, \ - .u32TimeSeg2 = 5, \ - .u32SJW = 4 \ + .u32NominalPrescaler = 2, \ + .u32NominalTimeSeg1 = 20, \ + .u32NominalTimeSeg2 = 5, \ + .u32NominalSyncJumpWidth = 5, \ } -#define CAN_BIT_TIME_CONFIG_500K_BAUD \ +#define MCAN_CC_CFG_500K \ { \ - .u32Prescaler = 4, \ - .u32TimeSeg1 = 16, \ - .u32TimeSeg2 = 4, \ - .u32SJW = 4 \ + .u32NominalPrescaler = 4, \ + .u32NominalTimeSeg1 = 16, \ + .u32NominalTimeSeg2 = 4, \ + .u32NominalSyncJumpWidth = 4, \ } -#define CAN_BIT_TIME_CONFIG_250K_BAUD \ +#define MCAN_CC_CFG_250K \ { \ - .u32Prescaler = 8, \ - .u32TimeSeg1 = 16, \ - .u32TimeSeg2 = 4, \ - .u32SJW = 4 \ + .u32NominalPrescaler = 4, \ + .u32NominalTimeSeg1 = 32, \ + .u32NominalTimeSeg2 = 8, \ + .u32NominalSyncJumpWidth = 8, \ } -#define CAN_BIT_TIME_CONFIG_125K_BAUD \ +#define MCAN_CC_CFG_125K \ { \ - .u32Prescaler = 16, \ - .u32TimeSeg1 = 16, \ - .u32TimeSeg2 = 4, \ - .u32SJW = 4 \ + .u32NominalPrescaler = 8, \ + .u32NominalTimeSeg1 = 32, \ + .u32NominalTimeSeg2 = 8, \ + .u32NominalSyncJumpWidth = 8, \ } -#define CAN_BIT_TIME_CONFIG_100K_BAUD \ +#define MCAN_CC_CFG_100K \ { \ - .u32Prescaler = 20, \ - .u32TimeSeg1 = 16, \ - .u32TimeSeg2 = 4, \ - .u32SJW = 4 \ + .u32NominalPrescaler = 10, \ + .u32NominalTimeSeg1 = 32, \ + .u32NominalTimeSeg2 = 8, \ + .u32NominalSyncJumpWidth = 8, \ } -#define CAN_BIT_TIME_CONFIG_50K_BAUD \ +#define MCAN_CC_CFG_50K \ { \ - .u32Prescaler = 40, \ - .u32TimeSeg1 = 16, \ - .u32TimeSeg2 = 4, \ - .u32SJW = 4 \ + .u32NominalPrescaler = 20, \ + .u32NominalTimeSeg1 = 32, \ + .u32NominalTimeSeg2 = 8, \ + .u32NominalSyncJumpWidth = 8, \ } -#define CAN_BIT_TIME_CONFIG_20K_BAUD \ +#define MCAN_CC_CFG_20K \ { \ - .u32Prescaler = 100, \ - .u32TimeSeg1 = 16, \ - .u32TimeSeg2 = 4, \ - .u32SJW = 4 \ + .u32NominalPrescaler = 50, \ + .u32NominalTimeSeg1 = 32, \ + .u32NominalTimeSeg2 = 8, \ + .u32NominalSyncJumpWidth = 8, \ } -#define CAN_BIT_TIME_CONFIG_10K_BAUD \ +#define MCAN_CC_CFG_10K \ { \ - .u32Prescaler = 200, \ - .u32TimeSeg1 = 16, \ - .u32TimeSeg2 = 4, \ - .u32SJW = 4 \ + .u32NominalPrescaler = 100, \ + .u32NominalTimeSeg1 = 32, \ + .u32NominalTimeSeg2 = 8, \ + .u32NominalSyncJumpWidth = 8, \ } +#ifdef RT_CAN_USING_CANFD +#define MCAN1_BAUD_RATE_CFG MCAN_FD_CFG_1M_4M +#define MCAN1_NOMINAL_BAUD_RATE MCANFD_NOMINAL_BAUD_1M +#define MCAN1_DATA_BAUD_RATE MCANFD_DATA_BAUD_4M + +#define MCAN2_BAUD_RATE_CFG MCAN_FD_CFG_1M_4M +#define MCAN2_NOMINAL_BAUD_RATE MCANFD_NOMINAL_BAUD_1M +#define MCAN2_DATA_BAUD_RATE MCANFD_DATA_BAUD_4M + +#else +#define MCAN1_BAUD_RATE_CFG MCAN_CC_CFG_1M +#define MCAN1_NOMINAL_BAUD_RATE CAN1MBaud +#define MCAN1_DATA_BAUD_RATE 0 + +#define MCAN2_BAUD_RATE_CFG MCAN_CC_CFG_1M +#define MCAN2_NOMINAL_BAUD_RATE CAN1MBaud +#define MCAN2_DATA_BAUD_RATE 0 + +#endif /* #ifdef RT_CAN_USING_CANFD */ + +/***********************************************************************************************/ +/***********************************************************************************************/ + #ifdef __cplusplus } #endif diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/config/dac_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/config/dac_config.h index 10de0c1734c..119d3da9a77 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/config/dac_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/config/dac_config.h @@ -1,6 +1,5 @@ /* - * Copyright (c) 2006-2022, RT-Thread Development Team - * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. + * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * @@ -27,15 +26,6 @@ extern "C" { #endif /* DAC1_INIT_PARAMS */ #endif /* BSP_USING_DAC1 */ -#ifdef BSP_USING_DAC2 -#ifndef DAC2_INIT_PARAMS -#define DAC2_INIT_PARAMS \ - { \ - .name = "dac2", \ - } -#endif /* DAC2_INIT_PARAMS */ -#endif /* BSP_USING_DAC2 */ - #ifdef __cplusplus } #endif diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/config/dma_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/config/dma_config.h index 6a84329063e..b5202f3eb93 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/config/dma_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/config/dma_config.h @@ -193,6 +193,16 @@ extern "C" { #define UART1_RX_DMA_IRQn BSP_DMA2_CH0_IRQ_NUM #define UART1_RX_DMA_INT_PRIO BSP_DMA2_CH0_IRQ_PRIO #define UART1_RX_DMA_INT_SRC INT_SRC_DMA2_TC0 + +#elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE) +#define QSPI_DMA_INSTANCE CM_DMA2 +#define QSPI_DMA_CHANNEL DMA_CH0 +#define QSPI_DMA_CLOCK (PWC_FCG0_DMA2 | PWC_FCG0_AOS) +#define QSPI_DMA_TRIG_SELECT AOS_DMA2_0 +#define QSPI_DMA_TRANS_FLAG DMA_FLAG_TC_CH0 +#define QSPI_DMA_IRQn BSP_DMA2_CH0_IRQ_NUM +#define QSPI_DMA_INT_PRIO BSP_DMA2_CH0_IRQ_PRIO +#define QSPI_DMA_INT_SRC INT_SRC_DMA2_TC0 #endif /* DMA2 ch1 */ diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/config/irq_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/config/irq_config.h index 90d8d4f7ad9..e1d962ab910 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/config/irq_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/config/irq_config.h @@ -158,6 +158,11 @@ extern "C" { #define BSP_SPI3_ERR_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT #endif +#if defined (BSP_USING_QSPI) +#define BSP_QSPI_ERR_IRQ_NUM QSPI_IRQn +#define BSP_QSPI_ERR_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif /* BSP_USING_QSPI */ + #if defined(BSP_USING_TMRA_1) #define BSP_USING_TMRA_1_IRQ_NUM TMRA_1_OVF_UDF_IRQn #define BSP_USING_TMRA_1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT @@ -183,16 +188,71 @@ extern "C" { #define BSP_USING_TMRA_5_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT #endif/* BSP_USING_TMRA_5 */ -#if defined(BSP_USING_CAN1) -#define BSP_CAN1_IRQ_NUM MCAN1_INT0_IRQn -#define BSP_CAN1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT -#endif/* BSP_USING_CAN1 */ +#if defined(BSP_USING_MCAN1) +#define BSP_MCAN1_INT0_IRQ_NUM MCAN1_INT0_IRQn +#define BSP_MCAN1_INT0_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT + +#define BSP_MCAN1_INT1_IRQ_NUM MCAN1_INT1_IRQn +#define BSP_MCAN1_INT1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif/* BSP_USING_MCAN1 */ + +#if defined(BSP_USING_MCAN2) +#define BSP_MCAN2_INT0_IRQ_NUM MCAN2_INT0_IRQn +#define BSP_MCAN2_INT0_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT + +#define BSP_MCAN2_INT1_IRQ_NUM MCAN2_INT1_IRQn +#define BSP_MCAN2_INT1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif/* BSP_USING_MCAN2 */ #if defined(RT_USING_ALARM) #define BSP_RTC_ALARM_IRQ_NUM RTC_IRQn #define BSP_RTC_ALARM_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT #endif/* RT_USING_ALARM */ +#if defined(BSP_USING_PULSE_ENCODER_TMRA_1) +#define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM TMRA_1_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM TMRA_1_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif/* BSP_USING_PULSE_ENCODER_TMRA_1 */ +#if defined(BSP_USING_PULSE_ENCODER_TMRA_2) +#define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM TMRA_2_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM TMRA_2_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif/* BSP_USING_PULSE_ENCODER_TMRA_2 */ +#if defined(BSP_USING_PULSE_ENCODER_TMRA_3) +#define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM TMRA_3_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM TMRA_3_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif/* BSP_USING_PULSE_ENCODER_TMRA_3 */ +#if defined(BSP_USING_PULSE_ENCODER_TMRA_4) +#define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM TMRA_4_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM TMRA_4_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif/* BSP_USING_PULSE_ENCODER_TMRA_4 */ +#if defined(BSP_USING_PULSE_ENCODER_TMRA_5) +#define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM TMRA_5_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM TMRA_5_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif/* BSP_USING_PULSE_ENCODER_TMRA_5 */ + +#if defined(BSP_USING_PULSE_ENCODER_TMR6_1) +#define BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM TMR6_1_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM TMR6_1_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif/* BSP_USING_PULSE_ENCODER_TMR6_1 */ +#if defined(BSP_USING_PULSE_ENCODER_TMR6_2) +#define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM TMR6_2_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM TMR6_2_OVF_UDF_IRQn +#define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT +#endif/* BSP_USING_PULSE_ENCODER_TMR6_2 */ + #ifdef __cplusplus } #endif diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/config/pulse_encoder_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/config/pulse_encoder_config.h index 47a947c6ab8..7b6c2696b65 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/config/pulse_encoder_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/config/pulse_encoder_config.h @@ -25,7 +25,7 @@ extern "C" { #define PULSE_ENCODER_TMRA_1_CONFIG \ { \ .tmr_handler = CM_TMRA_1, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_1, \ + .u32PeriphClock = FCG2_PERIPH_TMRA_1, \ .hw_count = \ { \ .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ @@ -33,12 +33,12 @@ extern "C" { }, \ .isr = \ { \ - .enIntSrc_OVF = INT_SRC_TMRA_1_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_1_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO, \ + .enIntSrc_Ovf = INT_SRC_TMRA_1_OVF, \ + .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM, \ + .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO, \ + .enIntSrc_Udf = INT_SRC_TMRA_1_UDF, \ + .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM, \ + .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO, \ }, \ .u32PeriodValue = 1000UL, \ .name = "pulse_a1" \ @@ -51,7 +51,7 @@ extern "C" { #define PULSE_ENCODER_TMRA_2_CONFIG \ { \ .tmr_handler = CM_TMRA_2, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_2, \ + .u32PeriphClock = FCG2_PERIPH_TMRA_2, \ .hw_count = \ { \ .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ @@ -59,12 +59,12 @@ extern "C" { }, \ .isr = \ { \ - .enIntSrc_OVF = INT_SRC_TMRA_2_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_2_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO, \ + .enIntSrc_Ovf = INT_SRC_TMRA_2_OVF, \ + .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM, \ + .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO, \ + .enIntSrc_Udf = INT_SRC_TMRA_2_UDF, \ + .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM, \ + .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO, \ }, \ .u32PeriodValue = 1000UL, \ .name = "pulse_a2" \ @@ -77,7 +77,7 @@ extern "C" { #define PULSE_ENCODER_TMRA_3_CONFIG \ { \ .tmr_handler = CM_TMRA_3, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_3, \ + .u32PeriphClock = FCG2_PERIPH_TMRA_3, \ .hw_count = \ { \ .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ @@ -85,12 +85,12 @@ extern "C" { }, \ .isr = \ { \ - .enIntSrc_OVF = INT_SRC_TMRA_3_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_3_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO, \ + .enIntSrc_Ovf = INT_SRC_TMRA_3_OVF, \ + .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM, \ + .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO, \ + .enIntSrc_Udf = INT_SRC_TMRA_3_UDF, \ + .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM, \ + .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO, \ }, \ .u32PeriodValue = 1000UL, \ .name = "pulse_a3" \ @@ -103,7 +103,7 @@ extern "C" { #define PULSE_ENCODER_TMRA_4_CONFIG \ { \ .tmr_handler = CM_TMRA_4, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_4, \ + .u32PeriphClock = FCG2_PERIPH_TMRA_4, \ .hw_count = \ { \ .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ @@ -111,12 +111,12 @@ extern "C" { }, \ .isr = \ { \ - .enIntSrc_OVF = INT_SRC_TMRA_4_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_4_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO, \ + .enIntSrc_Ovf = INT_SRC_TMRA_4_OVF, \ + .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM, \ + .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO, \ + .enIntSrc_Udf = INT_SRC_TMRA_4_UDF, \ + .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM, \ + .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO, \ }, \ .u32PeriodValue = 1000UL, \ .name = "pulse_a4" \ @@ -129,7 +129,7 @@ extern "C" { #define PULSE_ENCODER_TMRA_5_CONFIG \ { \ .tmr_handler = CM_TMRA_5, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_5, \ + .u32PeriphClock = FCG2_PERIPH_TMRA_5, \ .hw_count = \ { \ .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ @@ -137,12 +137,12 @@ extern "C" { }, \ .isr = \ { \ - .enIntSrc_OVF = INT_SRC_TMRA_5_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_5_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO, \ + .enIntSrc_Ovf = INT_SRC_TMRA_5_OVF, \ + .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM, \ + .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO, \ + .enIntSrc_Udf = INT_SRC_TMRA_5_UDF, \ + .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM, \ + .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO, \ }, \ .u32PeriodValue = 1000UL, \ .name = "pulse_a5" \ @@ -150,194 +150,12 @@ extern "C" { #endif /* PULSE_ENCODER_TMRA_5_CONFIG */ #endif /* BSP_USING_PULSE_ENCODER_TMRA_5 */ -#ifdef BSP_USING_PULSE_ENCODER_TMRA_6 -#ifndef PULSE_ENCODER_TMRA_6_CONFIG -#define PULSE_ENCODER_TMRA_6_CONFIG \ - { \ - .tmr_handler = CM_TMRA_6, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_6, \ - .hw_count = \ - { \ - .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ - .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMRA_6_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_6_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_a6" \ - } -#endif /* PULSE_ENCODER_TMRA_6_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMRA_6 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMRA_7 -#ifndef PULSE_ENCODER_TMRA_7_CONFIG -#define PULSE_ENCODER_TMRA_7_CONFIG \ - { \ - .tmr_handler = CM_TMRA_7, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_7, \ - .hw_count = \ - { \ - .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ - .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMRA_7_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_7_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_7_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_7_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_7_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_7_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_a7" \ - } -#endif /* PULSE_ENCODER_TMRA_7_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMRA_7 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMRA_8 -#ifndef PULSE_ENCODER_TMRA_8_CONFIG -#define PULSE_ENCODER_TMRA_8_CONFIG \ - { \ - .tmr_handler = CM_TMRA_8, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_8, \ - .hw_count = \ - { \ - .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ - .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMRA_8_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_8_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_8_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_8_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_8_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_8_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_a8" \ - } -#endif /* PULSE_ENCODER_TMRA_8_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMRA_8 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMRA_9 -#ifndef PULSE_ENCODER_TMRA_9_CONFIG -#define PULSE_ENCODER_TMRA_9_CONFIG \ - { \ - .tmr_handler = CM_TMRA_9, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_9, \ - .hw_count = \ - { \ - .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ - .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMRA_9_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_9_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_9_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_9_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_9_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_9_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_a9" \ - } -#endif /* PULSE_ENCODER_TMRA_9_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMRA_9 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMRA_10 -#ifndef PULSE_ENCODER_TMRA_10_CONFIG -#define PULSE_ENCODER_TMRA_10_CONFIG \ - { \ - .tmr_handler = CM_TMRA_10, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_10, \ - .hw_count = \ - { \ - .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ - .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMRA_10_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_10_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_10_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_10_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_10_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_10_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_a10" \ - } -#endif /* PULSE_ENCODER_TMRA_10_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMRA_10 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMRA_11 -#ifndef PULSE_ENCODER_TMRA_11_CONFIG -#define PULSE_ENCODER_TMRA_11_CONFIG \ - { \ - .tmr_handler = CM_TMRA_11, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_11, \ - .hw_count = \ - { \ - .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ - .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMRA_11_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_11_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_11_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_11_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_11_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_11_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_a11" \ - } -#endif /* PULSE_ENCODER_TMRA_11_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMRA_11 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMRA_12 -#ifndef PULSE_ENCODER_TMRA_12_CONFIG -#define PULSE_ENCODER_TMRA_12_CONFIG \ - { \ - .tmr_handler = CM_TMRA_12, \ - .u32Fcg2Periph = FCG2_PERIPH_TMRA_12, \ - .hw_count = \ - { \ - .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \ - .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMRA_12_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMRA_12_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_12_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMRA_12_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMRA_12_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_12_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_a12" \ - } -#endif /* PULSE_ENCODER_TMRA_12_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMRA_12 */ - #ifdef BSP_USING_PULSE_ENCODER_TMR6_1 #ifndef PULSE_ENCODER_TMR6_1_CONFIG #define PULSE_ENCODER_TMR6_1_CONFIG \ { \ .tmr_handler = CM_TMR6_1, \ - .u32Fcg2Periph = FCG2_PERIPH_TMR6_1, \ + .u32PeriphClock = FCG2_PERIPH_TMR6_1, \ .hw_count = \ { \ .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \ @@ -345,12 +163,12 @@ extern "C" { }, \ .isr = \ { \ - .enIntSrc_OVF = INT_SRC_TMR6_1_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMR6_1_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO, \ + .enIntSrc_Ovf = INT_SRC_TMR6_1_OVF, \ + .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM, \ + .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO, \ + .enIntSrc_Udf = INT_SRC_TMR6_1_UDF, \ + .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM, \ + .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO, \ }, \ .u32PeriodValue = 1000UL, \ .name = "pulse_61" \ @@ -363,7 +181,7 @@ extern "C" { #define PULSE_ENCODER_TMR6_2_CONFIG \ { \ .tmr_handler = CM_TMR6_2, \ - .u32Fcg2Periph = FCG2_PERIPH_TMR6_2, \ + .u32PeriphClock = FCG2_PERIPH_TMR6_2, \ .hw_count = \ { \ .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \ @@ -371,12 +189,12 @@ extern "C" { }, \ .isr = \ { \ - .enIntSrc_OVF = INT_SRC_TMR6_2_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMR6_2_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO, \ + .enIntSrc_Ovf = INT_SRC_TMR6_2_OVF, \ + .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM, \ + .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO, \ + .enIntSrc_Udf = INT_SRC_TMR6_2_UDF, \ + .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM, \ + .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO, \ }, \ .u32PeriodValue = 1000UL, \ .name = "pulse_62" \ @@ -384,162 +202,6 @@ extern "C" { #endif /* PULSE_ENCODER_TMR6_2_CONFIG */ #endif /* BSP_USING_PULSE_ENCODER_TMR6_2 */ -#ifdef BSP_USING_PULSE_ENCODER_TMR6_3 -#ifndef PULSE_ENCODER_TMR6_3_CONFIG -#define PULSE_ENCODER_TMR6_3_CONFIG \ - { \ - .tmr_handler = CM_TMR6_3, \ - .u32Fcg2Periph = FCG2_PERIPH_TMR6_3, \ - .hw_count = \ - { \ - .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \ - .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMR6_3_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMR6_3_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_63" \ - } -#endif /* PULSE_ENCODER_TMR6_3_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMR6_3 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMR6_4 -#ifndef PULSE_ENCODER_TMR6_4_CONFIG -#define PULSE_ENCODER_TMR6_4_CONFIG \ - { \ - .tmr_handler = CM_TMR6_4, \ - .u32Fcg2Periph = FCG2_PERIPH_TMR6_4, \ - .hw_count = \ - { \ - .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \ - .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMR6_4_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMR6_4_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_64" \ - } -#endif /* PULSE_ENCODER_TMR6_4_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMR6_4 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMR6_5 -#ifndef PULSE_ENCODER_TMR6_5_CONFIG -#define PULSE_ENCODER_TMR6_5_CONFIG \ - { \ - .tmr_handler = CM_TMR6_5, \ - .u32Fcg2Periph = FCG2_PERIPH_TMR6_5, \ - .hw_count = \ - { \ - .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \ - .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMR6_5_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMR6_5_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_65" \ - } -#endif /* PULSE_ENCODER_TMR6_5_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMR6_5 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMR6_6 -#ifndef PULSE_ENCODER_TMR6_6_CONFIG -#define PULSE_ENCODER_TMR6_6_CONFIG \ - { \ - .tmr_handler = CM_TMR6_6, \ - .u32Fcg2Periph = FCG2_PERIPH_TMR6_6, \ - .hw_count = \ - { \ - .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \ - .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMR6_6_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMR6_6_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_66" \ - } -#endif /* PULSE_ENCODER_TMR6_6_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMR6_6 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMR6_7 -#ifndef PULSE_ENCODER_TMR6_7_CONFIG -#define PULSE_ENCODER_TMR6_7_CONFIG \ - { \ - .tmr_handler = CM_TMR6_7, \ - .u32Fcg2Periph = FCG2_PERIPH_TMR6_7, \ - .hw_count = \ - { \ - .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \ - .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMR6_7_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMR6_7_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_67" \ - } -#endif /* PULSE_ENCODER_TMR6_7_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMR6_7 */ - -#ifdef BSP_USING_PULSE_ENCODER_TMR6_8 -#ifndef PULSE_ENCODER_TMR6_8_CONFIG -#define PULSE_ENCODER_TMR6_8_CONFIG \ - { \ - .tmr_handler = CM_TMR6_8, \ - .u32Fcg2Periph = FCG2_PERIPH_TMR6_8, \ - .hw_count = \ - { \ - .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \ - .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \ - }, \ - .isr = \ - { \ - .enIntSrc_OVF = INT_SRC_TMR6_8_OVF, \ - .enIRQn_OVF = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_NUM, \ - .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_PRIO, \ - .enIntSrc_UDF = INT_SRC_TMR6_8_UDF, \ - .enIRQn_UDF = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_NUM, \ - .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_PRIO, \ - }, \ - .u32PeriodValue = 1000UL, \ - .name = "pulse_68" \ - } -#endif /* PULSE_ENCODER_TMR6_8_CONFIG */ -#endif /* BSP_USING_PULSE_ENCODER_TMR6_8 */ - #endif /* RT_USING_PULSE_ENCODER */ #endif /* __PULSE_ENCODER_CONFIG_H__ */ diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/config/pwm_tmr_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/config/pwm_tmr_config.h index f20d64d50d5..4b2bc716f82 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/config/pwm_tmr_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/config/pwm_tmr_config.h @@ -174,224 +174,6 @@ extern "C" { } #endif /* PWM_TMRA_5_CONFIG */ #endif /* BSP_USING_PWM_TMRA_5 */ - -#ifdef BSP_USING_PWM_TMRA_6 -#ifndef PWM_TMRA_6_CONFIG -#define PWM_TMRA_6_CONFIG \ - { \ - .name = "pwm_a6", \ - .instance = CM_TMRA_6, \ - .channel = 0, \ - .stcTmraInit = \ - { \ - .u8CountSrc = TMRA_CNT_SRC_SW, \ - .u32PeriodValue = 0xFFFF, \ - .sw_count = \ - { \ - .u8ClockDiv = TMRA_CLK_DIV1, \ - .u8CountMode = TMRA_MD_SAWTOOTH, \ - .u8CountDir = TMRA_DIR_DOWN, \ - }, \ - .u8CountReload = TMRA_CNT_RELOAD_ENABLE\ - }, \ - .stcPwmInit = \ - { \ - .u32CompareValue = 0x0000, \ - .u16StartPolarity = TMRA_PWM_LOW, \ - .u16StopPolarity = TMRA_PWM_LOW, \ - .u16CompareMatchPolarity = TMRA_PWM_HIGH, \ - .u16PeriodMatchPolarity = TMRA_PWM_LOW, \ - }, \ - } -#endif /* PWM_TMRA_6_CONFIG */ -#endif /* BSP_USING_PWM_TMRA_6 */ - -#ifdef BSP_USING_PWM_TMRA_7 -#ifndef PWM_TMRA_7_CONFIG -#define PWM_TMRA_7_CONFIG \ - { \ - .name = "pwm_a7", \ - .instance = CM_TMRA_7, \ - .channel = 0, \ - .stcTmraInit = \ - { \ - .u8CountSrc = TMRA_CNT_SRC_SW, \ - .u32PeriodValue = 0xFFFF, \ - .sw_count = \ - { \ - .u8ClockDiv = TMRA_CLK_DIV1, \ - .u8CountMode = TMRA_MD_SAWTOOTH, \ - .u8CountDir = TMRA_DIR_DOWN, \ - }, \ - .u8CountReload = TMRA_CNT_RELOAD_ENABLE\ - }, \ - .stcPwmInit = \ - { \ - .u32CompareValue = 0x0000, \ - .u16StartPolarity = TMRA_PWM_LOW, \ - .u16StopPolarity = TMRA_PWM_LOW, \ - .u16CompareMatchPolarity = TMRA_PWM_HIGH, \ - .u16PeriodMatchPolarity = TMRA_PWM_LOW, \ - }, \ - } -#endif /* PWM_TMRA_7_CONFIG */ -#endif /* BSP_USING_PWM_TMRA_7 */ - -#ifdef BSP_USING_PWM_TMRA_8 -#ifndef PWM_TMRA_8_CONFIG -#define PWM_TMRA_8_CONFIG \ - { \ - .name = "pwm_a8", \ - .instance = CM_TMRA_8, \ - .channel = 0, \ - .stcTmraInit = \ - { \ - .u8CountSrc = TMRA_CNT_SRC_SW, \ - .u32PeriodValue = 0xFFFF, \ - .sw_count = \ - { \ - .u8ClockDiv = TMRA_CLK_DIV1, \ - .u8CountMode = TMRA_MD_SAWTOOTH, \ - .u8CountDir = TMRA_DIR_DOWN, \ - }, \ - .u8CountReload = TMRA_CNT_RELOAD_ENABLE\ - }, \ - .stcPwmInit = \ - { \ - .u32CompareValue = 0x0000, \ - .u16StartPolarity = TMRA_PWM_LOW, \ - .u16StopPolarity = TMRA_PWM_LOW, \ - .u16CompareMatchPolarity = TMRA_PWM_HIGH, \ - .u16PeriodMatchPolarity = TMRA_PWM_LOW, \ - }, \ - } -#endif /* PWM_TMRA_8_CONFIG */ -#endif /* BSP_USING_PWM_TMRA_8 */ - -#ifdef BSP_USING_PWM_TMRA_9 -#ifndef PWM_TMRA_9_CONFIG -#define PWM_TMRA_9_CONFIG \ - { \ - .name = "pwm_a9", \ - .instance = CM_TMRA_9, \ - .channel = 0, \ - .stcTmraInit = \ - { \ - .u8CountSrc = TMRA_CNT_SRC_SW, \ - .u32PeriodValue = 0xFFFF, \ - .sw_count = \ - { \ - .u8ClockDiv = TMRA_CLK_DIV1, \ - .u8CountMode = TMRA_MD_SAWTOOTH, \ - .u8CountDir = TMRA_DIR_DOWN, \ - }, \ - .u8CountReload = TMRA_CNT_RELOAD_ENABLE\ - }, \ - .stcPwmInit = \ - { \ - .u32CompareValue = 0x0000, \ - .u16StartPolarity = TMRA_PWM_LOW, \ - .u16StopPolarity = TMRA_PWM_LOW, \ - .u16CompareMatchPolarity = TMRA_PWM_HIGH, \ - .u16PeriodMatchPolarity = TMRA_PWM_LOW, \ - }, \ - } -#endif /* PWM_TMRA_9_CONFIG */ -#endif /* BSP_USING_PWM_TMRA_9 */ - -#ifdef BSP_USING_PWM_TMRA_10 -#ifndef PWM_TMRA_10_CONFIG -#define PWM_TMRA_10_CONFIG \ - { \ - .name = "pwm_a10", \ - .instance = CM_TMRA_10, \ - .channel = 0, \ - .stcTmraInit = \ - { \ - .u8CountSrc = TMRA_CNT_SRC_SW, \ - .u32PeriodValue = 0xFFFF, \ - .sw_count = \ - { \ - .u8ClockDiv = TMRA_CLK_DIV1, \ - .u8CountMode = TMRA_MD_SAWTOOTH, \ - .u8CountDir = TMRA_DIR_DOWN, \ - }, \ - .u8CountReload = TMRA_CNT_RELOAD_ENABLE\ - }, \ - .stcPwmInit = \ - { \ - .u32CompareValue = 0x0000, \ - .u16StartPolarity = TMRA_PWM_LOW, \ - .u16StopPolarity = TMRA_PWM_LOW, \ - .u16CompareMatchPolarity = TMRA_PWM_HIGH, \ - .u16PeriodMatchPolarity = TMRA_PWM_LOW, \ - }, \ - } -#endif /* PWM_TMRA_10_CONFIG */ -#endif /* BSP_USING_PWM_TMRA_10 */ - -#ifdef BSP_USING_PWM_TMRA_11 -#ifndef PWM_TMRA_11_CONFIG -#define PWM_TMRA_11_CONFIG \ - { \ - .name = "pwm_a11", \ - .instance = CM_TMRA_11, \ - .channel = 0, \ - .stcTmraInit = \ - { \ - .u8CountSrc = TMRA_CNT_SRC_SW, \ - .u32PeriodValue = 0xFFFF, \ - .sw_count = \ - { \ - .u8ClockDiv = TMRA_CLK_DIV1, \ - .u8CountMode = TMRA_MD_SAWTOOTH, \ - .u8CountDir = TMRA_DIR_DOWN, \ - }, \ - .u8CountReload = TMRA_CNT_RELOAD_ENABLE\ - }, \ - .stcPwmInit = \ - { \ - .u32CompareValue = 0x0000, \ - .u16StartPolarity = TMRA_PWM_LOW, \ - .u16StopPolarity = TMRA_PWM_LOW, \ - .u16CompareMatchPolarity = TMRA_PWM_HIGH, \ - .u16PeriodMatchPolarity = TMRA_PWM_LOW, \ - }, \ - } -#endif /* PWM_TMRA_11_CONFIG */ -#endif /* BSP_USING_PWM_TMRA_11 */ - -#ifdef BSP_USING_PWM_TMRA_12 -#ifndef PWM_TMRA_12_CONFIG -#define PWM_TMRA_12_CONFIG \ - { \ - .name = "pwm_a12", \ - .instance = CM_TMRA_12, \ - .channel = 0, \ - .stcTmraInit = \ - { \ - .u8CountSrc = TMRA_CNT_SRC_SW, \ - .u32PeriodValue = 0xFFFF, \ - .sw_count = \ - { \ - .u8ClockDiv = TMRA_CLK_DIV1, \ - .u8CountMode = TMRA_MD_SAWTOOTH, \ - .u8CountDir = TMRA_DIR_DOWN, \ - }, \ - .u8CountReload = TMRA_CNT_RELOAD_ENABLE\ - }, \ - .stcPwmInit = \ - { \ - .u32CompareValue = 0x0000, \ - .u16StartPolarity = TMRA_PWM_LOW, \ - .u16StopPolarity = TMRA_PWM_LOW, \ - .u16CompareMatchPolarity = TMRA_PWM_HIGH, \ - .u16PeriodMatchPolarity = TMRA_PWM_LOW, \ - }, \ - } -#endif /* PWM_TMRA_12_CONFIG */ -#endif /* BSP_USING_PWM_TMRA_12 */ - #endif /* BSP_USING_PWM_TMRA */ #ifdef BSP_USING_PWM_TMR4 diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/config/qspi_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/config/qspi_config.h index f9df3687d2e..0283f1ee530 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/config/qspi_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/config/qspi_config.h @@ -65,8 +65,13 @@ extern "C" { } \ } #endif /* QSPI_DMA_CONFIG */ + +/* unit: half-word, DMA data width of QSPI transmitting is 16bit */ +#ifndef QSPI_DMA_TX_BUFSIZE +#define QSPI_DMA_TX_BUFSIZE 256 +#endif /* QSPI_DMA_TX_BUFSIZE */ #endif /* BSP_QSPI_USING_DMA */ -#endif /* BSP_USING_SPI1 */ +#endif /* BSP_USING_QSPI */ #ifdef __cplusplus } diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/drv_config.h b/bsp/hc32/ev_hc32f448_lqfp80/board/drv_config.h index 64b5b592daa..d250b654a47 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/drv_config.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/drv_config.h @@ -1,6 +1,5 @@ /* - * Copyright (c) 2006-2022, RT-Thread Development Team - * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. + * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/hc32f4xx_conf.h b/bsp/hc32/ev_hc32f448_lqfp80/board/hc32f4xx_conf.h index 438f04eaee0..d6986cf429e 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/hc32f4xx_conf.h +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/hc32f4xx_conf.h @@ -103,7 +103,7 @@ extern "C" * @note If there is no supported BSP board or the BSP function is not used, * the value needs to be set to 0U. */ -#define BSP_EV_HC32F4XX (BSP_EV_HC32F448_LQFP80) +#define BSP_EV_HC32F4XX (0U) /** * @brief This is the list of BSP components to be used. diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/SConscript b/bsp/hc32/ev_hc32f448_lqfp80/board/ports/SConscript deleted file mode 100644 index 3c57bc9c6db..00000000000 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/SConscript +++ /dev/null @@ -1,12 +0,0 @@ -import os -from building import * - -objs = [] -cwd = GetCurrentDir() - -list = os.listdir(cwd) -for item in list: - if os.path.isfile(os.path.join(cwd, item, 'SConscript')): - objs = objs + SConscript(os.path.join(item, 'SConscript')) - -Return('objs') diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/drv_spi_flash.c b/bsp/hc32/ev_hc32f448_lqfp80/board/ports/drv_spi_flash.c deleted file mode 100644 index f8e6d15ccc5..00000000000 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/drv_spi_flash.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2024-02-20 CDT first version - */ - -#include -#include -#include -#include -#include -#include -#include - -#ifdef BSP_USING_SPI_FLASH - -#include "dev_spi_flash.h" -#ifdef RT_USING_SFUD - #include "dev_spi_flash_sfud.h" -#endif - -#define SPI_BUS_NAME "spi1" -#define SPI_FLASH_DEVICE_NAME "spi10" -#define SPI_FLASH_CHIP "w25q64" -#define SPI_FLASH_SS_PIN GET_PIN(C, 7) -/* Partition Name */ -#define FS_PARTITION_NAME "filesystem" - -#ifdef RT_USING_SFUD -static void rt_hw_spi_flash_reset(char *spi_dev_name) -{ - struct rt_spi_device *spi_dev_w25; - rt_uint8_t w25_en_reset = 0x66; - rt_uint8_t w25_reset_dev = 0x99; - - spi_dev_w25 = (struct rt_spi_device *)rt_device_find(spi_dev_name); - if (!spi_dev_w25) - { - rt_kprintf("Can't find %s device!\n", spi_dev_name); - } - else - { - rt_spi_send(spi_dev_w25, &w25_en_reset, 1U); - rt_spi_send(spi_dev_w25, &w25_reset_dev, 1U); - DDL_DelayMS(1U); - rt_kprintf("Reset ext flash!\n"); - } -} - -static int rt_hw_spi_flash_with_sfud_init(void) -{ - rt_hw_spi_device_attach(SPI_BUS_NAME, SPI_FLASH_DEVICE_NAME, SPI_FLASH_SS_PIN); - - if (RT_NULL == rt_sfud_flash_probe(SPI_FLASH_CHIP, SPI_FLASH_DEVICE_NAME)) - { - rt_hw_spi_flash_reset(SPI_FLASH_DEVICE_NAME); - if (RT_NULL == rt_sfud_flash_probe(SPI_FLASH_CHIP, SPI_FLASH_DEVICE_NAME)) - { - return -RT_ERROR; - } - } - - return RT_EOK; -} -INIT_COMPONENT_EXPORT(rt_hw_spi_flash_with_sfud_init); - -static int rt_hw_fs_init(void) -{ - struct rt_device *mtd_dev = RT_NULL; - - /* 初始化 fal */ - fal_init(); - /* 生成 mtd 设备 */ - mtd_dev = fal_mtd_nor_device_create(FS_PARTITION_NAME); - if (!mtd_dev) - { - LOG_E("Can't create a mtd device on '%s' partition.", FS_PARTITION_NAME); - return -RT_ERROR; - } - else - { - /* 挂载 littlefs */ - if (RT_EOK == dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0)) - { - LOG_I("Filesystem initialized!"); - return RT_EOK; - } - else - { - /* 格式化文件系统 */ - if (RT_EOK == dfs_mkfs("lfs", FS_PARTITION_NAME)) - { - /* 挂载 littlefs */ - if (RT_EOK == dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0)) - { - LOG_I("Filesystem initialized!"); - return RT_EOK; - } - else - { - LOG_E("Failed to initialize filesystem!"); - return -RT_ERROR; - } - } - else - { - LOG_E("Failed to Format fs!"); - return -RT_ERROR; - } - } - } -} -INIT_APP_EXPORT(rt_hw_fs_init); - -#endif /* RT_USING_SFUD */ - -#endif /* BSP_USING_SPI_FLASH */ diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/SConscript b/bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/SConscript deleted file mode 100644 index cee47c2d7e2..00000000000 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/SConscript +++ /dev/null @@ -1,20 +0,0 @@ - -from building import * -import rtconfig - -cwd = GetCurrentDir() - -src = [] - -src += Glob('*.c') -CPPPATH = [cwd] -LOCAL_CFLAGS = '' - -if rtconfig.PLATFORM in ['gcc', 'armclang']: - LOCAL_CFLAGS += ' -std=c99' -elif rtconfig.PLATFORM in ['armcc']: - LOCAL_CFLAGS += ' --c99' - -group = DefineGroup('FAL', src, depend = ['RT_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS) - -Return('group') diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/fal_flash_sfud_port.c b/bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/fal_flash_sfud_port.c deleted file mode 100644 index 0b65e3f8a7d..00000000000 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/fal_flash_sfud_port.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2024-02-20 CDT first version - */ - -#include - -#include -#ifdef RT_USING_SFUD - #include -#endif - -#ifndef FAL_USING_NOR_FLASH_DEV_NAME - #define FAL_USING_NOR_FLASH_DEV_NAME "w25q64" -#endif - -static int init(void); -static int read(long offset, rt_uint8_t *buf, rt_size_t size); -static int write(long offset, const rt_uint8_t *buf, rt_size_t size); -static int erase(long offset, rt_size_t size); - -static sfud_flash_t sfud_dev = NULL; -struct fal_flash_dev ext_nor_flash0 = -{ - .name = FAL_USING_NOR_FLASH_DEV_NAME, - .addr = 0, - .len = 8 * 1024 * 1024, - .blk_size = 4096, - .ops = {init, read, write, erase}, - .write_gran = 1 -}; - -static int init(void) -{ - /* RT-Thread RTOS platform */ - sfud_dev = rt_sfud_flash_find_by_dev_name(FAL_USING_NOR_FLASH_DEV_NAME); - if (NULL == sfud_dev) - { - return -1; - } - /* update the flash chip information */ - ext_nor_flash0.blk_size = sfud_dev->chip.erase_gran; - ext_nor_flash0.len = sfud_dev->chip.capacity; - - return 0; -} - -static int read(long offset, rt_uint8_t *buf, rt_size_t size) -{ - RT_ASSERT(sfud_dev); - RT_ASSERT(sfud_dev->init_ok); - sfud_read(sfud_dev, ext_nor_flash0.addr + offset, size, buf); - - return size; -} - -static int write(long offset, const rt_uint8_t *buf, rt_size_t size) -{ - RT_ASSERT(sfud_dev); - RT_ASSERT(sfud_dev->init_ok); - if (sfud_write(sfud_dev, ext_nor_flash0.addr + offset, size, buf) != SFUD_SUCCESS) - { - return -1; - } - - return size; -} - -static int erase(long offset, rt_size_t size) -{ - RT_ASSERT(sfud_dev); - RT_ASSERT(sfud_dev->init_ok); - if (sfud_erase(sfud_dev, ext_nor_flash0.addr + offset, size) != SFUD_SUCCESS) - { - return -1; - } - - return size; -} diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/fal_cfg.h b/bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal_cfg.h similarity index 100% rename from bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/fal_cfg.h rename to bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal_cfg.h diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.c b/bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.c deleted file mode 100644 index 40f9a91a98e..00000000000 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.c +++ /dev/null @@ -1,320 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2024-02-20 CDT first version - */ - -#include -#include -#include - -#ifdef BSP_USING_TCA9539 - -#include "tca9539.h" - -/******************************************************************************* - * Local type definitions ('typedef') - ******************************************************************************/ - -/******************************************************************************* - * Local pre-processor symbols/macros ('#define') - ******************************************************************************/ -/* Define for TCA9539 */ -#define BSP_TCA9539_I2C_BUS_NAME "i2c1" -#define BSP_TCA9539_DEV_ADDR (0x74U) - -#define TCA9539_RST_PIN (32) /* PB15 */ - -/******************************************************************************* - * Global variable definitions (declared in header file with 'extern') - ******************************************************************************/ - -/******************************************************************************* - * Local function prototypes ('static') - ******************************************************************************/ - -/******************************************************************************* - * Local variable definitions ('static') - ******************************************************************************/ -static struct rt_i2c_bus_device *i2c_bus = RT_NULL; - -/******************************************************************************* - * Function implementation - global ('extern') and local ('static') - ******************************************************************************/ -/** - * @brief BSP TCA9539 write data. - * @param [in] bus: Pointer to the i2c bus device. - * @param [in] reg: Register to be written. - * @param [in] data: The pointer to the buffer contains the data to be written. - * @param [in] len: Buffer size in byte. - * @retval rt_err_t: - * - RT_EOK - * - -RT_ERROR - */ -static rt_err_t BSP_TCA9539_I2C_Write(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t *data, rt_uint16_t len) -{ - struct rt_i2c_msg msgs; - rt_uint8_t buf[6]; - - buf[0] = reg; - if (len > 0) - { - if (len < 6) - { - rt_memcpy(buf + 1, data, len); - } - else - { - return -RT_ERROR; - } - } - msgs.addr = BSP_TCA9539_DEV_ADDR; - msgs.flags = RT_I2C_WR; - msgs.buf = buf; - msgs.len = len + 1; - if (rt_i2c_transfer(bus, &msgs, 1) == 1) - { - return RT_EOK; - } - else - { - return -RT_ERROR; - } -} - -/** - * @brief BSP TCA9539 Read data. - * @param [in] bus: Pointer to the i2c bus device. - * @param [in] reg: Register to be read. - * @param [out] data: The pointer to the buffer contains the data to be read. - * @param [in] len: Buffer size in byte. - * @retval rt_err_t: - * - RT_EOK - * - -RT_ERROR - */ -static rt_err_t BSP_TCA9539_I2C_Read(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t *data, rt_uint16_t len) -{ - struct rt_i2c_msg msgs; - - if (RT_EOK != BSP_TCA9539_I2C_Write(bus, reg, RT_NULL, 0)) - { - return -RT_ERROR; - } - msgs.addr = BSP_TCA9539_DEV_ADDR; - msgs.flags = RT_I2C_RD; - msgs.buf = data; - msgs.len = len; - if (rt_i2c_transfer(bus, &msgs, 1) == 1) - { - return RT_EOK; - } - else - { - return -RT_ERROR; - } -} - - -/** - * @brief Reset TCA9539. - * @param [in] None - * @retval None - */ -static void TCA9539_Reset(void) -{ - rt_pin_mode(TCA9539_RST_PIN, PIN_MODE_OUTPUT); - /* Reset the device */ - rt_pin_write(TCA9539_RST_PIN, PIN_LOW); - rt_thread_mdelay(3U); - rt_pin_write(TCA9539_RST_PIN, PIN_HIGH); -} - -/** - * @brief Write TCA9539 pin output value. - * @param [in] u8Port Port number. - * This parameter can be one of the following values: - * @arg @ref TCA9539_Port_Definition - * @param [in] u8Pin Pin number. - * This parameter can be one or any combination of the following values: - * @arg @ref TCA9539_Pin_Definition - * @param [in] u8PinState Pin state to be written. - * This parameter can be one of the following values: - * @arg @ref TCA9539_Pin_State_Definition - * @retval rt_err_t: - * - RT_ERROR - * - RT_EOK - */ -rt_err_t TCA9539_WritePin(uint8_t u8Port, uint8_t u8Pin, uint8_t u8PinState) -{ - uint8_t u8TempData[2]; - - u8TempData[0] = u8Port + TCA9539_REG_OUTPUT_PORT0; - if (RT_EOK != BSP_TCA9539_I2C_Read(i2c_bus, u8TempData[0], &u8TempData[1], 1U)) - { - return -RT_ERROR; - } - if (0U == u8PinState) - { - u8TempData[1] &= (uint8_t)(~u8Pin); - } - else - { - u8TempData[1] |= u8Pin; - } - if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U)) - { - return -RT_ERROR; - } - - return RT_EOK; -} - -/** - * @brief Read TCA9539 pin input value. - * @param [in] u8Port Port number. - * This parameter can be one of the following values: - * @arg @ref TCA9539_Port_Definition - * @param [in] u8Pin Pin number. - * This parameter can be one or any combination of the following values: - * @arg @ref TCA9539_Pin_Definition - * @param [in] u8PinState Pin state to be written. - * This parameter can be one of the following values: - * @arg @ref TCA9539_Pin_State_Definition - * @retval rt_err_t: - * - RT_ERROR - * - RT_EOK - */ -rt_err_t TCA9539_ReadPin(uint8_t u8Port, uint8_t u8Pin, uint8_t *pu8PinState) -{ - uint8_t u8TempData[2]; - - u8TempData[0] = u8Port + TCA9539_REG_INPUT_PORT0; - if (RT_EOK != BSP_TCA9539_I2C_Read(i2c_bus, u8TempData[0], &u8TempData[1], 1U)) - { - return -RT_ERROR; - } - if (0U != (u8TempData[1] & u8Pin)) - { - *pu8PinState = TCA9539_PIN_SET; - } - else - { - *pu8PinState = TCA9539_PIN_RESET; - } - - return RT_EOK; -} - -/** - * @brief Toggle TCA9539 pin output value. - * @param [in] u8Port Port number. - * This parameter can be one of the following values: - * @arg @ref TCA9539_Port_Definition - * @param [in] u8Pin Pin number. - * This parameter can be one or any combination of the following values: - * @arg @ref TCA9539_Pin_Definition - * @retval rt_err_t: - * - -RT_ERROR - * - RT_EOK - */ -rt_err_t TCA9539_TogglePin(uint8_t u8Port, uint8_t u8Pin) -{ - uint8_t u8TempData[2]; - - u8TempData[0] = u8Port + TCA9539_REG_OUTPUT_PORT0; - if (RT_EOK != BSP_TCA9539_I2C_Read(i2c_bus, u8TempData[0], &u8TempData[1], 1U)) - { - return -RT_ERROR; - } - u8TempData[1] ^= u8Pin; - if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U)) - { - return -RT_ERROR; - } - - return RT_EOK; -} - -/** - * @brief Configuration TCA9539 pin. - * @param [in] u8Port Port number. - * This parameter can be one of the following values: - * @arg @ref TCA9539_Port_Definition - * @param [in] u8Pin Pin number. - * This parameter can be one or any combination of the following values: - * @arg @ref TCA9539_Pin_Definition - * @param [in] u8Dir Pin output direction. - * This parameter can be one of the following values: - * @arg @ref TCA9539_Direction_Definition - * @retval rt_err_t: - * - -RT_ERROR - * - RT_EOK - */ -rt_err_t TCA9539_ConfigPin(uint8_t u8Port, uint8_t u8Pin, uint8_t u8Dir) -{ - uint8_t u8TempData[2]; - - u8TempData[0] = u8Port + TCA9539_REG_CONFIG_PORT0; - if (RT_EOK != BSP_TCA9539_I2C_Read(i2c_bus, u8TempData[0], &u8TempData[1], 1U)) - { - return -RT_ERROR; - } - if (TCA9539_DIR_OUT == u8Dir) - { - u8TempData[1] &= (uint8_t)(~u8Pin); - } - else - { - u8TempData[1] |= u8Pin; - } - if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U)) - { - return -RT_ERROR; - } - - return RT_EOK; -} - -/** - * @brief Initialize TCA9539. - * @param [in] None - * @retval rt_err_t: - * - -RT_ERROR - * - RT_EOK - */ -int TCA9539_Init(void) -{ - char name[RT_NAME_MAX]; - uint8_t u8TempData[2]; - - TCA9539_Reset(); - rt_strncpy(name, BSP_TCA9539_I2C_BUS_NAME, RT_NAME_MAX); - i2c_bus = (struct rt_i2c_bus_device *)rt_device_find(name); - if (i2c_bus == RT_NULL) - { - rt_kprintf("can't find %s device!\n", BSP_TCA9539_I2C_BUS_NAME); - return -RT_ERROR; - } - /* All Pins are input as default */ - u8TempData[0] = TCA9539_REG_CONFIG_PORT0; - u8TempData[1] = 0xFFU; - if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U)) - { - return -RT_ERROR; - } - u8TempData[0] = TCA9539_REG_CONFIG_PORT1; - if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U)) - { - return -RT_ERROR; - } - - return RT_EOK; -} -INIT_PREV_EXPORT(TCA9539_Init); - -#endif /* BSP_USING_TCA9539 */ diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.h b/bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.h deleted file mode 100644 index 097f3a0675a..00000000000 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.h +++ /dev/null @@ -1,133 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2024-02-20 CDT first version - */ - -#ifndef __TCA9539_H__ -#define __TCA9539_H__ - -#include - -/** - * @defgroup TCA9539_REGISTER_Definition TCA9539 Register Definition - * @{ - */ -#define TCA9539_REG_INPUT_PORT0 (0x00U) -#define TCA9539_REG_INPUT_PORT1 (0x01U) -#define TCA9539_REG_OUTPUT_PORT0 (0x02U) -#define TCA9539_REG_OUTPUT_PORT1 (0x03U) -#define TCA9539_REG_INVERT_PORT0 (0x04U) -#define TCA9539_REG_INVERT_PORT1 (0x05U) -#define TCA9539_REG_CONFIG_PORT0 (0x06U) -#define TCA9539_REG_CONFIG_PORT1 (0x07U) -/** - * @} - */ - -/** - * @defgroup TCA9539_Port_Definition TCA9539 Port Definition - * @{ - */ -#define TCA9539_IO_PORT0 (0x00U) -#define TCA9539_IO_PORT1 (0x01U) -/** - * @} - */ - -/** - * @defgroup TCA9539_Pin_Definition TCA9539 Pin Definition - * @{ - */ -#define TCA9539_IO_PIN0 (0x01U) -#define TCA9539_IO_PIN1 (0x02U) -#define TCA9539_IO_PIN2 (0x04U) -#define TCA9539_IO_PIN3 (0x08U) -#define TCA9539_IO_PIN4 (0x10U) -#define TCA9539_IO_PIN5 (0x20U) -#define TCA9539_IO_PIN6 (0x40U) -#define TCA9539_IO_PIN7 (0x80U) -#define TCA9539_IO_PIN_ALL (0xFFU) -/** - * @} - */ - -/** - * @defgroup TCA9539_Direction_Definition TCA9539 Direction Definition - * @{ - */ -#define TCA9539_DIR_OUT (0x00U) -#define TCA9539_DIR_IN (0x01U) -/** - * @} - */ - -/** - * @defgroup TCA9539_Pin_State_Definition TCA9539 Pin State Definition - * @{ - */ -#define TCA9539_PIN_RESET (0x00U) -#define TCA9539_PIN_SET (0x01U) -/** - * @} - */ - -/** - * @defgroup HC32F448_EV_IO_Function_Sel Expand IO function definition - * @{ - */ -#define EIO_SCI_CD (TCA9539_IO_PIN1) /* Smart card detect, input */ -#define EIO_TOUCH_INT (TCA9539_IO_PIN2) /* Touch screen interrupt, input */ -#define EIO_TOUCH_CTRST (TCA9539_IO_PIN5) /* 'Reset' for Cap touch panel, output */ -#define EIO_LCD_RST (TCA9539_IO_PIN6) /* LCD panel reset, output */ -#define EIO_LCD_BKL (TCA9539_IO_PIN7) /* LCD panel back light, output */ - -#define EIO_LIN_SLEEP (TCA9539_IO_PIN1) /* LIN PHY sleep, output */ -#define EIO_CAN1_STB (TCA9539_IO_PIN2) /* CAN1 PHY standby, output */ -#define EIO_CAN2_STB (TCA9539_IO_PIN3) /* CAN2 PHY standby, output */ -#define EIO_LED_RED (TCA9539_IO_PIN5) /* Red LED, output */ -#define EIO_LED_YELLOW (TCA9539_IO_PIN6) /* Yellow LED, output */ -#define EIO_LED_BLUE (TCA9539_IO_PIN7) /* Blue LED, output */ -/** - * @} - */ - -/** - * @defgroup BSP_LED_PortPin_Sel BSP LED port/pin definition - * @{ - */ -#define LED_PORT (TCA9539_IO_PORT1) -#define LED_RED_PORT (TCA9539_IO_PORT1) -#define LED_RED_PIN (EIO_LED_RED) -#define LED_YELLOW_PORT (TCA9539_IO_PORT1) -#define LED_YELLOW_PIN (EIO_LED_YELLOW) -#define LED_BLUE_PORT (TCA9539_IO_PORT1) -#define LED_BLUE_PIN (EIO_LED_BLUE) -/** - * @} - */ - -/** - * @defgroup BSP CAN PHY STB port/pin definition - * @{ - */ -#define CAN1_STB_PORT (TCA9539_IO_PORT1) -#define CAN1_STB_PIN (EIO_CAN1_STB) -#define CAN2_STB_PORT (TCA9539_IO_PORT1) -#define CAN2_STB_PIN (EIO_CAN2_STB) -/** - * @} - */ - -int TCA9539_Init(void); -rt_err_t TCA9539_WritePin(uint8_t u8Port, uint8_t u8Pin, uint8_t u8PinState); -rt_err_t TCA9539_ReadPin(uint8_t u8Port, uint8_t u8Pin, uint8_t *pu8PinState); -rt_err_t TCA9539_TogglePin(uint8_t u8Port, uint8_t u8Pin); -rt_err_t TCA9539_ConfigPin(uint8_t u8Port, uint8_t u8Pin, uint8_t u8Dir); - -#endif diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539_port.h b/bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539_port.h new file mode 100644 index 00000000000..7a4608548ca --- /dev/null +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539_port.h @@ -0,0 +1,62 @@ +/* + * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-04-28 CDT first version + */ + +#ifndef __TCA9539_PORT_H__ +#define __TCA9539_PORT_H__ + +#include "tca9539.h" + +/** + * @defgroup HC32F448_EV_IO_Function_Sel Expand IO function definition + * @{ + */ +#define EIO_SCI_CD (TCA9539_IO_PIN1) /* Smart card detect, input */ +#define EIO_TOUCH_INT (TCA9539_IO_PIN2) /* Touch screen interrupt, input */ +#define EIO_TOUCH_CTRST (TCA9539_IO_PIN5) /* 'Reset' for Cap touch panel, output */ +#define EIO_LCD_RST (TCA9539_IO_PIN6) /* LCD panel reset, output */ +#define EIO_LCD_BKL (TCA9539_IO_PIN7) /* LCD panel back light, output */ + +#define EIO_LIN_SLEEP (TCA9539_IO_PIN1) /* LIN PHY sleep, output */ +#define EIO_CAN1_STB (TCA9539_IO_PIN2) /* CAN1 PHY standby, output */ +#define EIO_CAN2_STB (TCA9539_IO_PIN3) /* CAN2 PHY standby, output */ +#define EIO_LED_RED (TCA9539_IO_PIN5) /* Red LED, output */ +#define EIO_LED_YELLOW (TCA9539_IO_PIN6) /* Yellow LED, output */ +#define EIO_LED_BLUE (TCA9539_IO_PIN7) /* Blue LED, output */ +/** + * @} + */ + +/** + * @defgroup BSP_LED_PortPin_Sel BSP LED port/pin definition + * @{ + */ +#define LED_RED_PORT (TCA9539_IO_PORT1) +#define LED_RED_PIN (EIO_LED_RED) +#define LED_YELLOW_PORT (TCA9539_IO_PORT1) +#define LED_YELLOW_PIN (EIO_LED_YELLOW) +#define LED_BLUE_PORT (TCA9539_IO_PORT1) +#define LED_BLUE_PIN (EIO_LED_BLUE) +/** + * @} + */ + +/** + * @defgroup BSP CAN PHY STB port/pin definition + * @{ + */ +#define CAN1_STB_PORT (TCA9539_IO_PORT1) +#define CAN1_STB_PIN (EIO_CAN1_STB) +#define CAN2_STB_PORT (TCA9539_IO_PORT1) +#define CAN2_STB_PIN (EIO_CAN2_STB) +/** + * @} + */ + +#endif diff --git a/bsp/hc32/ev_hc32f448_lqfp80/jlink/ev_hc32f448_lqfp80 Debug.launch b/bsp/hc32/ev_hc32f448_lqfp80/jlink/ev_hc32f448_lqfp80 Debug.launch index 92132f82c49..d55ce7cf5b8 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/jlink/ev_hc32f448_lqfp80 Debug.launch +++ b/bsp/hc32/ev_hc32f448_lqfp80/jlink/ev_hc32f448_lqfp80 Debug.launch @@ -41,7 +41,7 @@ - + diff --git a/bsp/hc32/ev_hc32f448_lqfp80/project.ewd b/bsp/hc32/ev_hc32f448_lqfp80/project.ewd index 8831d77db8e..7380d22af8c 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/project.ewd +++ b/bsp/hc32/ev_hc32f448_lqfp80/project.ewd @@ -44,7 +44,7 @@