From 5945bae0910bc01c3736d62591dcf4d1f79f4764 Mon Sep 17 00:00:00 2001 From: Finn Wilkinson Date: Mon, 4 Nov 2024 17:43:27 +0000 Subject: [PATCH] Switched order of concatonation for NEON UMAXP instruction to match Hardware. --- src/include/simeng/arch/aarch64/helpers/neon.hh | 4 ++-- test/regression/aarch64/instructions/neon.cc | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/include/simeng/arch/aarch64/helpers/neon.hh b/src/include/simeng/arch/aarch64/helpers/neon.hh index 79be89bce1..04c2ce0b3c 100644 --- a/src/include/simeng/arch/aarch64/helpers/neon.hh +++ b/src/include/simeng/arch/aarch64/helpers/neon.hh @@ -570,8 +570,8 @@ RegisterValue vecUMaxP(srcValContainer& sourceValues) { // Concatenate the vectors T temp[2 * I]; - memcpy(temp, m, sizeof(T) * I); - memcpy(temp + (sizeof(T) * I), n, sizeof(T) * I); + memcpy(temp, n, sizeof(T) * I); + memcpy(temp + (sizeof(T) * I), m, sizeof(T) * I); // Compare each adjacent pair of elements T out[I]; for (int i = 0; i < I; i++) { diff --git a/test/regression/aarch64/instructions/neon.cc b/test/regression/aarch64/instructions/neon.cc index 2a28a4e22b..572ad842d5 100644 --- a/test/regression/aarch64/instructions/neon.cc +++ b/test/regression/aarch64/instructions/neon.cc @@ -2738,7 +2738,7 @@ TEST_P(InstNeon, umaxp) { ldr q0, [x0] ldr q1, [x0, #16] - umaxp v2.16b, v0.16b, v1.16b + umaxp v2.16b, v1.16b, v0.16b )"); CHECK_NEON(2, uint8_t,