counter | LUsmallv1w1 | LUsmallv1w128 | LUsmallv2w128 | LUsmallv3w256 | LUsmallv4w1 | LUsmallv4w128 | LUsmallv4w256 | LUsmallv4w512 |
---|---|---|---|---|---|---|---|---|
duration | 16630.0000 | 10956.0000 | 10913.0000 | 8362.0000 | 15428.0000 | 10677.0000 | 9243.0000 | 8427.0000 |
task-clock | 16729.9100 | 10952.2300 | 10909.2100 | 8356.1600 | 15427.3900 | 10673.3000 | 9238.2600 | 8422.1300 |
cycles | 63.1920 | 41.3553 | 41.1928 | 31.5376 | 58.2807 | 40.3079 | 34.8774 | 31.7974 |
stalled-cycles-backend | 0.0065 | 0.0186 | 0.1016 | 0.0228 | 0.0502 | 0.0050 | 0.0088 | 0.0282 |
stalled-cycles-frontend | 0.0039 | 0.0032 | 0.0032 | 0.0054 | 0.0051 | 0.0030 | 0.0053 | 0.0054 |
iTLB-load-misses | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
iTLB-loads | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
instructions | 369.6258 | 189.8627 | 189.5872 | 79.8033 | 278.2084 | 144.2324 | 80.8518 | 50.2689 |
branch-instructions | 46.3568 | 24.1095 | 24.1191 | 13.4193 | 46.3242 | 24.0936 | 13.4374 | 8.0801 |
branch-misses | 0.0672 | 0.0242 | 0.0239 | 0.0083 | 0.0655 | 0.0241 | 0.0111 | 0.0024 |
ex_ret_instr | 369.5178 | 189.8366 | 189.5864 | 79.7806 | 278.1142 | 144.0767 | 80.8693 | 50.2704 |
ex_ret_ops | 323.7454 | 166.6012 | 166.0290 | 67.4552 | 232.4777 | 120.6120 | 68.7911 | 48.8593 |
ex_no_retire.all | 16.7869 | 17.8140 | 17.7266 | 21.8262 | 24.6109 | 22.9320 | 23.6273 | 24.7424 |
ex_div_busy | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
sse_avx_ops_retired.all | 137.7315 | 69.9210 | 69.6542 | 24.3186 | 91.8541 | 47.1268 | 24.6086 | 20.2660 |
sse_avx_ops_retired.sse_avx_other | 137.7113 | 69.6599 | 69.4059 | 24.1870 | 91.8727 | 46.6028 | 24.2126 | 19.3391 |
sse_avx_ops_retired.sse_avx_shuffle | 0.0000 | 0.2650 | 0.2652 | 0.1333 | 0.0000 | 0.2650 | 0.1334 | 0.0000 |
sse_avx_ops_retired.sse_avx_mov | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.2691 | 0.2670 | 0.9264 |
sse_avx_ops_retired.sse_avx_logical | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
sse_avx_ops_retired.sse_avx_shift | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
packed_int_op_type.int128_mov | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.2691 | 0.2665 | 0.9262 |
packed_int_op_type.int256_mov | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
packed_int_op_type.all | 137.6966 | 69.9036 | 69.6429 | 24.3080 | 91.8112 | 47.1275 | 24.5975 | 3.7248 |
fp_ret_sse_avx_ops.all | 90.8140 | 90.5524 | 90.5728 | 90.3248 | 90.7664 | 90.5031 | 90.3840 | 90.3084 |
fp_ret_sse_avx_ops.add_sub_flops | 45.2742 | 45.1616 | 45.1583 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
fp_ret_sse_avx_ops.mult_flops | 45.5725 | 45.4137 | 45.4489 | 0.2644 | 0.2657 | 0.2651 | 0.2650 | 0.2643 |
fp_ret_sse_avx_ops.mac_flops | 0.0000 | 0.0000 | 0.0000 | 90.0818 | 90.5697 | 90.2663 | 90.1104 | 90.1556 |
fp_ret_sse_avx_ops.div_flops | 0.0021 | 0.0021 | 0.0021 | 0.0021 | 0.0021 | 0.0021 | 0.0021 | 0.0021 |
fp_ops_retired_by_width.all | 229.2882 | 116.1915 | 115.9201 | 37.0460 | 138.1504 | 70.8771 | 37.3436 | 27.7451 |
fp_ops_retired_by_width.mmx_uops_retired | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
fp_ops_retired_by_width.pack_128_uops_retired | 137.6273 | 114.8875 | 114.5923 | 2.1264 | 91.8019 | 69.6163 | 2.3977 | 3.4545 |
fp_ops_retired_by_width.pack_256_uops_retired | 0.2661 | 0.2658 | 0.2648 | 33.9813 | 0.2687 | 0.2662 | 34.0256 | 0.8026 |
fp_ops_retired_by_width.pack_512_uops_retired | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 22.2902 |
fp_ops_retired_by_width.scalar_uops_retired | 91.3490 | 1.0657 | 1.0647 | 0.9295 | 46.0596 | 0.9321 | 0.9311 | 1.1962 |
cache-misses | 0.0113 | 0.0160 | 0.0155 | 0.0166 | 0.0155 | 0.0146 | 0.1207 | 0.0270 |
cache-references | 16.3058 | 14.9800 | 15.1120 | 13.5836 | 15.5002 | 14.6253 | 15.7838 | 13.6795 |
all_data_cache_accesses | 139.3599 | 71.0870 | 71.0569 | 38.5302 | 139.4795 | 70.8338 | 39.5159 | 27.3377 |
L1-dcache-load-misses | 8.8118 | 8.1638 | 8.1645 | 8.3935 | 7.9559 | 8.3305 | 9.0727 | 8.7206 |
L1-dcache-loads | 138.1607 | 79.5863 | 79.5557 | 51.4522 | 138.1377 | 79.2945 | 52.0531 | 42.8831 |
L1-dcache-prefetches | 1.6955 | 0.9456 | 0.9535 | 0.9011 | 0.5715 | 0.9528 | 1.9771 | 1.4707 |
L1-icache-load-misses | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0002 | 0.0000 |
L1-icache-loads | 0.0018 | 0.0028 | 0.0045 | 0.0069 | 0.0038 | 0.0031 | 0.0031 | 0.0042 |
dTLB-load-misses | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0009 | 0.0000 |
dTLB-loads | 0.5004 | 0.5074 | 0.5074 | 0.5057 | 0.4996 | 0.5079 | 0.5089 | 0.5060 |