From 0a5b25916c9a91814bb9583b4085d3decf247dc5 Mon Sep 17 00:00:00 2001 From: Alexandre Mergnat Date: Tue, 3 Nov 2020 15:27:15 +0100 Subject: [PATCH] tests: protection: add riscv support Execute tests are disabled for RISC-V because is isn't able to set an execution restriction. From RISC-V documentation: "Instruction address-translation and protection are unaffected by the setting of MPRV" MPRV is used to apply memory protection restriction when CPU is running in machine mode (kernel). Signed-off-by: Alexandre Mergnat --- tests/kernel/mem_protect/protection/src/main.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tests/kernel/mem_protect/protection/src/main.c b/tests/kernel/mem_protect/protection/src/main.c index 3ada0b770286d9..933de4e5403b95 100644 --- a/tests/kernel/mem_protect/protection/src/main.c +++ b/tests/kernel/mem_protect/protection/src/main.c @@ -20,6 +20,11 @@ #define SKIP_EXECUTE_TESTS #endif +/* RISC-V have no mechanism to restrict execution */ +#if defined(CONFIG_RISCV) +#define SKIP_EXECUTE_TESTS +#endif + #define INFO(fmt, ...) printk(fmt, ##__VA_ARGS__) void k_sys_fatal_error_handler(unsigned int reason, const z_arch_esf_t *pEsf)