From e97714621bfae535d947817e98956b112eb80a75 Mon Sep 17 00:00:00 2001 From: cnlohr Date: Sat, 25 Mar 2023 07:44:05 -0400 Subject: [PATCH] Apply patches, mostly from Yimin Gu --- arch/Config.in.riscv | 1 - .../riscv32-virt/nommu/patches/linux-headers | 1 + ...imental-RISC-V-32-bit-No-MMU-support.patch | 48 +++++++ board/qemu/riscv32-virt/readme.txt | 4 + configs/qemu_riscv32_nommu_virt_defconfig | 19 +++ package/Makefile.in | 13 +- ...07-elf2flt-add-riscv-32-bits-support.patch | 53 +++++++ .../uclibc/0001-RISC-V-32-bit-support.patch | 134 ++++++++++++++++++ package/uclibc/Config.in | 2 + 9 files changed, 272 insertions(+), 3 deletions(-) create mode 120000 board/qemu/riscv32-virt/nommu/patches/linux-headers create mode 100644 board/qemu/riscv32-virt/nommu/patches/linux/6.1.14/0001-Experimental-RISC-V-32-bit-No-MMU-support.patch create mode 100644 configs/qemu_riscv32_nommu_virt_defconfig create mode 100644 package/elf2flt/0007-elf2flt-add-riscv-32-bits-support.patch create mode 100644 package/uclibc/0001-RISC-V-32-bit-support.patch diff --git a/arch/Config.in.riscv b/arch/Config.in.riscv index b5e84389e0a..91508f67a80 100644 --- a/arch/Config.in.riscv +++ b/arch/Config.in.riscv @@ -71,7 +71,6 @@ choice config BR2_RISCV_32 bool "32-bit" - select BR2_USE_MMU config BR2_RISCV_64 bool "64-bit" diff --git a/board/qemu/riscv32-virt/nommu/patches/linux-headers b/board/qemu/riscv32-virt/nommu/patches/linux-headers new file mode 120000 index 00000000000..ce5e2c77b2d --- /dev/null +++ b/board/qemu/riscv32-virt/nommu/patches/linux-headers @@ -0,0 +1 @@ +linux/ \ No newline at end of file diff --git a/board/qemu/riscv32-virt/nommu/patches/linux/6.1.14/0001-Experimental-RISC-V-32-bit-No-MMU-support.patch b/board/qemu/riscv32-virt/nommu/patches/linux/6.1.14/0001-Experimental-RISC-V-32-bit-No-MMU-support.patch new file mode 100644 index 00000000000..97cb81b5798 --- /dev/null +++ b/board/qemu/riscv32-virt/nommu/patches/linux/6.1.14/0001-Experimental-RISC-V-32-bit-No-MMU-support.patch @@ -0,0 +1,48 @@ +diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig +index fcbb81feb..fc48b458a 100644 +--- a/arch/riscv/Kconfig ++++ b/arch/riscv/Kconfig +@@ -162,8 +162,8 @@ config MMU + + config PAGE_OFFSET + hex +- default 0xC0000000 if 32BIT +- default 0x80000000 if 64BIT && !MMU ++ default 0xC0000000 if 32BIT && MMU ++ default 0x80000000 if !MMU + default 0xff60000000000000 if 64BIT + + config KASAN_SHADOW_OFFSET +@@ -237,7 +237,6 @@ config ARCH_RV32I + select GENERIC_LIB_ASHRDI3 + select GENERIC_LIB_LSHRDI3 + select GENERIC_LIB_UCMPDI2 +- select MMU + + config ARCH_RV64I + bool "RV64I" + +diff --git a/arch/riscv/include/uapi/asm/unistd.h b/arch/riscv/include/uapi/asm/unistd.h +index 73d7cdd2e..53f5410c1 100644 +--- a/arch/riscv/include/uapi/asm/unistd.h ++++ b/arch/riscv/include/uapi/asm/unistd.h +@@ -15,9 +15,14 @@ + * along with this program. If not, see . + */ + +-#if defined(__LP64__) && !defined(__SYSCALL_COMPAT) ++#ifndef __SYSCALL_COMPAT + #define __ARCH_WANT_NEW_STAT + #define __ARCH_WANT_SET_GET_RLIMIT ++#endif ++ ++#ifndef __LP64__ ++#define __ARCH_WANT_STAT64 ++#define __ARCH_WANT_TIME32_SYSCALLS + #endif /* __LP64__ */ + + #define __ARCH_WANT_SYS_CLONE3 +-- +2.38.1 + + diff --git a/board/qemu/riscv32-virt/readme.txt b/board/qemu/riscv32-virt/readme.txt index 32b43335126..65780fcb1f1 100644 --- a/board/qemu/riscv32-virt/readme.txt +++ b/board/qemu/riscv32-virt/readme.txt @@ -2,4 +2,8 @@ Run Linux in emulation with: qemu-system-riscv32 -M virt -bios output/images/fw_jump.elf -kernel output/images/Image -append "rootwait root=/dev/vda ro" -drive file=output/images/rootfs.ext2,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -netdev user,id=net0 -device virtio-net-device,netdev=net0 -nographic # qemu_riscv32_virt_defconfig +alternatively: + + qemu-system-riscv32 -M virt -bios none -kernel output/images/Image -append "rootwait root=/dev/vda ro" -drive file=output/images/rootfs.ext2,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -nographic -cpu rv32,mmu=off # qemu_riscv32_nommu_virt_defconfig + The login prompt will appear in the terminal that started Qemu. diff --git a/configs/qemu_riscv32_nommu_virt_defconfig b/configs/qemu_riscv32_nommu_virt_defconfig new file mode 100644 index 00000000000..5b17f53632f --- /dev/null +++ b/configs/qemu_riscv32_nommu_virt_defconfig @@ -0,0 +1,19 @@ +BR2_riscv=y +BR2_riscv_custom=y +BR2_RISCV_ISA_CUSTOM_RVM=y +BR2_RISCV_32=y +# BR2_RISCV_USE_MMU is not set +BR2_PACKAGE_HOST_LINUX_HEADERS_CUSTOM_5_19=y +BR2_PTHREADS_NONE=y +BR2_GLOBAL_PATCH_DIR="board/qemu/riscv32-virt/nommu/patches" +BR2_ROOTFS_POST_IMAGE_SCRIPT="board/qemu/post-image.sh" +BR2_ROOTFS_POST_SCRIPT_ARGS="$(BR2_DEFCONFIG)" +BR2_LINUX_KERNEL=y +BR2_LINUX_KERNEL_CUSTOM_VERSION=y +BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.19" +BR2_LINUX_KERNEL_DEFCONFIG="nommu_rv32_virt" +BR2_PACKAGE_BUSYBOX_CONFIG="package/busybox/busybox-minimal.config" +# BR2_PACKAGE_IFUPDOWN_SCRIPTS is not set +BR2_TARGET_ROOTFS_EXT2=y +BR2_PACKAGE_HOST_QEMU=y +BR2_PACKAGE_HOST_QEMU_SYSTEM_MODE=y diff --git a/package/Makefile.in b/package/Makefile.in index d70aded82ba..14a87847401 100644 --- a/package/Makefile.in +++ b/package/Makefile.in @@ -39,10 +39,16 @@ endif # Compute GNU_TARGET_NAME GNU_TARGET_NAME = $(ARCH)-$(TARGET_VENDOR)-$(TARGET_OS)-$(LIBC)$(ABI) -# FLAT binary format needs uclinux, except RISC-V 64-bits which needs +# FLAT binary format needs uclinux, except RISC-V nommu which needs # the regular linux name. -ifeq ($(BR2_BINFMT_FLAT):$(BR2_RISCV_64),y:) +ifeq ($(BR2_BINFMT_FLAT),y) +ifeq ($(BR2_RISCV_64),y) +TARGET_OS = linux +else ifeq ($(BR2_RISCV_32),y) +TARGET_OS = linux +else TARGET_OS = uclinux +endif else TARGET_OS = linux endif @@ -179,6 +185,9 @@ ifeq ($(BR2_BINFMT_FLAT),y) ifeq ($(BR2_RISCV_64),y) TARGET_CFLAGS += -fPIC endif +ifeq ($(BR2_RISCV_32),y) +TARGET_CFLAGS += -fPIC +endif ifeq ($(BR2_BINFMT_FLAT_ONE),y) ELF2FLT_FLAGS = $(if $($(PKG)_FLAT_STACKSIZE),\ -Wl$(comma)-elf2flt="-r -s$($(PKG)_FLAT_STACKSIZE)",\ diff --git a/package/elf2flt/0007-elf2flt-add-riscv-32-bits-support.patch b/package/elf2flt/0007-elf2flt-add-riscv-32-bits-support.patch new file mode 100644 index 00000000000..6456e9b89f2 --- /dev/null +++ b/package/elf2flt/0007-elf2flt-add-riscv-32-bits-support.patch @@ -0,0 +1,53 @@ +--- + elf2flt.c | 9 ++++++--- + ld-elf2flt.c | 2 +- + 2 files changed, 7 insertions(+), 4 deletions(-) + +diff --git a/elf2flt.c b/elf2flt.c +index 949edd1..28f3808 100644 +--- a/elf2flt.c ++++ b/elf2flt.c +@@ -81,7 +81,7 @@ const char *elf2flt_progname; + #include + #elif defined(TARGET_xtensa) + #include +-#elif defined(TARGET_riscv64) ++#elif defined(TARGET_riscv64) || defined(TARGET_riscv32) + #include + #endif + +@@ -127,6 +127,8 @@ const char *elf2flt_progname; + #define ARCH "xtensa" + #elif defined(TARGET_riscv64) + #define ARCH "riscv64" ++#elif defined(TARGET_riscv32) ++#define ARCH "riscv32" + #else + #error "Don't know how to support your CPU architecture??" + #endif +@@ -838,7 +841,7 @@ output_relocs ( + goto good_32bit_resolved_reloc; + default: + goto bad_resolved_reloc; +-#elif defined(TARGET_riscv64) ++#elif defined(TARGET_riscv64) || defined(TARGET_riscv32) + case R_RISCV_32_PCREL: + case R_RISCV_ADD32: + case R_RISCV_ADD64: +diff --git a/ld-elf2flt.c b/ld-elf2flt.c +index 75ee1bb..68b2a4a 100644 +--- a/ld-elf2flt.c ++++ b/ld-elf2flt.c +@@ -327,7 +327,7 @@ static int do_final_link(void) + /* riscv adds a global pointer symbol to the linker file with the + "RISCV_GP:" prefix. Remove the prefix for riscv64 architecture and + the entire line for other architectures. */ +- if (streq(TARGET_CPU, "riscv64")) ++ if (streq(TARGET_CPU, "riscv64") || streq(TARGET_CPU, "riscv32")) + append_sed(&sed, "^RISCV_GP:", ""); + else + append_sed(&sed, "^RISCV_GP:", NULL); +-- +2.38.1 + + diff --git a/package/uclibc/0001-RISC-V-32-bit-support.patch b/package/uclibc/0001-RISC-V-32-bit-support.patch new file mode 100644 index 00000000000..8532dfdde2a --- /dev/null +++ b/package/uclibc/0001-RISC-V-32-bit-support.patch @@ -0,0 +1,134 @@ +Patch originally From: Yimin Gu +--- + Rules.mak | 2 ++ + extra/Configs/Config.in | 9 +++++++++ + extra/Configs/Config.riscv32 | 14 ++++++++++++++ + libc/sysdeps/linux/riscv32 | 1 + + libc/sysdeps/linux/riscv64/bits/wordsize.h | 3 ++- + libc/sysdeps/linux/riscv64/sys/asm.h | 6 +++++- + 6 files changed, 33 insertions(+), 2 deletions(-) + create mode 100644 extra/Configs/Config.riscv32 + create mode 120000 libc/sysdeps/linux/riscv32 + +diff --git a/Rules.mak b/Rules.mak +index 3fb64c728..71a14fc38 100644 +--- a/Rules.mak ++++ b/Rules.mak +@@ -305,6 +305,7 @@ ifneq ($(TARGET_ARCH),c6x) + ifneq ($(TARGET_ARCH),h8300) + ifneq ($(TARGET_ARCH),arc) + ifneq ($(TARGET_ARCH),aarch64) ++ifneq ($(TARGET_ARCH),riscv32) + CPU_CFLAGS-y += -msoft-float + endif + endif +@@ -316,6 +317,7 @@ endif + endif + endif + endif ++endif + + ifeq ($(TARGET_ARCH),aarch64) + CPU_CFLAGS-y += -ftls-model=initial-exec +diff --git a/extra/Configs/Config.in b/extra/Configs/Config.in +index a58ceb265..5e6af800d 100644 +--- a/extra/Configs/Config.in ++++ b/extra/Configs/Config.in +@@ -39,6 +39,7 @@ choice + default TARGET_or1k if DESIRED_TARGET_ARCH = "or1k" + default TARGET_powerpc if DESIRED_TARGET_ARCH = "powerpc" + default TARGET_riscv64 if DESIRED_TARGET_ARCH = "riscv64" ++ default TARGET_riscv32 if DESIRED_TARGET_ARCH = "riscv32" + default TARGET_sh if DESIRED_TARGET_ARCH = "sh" + default TARGET_sparc if DESIRED_TARGET_ARCH = "sparc" + default TARGET_sparc64 if DESIRED_TARGET_ARCH = "sparc64" +@@ -125,6 +126,9 @@ config TARGET_powerpc + config TARGET_riscv64 + bool "riscv64" + ++config TARGET_riscv32 ++ bool "riscv32" ++ + config TARGET_sh + bool "superh" + +@@ -240,6 +244,10 @@ if TARGET_riscv64 + source "extra/Configs/Config.riscv64" + endif + ++if TARGET_riscv32 ++source "extra/Configs/Config.riscv32" ++endif ++ + if TARGET_sh + source "extra/Configs/Config.sh" + endif +@@ -538,6 +546,7 @@ config UCLIBC_HAS_LINUXTHREADS + select UCLIBC_HAS_REALTIME + depends on !TARGET_aarch64 && \ + !TARGET_riscv64 && \ ++ !TARGET_riscv32 && \ + !TARGET_metag + help + If you want to compile uClibc with Linuxthreads support, then answer Y. +diff --git a/extra/Configs/Config.riscv32 b/extra/Configs/Config.riscv32 +new file mode 100644 +index 000000000..304d30f70 +--- /dev/null ++++ b/extra/Configs/Config.riscv32 +@@ -0,0 +1,14 @@ ++# ++# For a description of the syntax of this configuration file, ++# see extra/config/Kconfig-language.txt ++# ++ ++config TARGET_ARCH ++ string ++ default "riscv32" ++ ++config FORCE_OPTIONS_FOR_ARCH ++ bool ++ default y ++ select ARCH_LITTLE_ENDIAN ++ select ARCH_HAS_MMU +diff --git a/libc/sysdeps/linux/riscv32 b/libc/sysdeps/linux/riscv32 +new file mode 120000 +index 000000000..11677ef05 +--- /dev/null ++++ b/libc/sysdeps/linux/riscv32 +@@ -0,0 +1 @@ ++riscv64 +\ No newline at end of file +diff --git a/libc/sysdeps/linux/riscv64/bits/wordsize.h b/libc/sysdeps/linux/riscv64/bits/wordsize.h +index 67a16ba62..1fc649aad 100644 +--- a/libc/sysdeps/linux/riscv64/bits/wordsize.h ++++ b/libc/sysdeps/linux/riscv64/bits/wordsize.h +@@ -25,5 +25,6 @@ + #if __riscv_xlen == 64 + # define __WORDSIZE_TIME64_COMPAT32 1 + #else +-# error "rv32i-based targets are not supported" ++# define __WORDSIZE_TIME64_COMPAT32 1 ++// # warning "rv32i-based targets are experimental" + #endif +diff --git a/libc/sysdeps/linux/riscv64/sys/asm.h b/libc/sysdeps/linux/riscv64/sys/asm.h +index ddb84b683..3c94c9a70 100644 +--- a/libc/sysdeps/linux/riscv64/sys/asm.h ++++ b/libc/sysdeps/linux/riscv64/sys/asm.h +@@ -26,7 +26,11 @@ + # define REG_S sd + # define REG_L ld + #elif __riscv_xlen == 32 +-# error "rv32i-based targets are not supported" ++# define PTRLOG 2 ++# define SZREG 4 ++# define REG_S sw ++# define REG_L lw ++// # warning "rv32i-based targets are experimental" + #else + # error __riscv_xlen must equal 32 or 64 + #endif +-- +2.37.1 + + diff --git a/package/uclibc/Config.in b/package/uclibc/Config.in index 2555487f06d..a1e9305ca0a 100644 --- a/package/uclibc/Config.in +++ b/package/uclibc/Config.in @@ -17,6 +17,7 @@ config BR2_PACKAGE_UCLIBC_ARCH_SUPPORTS default y if BR2_powerpc # see libc/sysdeps/linux/riscv64/sys/asm.h default y if BR2_RISCV_64 && (BR2_RISCV_ABI_LP64 || BR2_RISCV_ABI_LP64D) + default y if BR2_RISCV_32 default y if BR2_sh4 default y if BR2_sh4eb default y if BR2_sparc @@ -138,6 +139,7 @@ config BR2_UCLIBC_TARGET_ARCH default "i386" if BR2_i386 default "x86_64" if BR2_x86_64 default "riscv64" if BR2_RISCV_64 + default "riscv32" if BR2_RISCV_32 config BR2_UCLIBC_MIPS_ABI string