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dtb.dts
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/dts-v1/;
/ {
compatible = "rockchip,rk3528-evb1-ddr4-v10\0rockchip,rk3528";
interrupt-parent = <0x01>;
#address-cells = <0x02>;
#size-cells = <0x02>;
model = "Rockchip RK3528 EVB1 DDR4 V10 Board";
aliases {
ethernet0 = "/ethernet@ffbd0000";
ethernet1 = "/ethernet@ffbe0000";
gpio0 = "/pinctrl/gpio@ff610000";
gpio1 = "/pinctrl/gpio@ffaf0000";
gpio2 = "/pinctrl/gpio@ffb00000";
gpio3 = "/pinctrl/gpio@ffb10000";
gpio4 = "/pinctrl/gpio@ffb20000";
i2c0 = "/i2c@ffa50000";
i2c1 = "/i2c@ffa58000";
i2c2 = "/i2c@ffa60000";
i2c3 = "/i2c@ffa68000";
i2c4 = "/i2c@ffa70000";
i2c5 = "/i2c@ffa78000";
i2c6 = "/i2c@ffa80000";
i2c7 = "/i2c@ffa88000";
serial0 = "/serial@ff9f0000";
serial1 = "/serial@ff9f8000";
serial2 = "/serial@ffa00000";
serial3 = "/serial@ffa08000";
serial4 = "/serial@ffa10000";
serial5 = "/serial@ffa18000";
serial6 = "/serial@ffa20000";
serial7 = "/serial@ffa28000";
spi0 = "/spi@ff9c0000";
spi1 = "/spi@ff9d0000";
spi2 = "/spi@ffc00000";
};
clocks {
compatible = "simple-bus";
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
xin24m {
compatible = "fixed-clock";
#clock-cells = <0x00>;
clock-frequency = <0x16e3600>;
clock-output-names = "xin24m";
phandle = <0x7e>;
};
mclkin-sai0 {
compatible = "fixed-clock";
#clock-cells = <0x00>;
clock-frequency = <0x00>;
clock-output-names = "i2s0_mclkin";
phandle = <0xa3>;
};
mclkin-sai1 {
compatible = "fixed-clock";
#clock-cells = <0x00>;
clock-frequency = <0x00>;
clock-output-names = "i2s1_mclkin";
phandle = <0xa4>;
};
mclkout-sai0@ff340014 {
compatible = "rockchip,clk-out";
reg = <0x00 0xff340014 0x00 0x04>;
clocks = <0x02 0xaf>;
#clock-cells = <0x00>;
clock-output-names = "mclk_sai0_to_io";
rockchip,bit-shift = <0x01>;
rockchip,bit-set-to-disable;
phandle = <0xa5>;
};
mclkout-sai1@ff320004 {
compatible = "rockchip,clk-out";
reg = <0x00 0xff320004 0x00 0x04>;
clocks = <0x02 0x123>;
#clock-cells = <0x00>;
clock-output-names = "mclk_sai1_to_io";
rockchip,bit-shift = <0x0e>;
rockchip,bit-set-to-disable;
phandle = <0xa6>;
};
};
cpus {
#address-cells = <0x02>;
#size-cells = <0x00>;
cpu-map {
cluster0 {
core0 {
cpu = <0x03>;
};
core1 {
cpu = <0x04>;
};
core2 {
cpu = <0x05>;
};
core3 {
cpu = <0x06>;
};
};
};
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x00 0x00>;
enable-method = "psci";
clocks = <0x07 0x15>;
#cooling-cells = <0x02>;
dynamic-power-coefficient = <0x93>;
operating-points-v2 = <0x08>;
cpu-idle-states = <0x09>;
cpu-supply = <0x0a>;
phandle = <0x03>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x00 0x01>;
enable-method = "psci";
clocks = <0x07 0x15>;
operating-points-v2 = <0x08>;
cpu-idle-states = <0x09>;
phandle = <0x04>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x00 0x02>;
enable-method = "psci";
clocks = <0x07 0x15>;
operating-points-v2 = <0x08>;
cpu-idle-states = <0x0b>;
phandle = <0x05>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x00 0x03>;
enable-method = "psci";
clocks = <0x07 0x15>;
operating-points-v2 = <0x08>;
cpu-idle-states = <0x0b>;
phandle = <0x06>;
};
idle-states {
entry-method = "psci";
cpu-sleep0 {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x10000>;
entry-latency-us = <0x78>;
exit-latency-us = <0xfa>;
min-residency-us = <0x384>;
status = "disabled";
phandle = <0x09>;
};
cpu-sleep {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x10000>;
entry-latency-us = <0x78>;
exit-latency-us = <0xfa>;
min-residency-us = <0x384>;
status = "okay";
phandle = <0x0b>;
};
};
};
cpu0-opp-table {
compatible = "operating-points-v2";
opp-shared;
nvmem-cells = <0x0c 0x0d>;
nvmem-cell-names = "leakage\0opp-info";
rockchip,video-4k-freq = <0x124f80>;
rockchip,pvtm-voltage-sel = <0x00 0x528 0x00 0x529 0x546 0x01 0x547 0x55f 0x02 0x560 0x57d 0x03 0x57e 0x59b 0x04 0x59c 0x5be 0x05 0x5bf 0x5e1 0x06 0x5e2 0x604 0x07 0x605 0x627 0x08 0x628 0x64a 0x09 0x64b 0x668 0x0a 0x669 0x270f 0x0b>;
rockchip,pvtm-pvtpll;
rockchip,pvtm-offset = <0x18>;
rockchip,pvtm-sample-time = <0x44c>;
rockchip,pvtm-freq = <0x188940>;
rockchip,pvtm-volt = <0xdbba0>;
rockchip,pvtm-ref-temp = <0x28>;
rockchip,pvtm-temp-prop = <0x00 0x00>;
rockchip,pvtm-thermal-zone = "soc-thermal";
rockchip,grf = <0x0e>;
phandle = <0x08>;
opp-408000000 {
opp-hz = <0x00 0x18519600>;
opp-microvolt = <0xc96a8 0xc96a8 0x10c8e0>;
opp-microvolt-L0 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L1 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L2 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L3 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L4 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L5 = <0xcc77c 0xcc77c 0x10c8e0>;
clock-latency-ns = <0x9c40>;
opp-suspend;
};
opp-600000000 {
opp-hz = <0x00 0x23c34600>;
opp-microvolt = <0xc96a8 0xc96a8 0x10c8e0>;
opp-microvolt-L0 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L1 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L2 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L3 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L4 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L5 = <0xcc77c 0xcc77c 0x10c8e0>;
clock-latency-ns = <0x9c40>;
};
opp-816000000 {
opp-hz = <0x00 0x30a32c00>;
opp-microvolt = <0xc96a8 0xc96a8 0x10c8e0>;
opp-microvolt-L0 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L1 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L2 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L3 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L4 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L5 = <0xcc77c 0xcc77c 0x10c8e0>;
clock-latency-ns = <0x9c40>;
};
opp-1008000000 {
opp-hz = <0x00 0x3c14dc00>;
opp-microvolt = <0xc96a8 0xc96a8 0x10c8e0>;
opp-microvolt-L0 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L1 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L2 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L3 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L4 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L5 = <0xcc77c 0xcc77c 0x10c8e0>;
clock-latency-ns = <0x9c40>;
};
opp-1200000000 {
opp-hz = <0x00 0x47868c00>;
opp-microvolt = <0xc96a8 0xc96a8 0x10c8e0>;
opp-microvolt-L0 = <0xdbba0 0xdbba0 0x10c8e0>;
opp-microvolt-L1 = <0xd8acc 0xd8acc 0x10c8e0>;
opp-microvolt-L2 = <0xd59f8 0xd59f8 0x10c8e0>;
opp-microvolt-L3 = <0xd59f8 0xd59f8 0x10c8e0>;
opp-microvolt-L4 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L5 = <0xcf850 0xcf850 0x10c8e0>;
opp-microvolt-L6 = <0xcc77c 0xcc77c 0x10c8e0>;
clock-latency-ns = <0x9c40>;
};
opp-1416000000 {
opp-hz = <0x00 0x54667200>;
opp-microvolt = <0xeafc4 0xeafc4 0x10c8e0>;
opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0x10c8e0>;
opp-microvolt-L2 = <0xe7ef0 0xe7ef0 0x10c8e0>;
opp-microvolt-L3 = <0xe4e1c 0xe4e1c 0x10c8e0>;
opp-microvolt-L4 = <0xe1d48 0xe1d48 0x10c8e0>;
opp-microvolt-L5 = <0xdec74 0xdec74 0x10c8e0>;
opp-microvolt-L6 = <0xdbba0 0xdbba0 0x10c8e0>;
opp-microvolt-L7 = <0xd8acc 0xd88d8 0x10c8e0>;
opp-microvolt-L8 = <0xd59f8 0xd59f8 0x10c8e0>;
opp-microvolt-L9 = <0xd2924 0xd2924 0x10c8e0>;
opp-microvolt-L10 = <0xcf850 0xcf850 0x10c8e0>;
opp-microvolt-L11 = <0xcf850 0xcf850 0x10c8e0>;
clock-latency-ns = <0x9c40>;
};
opp-1608000000 {
opp-hz = <0x00 0x5fd82200>;
opp-microvolt = <0xf7314 0xf7314 0x10c8e0>;
opp-microvolt-L2 = <0xf4240 0xf4240 0x10c8e0>;
opp-microvolt-L3 = <0xf116c 0xf116c 0x10c8e0>;
opp-microvolt-L4 = <0xee098 0xee098 0x10c8e0>;
opp-microvolt-L5 = <0xeafc4 0xeafc4 0x10c8e0>;
opp-microvolt-L6 = <0xe7ef0 0xe7ef0 0x10c8e0>;
opp-microvolt-L7 = <0xe4e1c 0xe4e1c 0x10c8e0>;
opp-microvolt-L8 = <0xe1d48 0xe1d48 0x10c8e0>;
opp-microvolt-L9 = <0xdec74 0xdec74 0x10c8e0>;
opp-microvolt-L10 = <0xdbba0 0xdbba0 0x10c8e0>;
opp-microvolt-L11 = <0xd8acc 0xd8acc 0x10c8e0>;
clock-latency-ns = <0x9c40>;
};
opp-1800000000 {
opp-hz = <0x00 0x6b49d200>;
opp-microvolt = <0x103664 0x103664 0x10c8e0>;
opp-microvolt-L1 = <0x100590 0x100590 0x10c8e0>;
opp-microvolt-L2 = <0xfd4bc 0xfd4bc 0x10c8e0>;
opp-microvolt-L3 = <0xfa3e8 0xfa3e8 0x10c8e0>;
opp-microvolt-L4 = <0xf7314 0xf7314 0x10c8e0>;
opp-microvolt-L5 = <0xf4240 0xf4240 0x10c8e0>;
opp-microvolt-L6 = <0xf116c 0xf116c 0x10c8e0>;
opp-microvolt-L7 = <0xee098 0xee098 0x10c8e0>;
opp-microvolt-L8 = <0xeafc4 0xeafc4 0x10c8e0>;
opp-microvolt-L9 = <0xe7ef0 0xe7ef0 0x10c8e0>;
opp-microvolt-L10 = <0xe4e1c 0xe4e1c 0x10c8e0>;
opp-microvolt-L11 = <0xe1d48 0xe1d48 0x10c8e0>;
clock-latency-ns = <0x9c40>;
};
opp-2016000000 {
opp-hz = <0x00 0x7829b800>;
opp-microvolt = <0x10c8e0 0x10c8e0 0x10c8e0>;
opp-microvolt-L1 = <0x10980c 0x10980c 0x10c8e0>;
opp-microvolt-L2 = <0x106738 0x106738 0x10c8e0>;
opp-microvolt-L3 = <0x103664 0x103664 0x10c8e0>;
opp-microvolt-L4 = <0x100590 0x100590 0x10c8e0>;
opp-microvolt-L5 = <0xfd4bc 0xfd4bc 0x10c8e0>;
opp-microvolt-L6 = <0xfa3e8 0xfa3e8 0x10c8e0>;
opp-microvolt-L7 = <0xf7314 0xf7314 0x10c8e0>;
opp-microvolt-L8 = <0xf4240 0xf4240 0x10c8e0>;
opp-microvolt-L9 = <0xf116c 0xf116c 0x10c8e0>;
opp-microvolt-L10 = <0xee098 0xee098 0x10c8e0>;
opp-microvolt-L11 = <0xeafc4 0xeafc4 0x10c8e0>;
clock-latency-ns = <0x9c40>;
};
};
arm-pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <0x00 0xab 0x04 0x00 0xac 0x04 0x00 0xad 0x04 0x00 0xae 0x04>;
interrupt-affinity = <0x03 0x04 0x05 0x06>;
};
cpuinfo {
compatible = "rockchip,cpuinfo";
nvmem-cells = <0x0f 0x10 0x11>;
nvmem-cell-names = "id\0cpu-version\0cpu-code";
};
display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <0x12>;
status = "okay";
memory-region = <0x13 0x14>;
memory-region-names = "drm-logo\0drm-cubic-lut";
phandle = <0xa7>;
route {
route-hdmi {
status = "okay";
logo,uboot = "logo.bmp";
logo,mode = "fullscreen";
charge_logo,mode = "center";
connect = <0x15>;
phandle = <0xa8>;
};
route-tve {
status = "okay";
logo,uboot = "logo.bmp";
logo,mode = "fullscreen";
charge_logo,mode = "center";
connect = <0x16>;
phandle = <0xa9>;
};
};
};
dmc {
compatible = "rockchip,rk3528-dmc";
clocks = <0x07 0x14>;
clock-names = "dmc_clk";
operating-points-v2 = <0x17>;
status = "okay";
center-supply = <0x18>;
phandle = <0xaa>;
};
dmc-opp-table {
compatible = "operating-points-v2";
nvmem-cells = <0x19 0x1a>;
nvmem-cell-names = "leakage\0opp-info";
rockchip,temp-hysteresis = <0x1388>;
rockchip,low-temp = <0x2710>;
rockchip,low-temp-min-volt = <0xdbba0>;
rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0x0e 0x01 0x0f 0x16 0x02 0x17 0x1c 0x03 0x1d 0xfe 0x04>;
phandle = <0x17>;
opp-920000000 {
opp-hz = <0x00 0x36d61600>;
opp-microvolt = <0xcf850 0xcf850 0xf4240>;
};
opp-1056000000 {
opp-hz = <0x00 0x3ef14800>;
opp-microvolt = <0xcf850 0xcf850 0xf4240>;
opp-microvolt-L0 = <0xd59f8 0xd59f8 0xf4240>;
opp-microvolt-L1 = <0xcf850 0xcf850 0xf4240>;
opp-microvolt-L2 = <0xcf850 0xcf850 0xf4240>;
opp-microvolt-L3 = <0xcf850 0xcf850 0xf4240>;
opp-microvolt-L4 = <0xcf850 0xcf850 0xf4240>;
};
opp-1184000000 {
opp-hz = <0x00 0x46926800>;
opp-microvolt = <0xdbba0 0xdbba0 0xf4240>;
opp-microvolt-L0 = <0xe7ef0 0xe7ef0 0xf4240>;
opp-microvolt-L1 = <0xe1d48 0xe1d48 0xf4240>;
opp-microvolt-L2 = <0xdbba0 0xdbba0 0xf4240>;
opp-microvolt-L3 = <0xd59f8 0xd59f8 0xf4240>;
opp-microvolt-L4 = <0xd2924 0xd2924 0xf4240>;
status = "disabled";
};
};
firmware {
scmi {
compatible = "arm,scmi-smc";
shmem = <0x1b>;
arm,smc-id = <0x82000010>;
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0xab>;
protocol@14 {
reg = <0x14>;
#clock-cells = <0x01>;
assigned-clocks = <0x07 0x15>;
assigned-clock-rates = <0x47868c00>;
phandle = <0x07>;
};
};
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
};
mpp-srv {
compatible = "rockchip,mpp-service";
rockchip,taskqueue-count = <0x05>;
rockchip,resetgroup-count = <0x05>;
status = "okay";
phandle = <0x2d>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
rkvtunnel {
compatible = "rockchip,video-tunnel";
status = "okay";
phandle = <0xac>;
};
rockchip-suspend {
compatible = "rockchip,pm-rk3528";
status = "okay";
rockchip,sleep-debug-en = <0x01>;
rockchip,sleep-mode-config = <0x01>;
rockchip,wakeup-config = <0x11>;
rockchip,virtual-poweroff = <0x01>;
rockchip,pwm-regulator-config = <0x03>;
phandle = <0xad>;
};
rockchip-system-monitor {
compatible = "rockchip,system-monitor";
rockchip,thermal-zone = "soc-thermal";
rockchip,polling-delay = <0xc8>;
rockchip,temp-hysteresis = <0x1388>;
rockchip,offline-cpu-temp = <0x19a28>;
rockchip,temp-offline-cpus = "2-3";
phandle = <0xae>;
};
thermal-zones {
phandle = <0xaf>;
soc-thermal {
polling-delay-passive = <0x14>;
polling-delay = <0x3e8>;
sustainable-power = <0x27e>;
thermal-sensors = <0x1c 0x00>;
phandle = <0xb0>;
trips {
trip-point-0 {
temperature = <0x17318>;
hysteresis = <0x7d0>;
type = "passive";
phandle = <0xb1>;
};
trip-point-1 {
temperature = <0x1adb0>;
hysteresis = <0x7d0>;
type = "passive";
phandle = <0x1d>;
};
soc-crit {
temperature = <0x1d4c0>;
hysteresis = <0x7d0>;
type = "critical";
phandle = <0xb2>;
};
};
cooling-maps {
map0 {
trip = <0x1d>;
cooling-device = <0x03 0xffffffff 0xffffffff>;
contribution = <0x400>;
};
map1 {
trip = <0x1d>;
cooling-device = <0x1e 0xffffffff 0xffffffff>;
contribution = <0x400>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>;
};
scmi-shmem@10f000 {
compatible = "arm,scmi-shmem";
reg = <0x00 0x10f000 0x00 0x100>;
phandle = <0x1b>;
};
sram@fe480000 {
compatible = "mmio-sram";
reg = <0x00 0xfe480000 0x00 0xc000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0xfe480000 0xc000>;
phandle = <0xb3>;
rkvdec-sram@0 {
reg = <0x00 0xc000>;
phandle = <0x2e>;
};
};
pcie@fe4f0000 {
compatible = "rockchip,rk3528-pcie\0snps,dw-pcie";
#address-cells = <0x03>;
#size-cells = <0x02>;
bus-range = <0x00 0xff>;
clocks = <0x02 0xd9 0x02 0xda 0x02 0xdb 0x02 0x9e 0x02 0xd8 0x02 0xd7 0x02 0xdc>;
clock-names = "aclk\0hclk_slv\0hclk_dbi\0pclk_cru\0aux\0pclk\0pipe";
device_type = "pci";
interrupts = <0x00 0x9e 0x04 0x00 0x9d 0x04 0x00 0x9c 0x04 0x00 0x9b 0x04 0x00 0x9a 0x04 0x00 0x99 0x04>;
interrupt-names = "msi\0pmc\0sys\0legacy\0msg\0err";
#interrupt-cells = <0x01>;
interrupt-map-mask = <0x00 0x00 0x00 0x07>;
interrupt-map = <0x00 0x00 0x00 0x01 0x1f 0x00 0x00 0x00 0x00 0x02 0x1f 0x01 0x00 0x00 0x00 0x03 0x1f 0x02 0x00 0x00 0x00 0x04 0x1f 0x03>;
linux,pci-domain = <0x00>;
num-ib-windows = <0x08>;
num-ob-windows = <0x08>;
num-viewport = <0x04>;
max-link-speed = <0x02>;
num-lanes = <0x01>;
phys = <0x20 0x02>;
phy-names = "pcie-phy";
ranges = <0x800 0x00 0xfc000000 0x00 0xfc000000 0x00 0x100000 0x81000000 0x00 0xfc100000 0x00 0xfc100000 0x00 0x100000 0x82000000 0x00 0xfc200000 0x00 0xfc200000 0x00 0x1e00000 0xc3000000 0x01 0x00 0x01 0x00 0x00 0x40000000>;
reg = <0x00 0xfe4f0000 0x00 0x10000 0x01 0x40000000 0x00 0x400000>;
reg-names = "pcie-apb\0pcie-dbi";
resets = <0x02 0x1e3 0x02 0x1e1 0x02 0x19b>;
reset-names = "pcie\0periph\0preset_cru";
status = "disabled";
phandle = <0xb4>;
legacy-interrupt-controller {
interrupt-controller;
#address-cells = <0x00>;
#interrupt-cells = <0x01>;
interrupt-parent = <0x01>;
interrupts = <0x00 0x9b 0x01>;
phandle = <0x1f>;
};
};
usbdrd {
compatible = "rockchip,rk3528-dwc3\0rockchip,rk3399-dwc3";
clocks = <0x02 0x106 0x02 0x107 0x02 0x105>;
clock-names = "ref_clk\0suspend_clk\0bus_clk";
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
status = "okay";
phandle = <0xb5>;
dwc3@fe500000 {
compatible = "snps,dwc3";
reg = <0x00 0xfe500000 0x00 0x400000>;
interrupts = <0x00 0x98 0x04>;
dr_mode = "host";
phys = <0x21 0x20 0x04>;
phy-names = "usb2-phy\0usb3-phy";
phy_type = "utmi_wide";
resets = <0x02 0x211>;
reset-names = "usb3-otg";
snps,dis_enblslpm_quirk;
snps,dis-u1u2-quirk;
snps,dis-u2-freeclk-exists-quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
snps,xhci-trb-ent-quirk;
snps,dis_rxdet_inp3_quirk;
quirk-skip-phy-init;
status = "okay";
extcon = <0x22>;
phandle = <0xb6>;
};
};
interrupt-controller@fed01000 {
compatible = "arm,gic-400";
#interrupt-cells = <0x03>;
#address-cells = <0x00>;
interrupt-controller;
reg = <0x00 0xfed01000 0x00 0x1000 0x00 0xfed02000 0x00 0x2000 0x00 0xfed04000 0x00 0x2000 0x00 0xfed06000 0x00 0x2000>;
interrupts = <0x01 0x09 0xf08>;
phandle = <0x01>;
};
usb@ff100000 {
compatible = "generic-ehci";
reg = <0x00 0xff100000 0x00 0x40000>;
interrupts = <0x00 0x8f 0x04>;
clocks = <0x02 0x1a0 0x02 0x1a1 0x22>;
clock-names = "usbhost\0arbiter\0utmi";
phys = <0x23>;
phy-names = "usb2-phy";
status = "okay";
phandle = <0xb7>;
};
usb@ff140000 {
compatible = "generic-ohci";
reg = <0x00 0xff140000 0x00 0x40000>;
interrupts = <0x00 0x90 0x04>;
clocks = <0x02 0x1a0 0x02 0x1a1 0x22>;
clock-names = "usbhost\0arbiter\0utmi";
phys = <0x23>;
phy-names = "usb2-phy";
status = "okay";
phandle = <0xb8>;
};
debug@ff190000 {
compatible = "rockchip,debug";
reg = <0x00 0xff190000 0x00 0x1000 0x00 0xff192000 0x00 0x1000 0x00 0xff194000 0x00 0x1000 0x00 0xff196000 0x00 0x1000>;
phandle = <0xb9>;
};
qos@ff200000 {
compatible = "syscon";
reg = <0x00 0xff200000 0x00 0x20>;
phandle = <0xba>;
};
qos@ff200080 {
compatible = "syscon";
reg = <0x00 0xff200080 0x00 0x20>;
phandle = <0xbb>;
};
qos@ff200100 {
compatible = "syscon";
reg = <0x00 0xff200100 0x00 0x20>;
phandle = <0xbc>;
};
qos@ff200200 {
compatible = "syscon";
reg = <0x00 0xff200200 0x00 0x20>;
phandle = <0xbd>;
};
qos@ff200280 {
compatible = "syscon";
reg = <0x00 0xff200280 0x00 0x20>;
phandle = <0xbe>;
};
qos@ff200300 {
compatible = "syscon";
reg = <0x00 0xff200300 0x00 0x20>;
phandle = <0xbf>;
};
qos@ff200380 {
compatible = "syscon";
reg = <0x00 0xff200380 0x00 0x20>;
phandle = <0xc0>;
};
qos@ff210000 {
compatible = "syscon";
reg = <0x00 0xff210000 0x00 0x20>;
phandle = <0xc1>;
};
qos@ff210080 {
compatible = "syscon";
reg = <0x00 0xff210080 0x00 0x20>;
phandle = <0xc2>;
};
qos@ff220000 {
compatible = "syscon";
reg = <0x00 0xff220000 0x00 0x20>;
phandle = <0x24>;
};
qos@ff220080 {
compatible = "syscon";
reg = <0x00 0xff220080 0x00 0x20>;
phandle = <0x25>;
};
qos@ff240000 {
compatible = "syscon";
reg = <0x00 0xff240000 0x00 0x20>;
phandle = <0xc3>;
};
qos@ff250000 {
compatible = "syscon";
reg = <0x00 0xff250000 0x00 0x20>;
phandle = <0xc4>;
};
qos@ff260000 {
compatible = "syscon";
reg = <0x00 0xff260000 0x00 0x20>;
phandle = <0xc5>;
};
qos@ff270000 {
compatible = "syscon";
reg = <0x00 0xff270000 0x00 0x20>;
phandle = <0xc6>;
};
qos@ff270080 {
compatible = "syscon";
reg = <0x00 0xff270080 0x00 0x20>;
phandle = <0xc7>;
};
qos@ff270100 {
compatible = "syscon";
reg = <0x00 0xff270100 0x00 0x20>;
phandle = <0xc8>;
};
qos@ff270200 {
compatible = "syscon";
reg = <0x00 0xff270200 0x00 0x20>;
phandle = <0xc9>;
};
qos@ff270280 {
compatible = "syscon";
reg = <0x00 0xff270280 0x00 0x20>;
phandle = <0xca>;
};
qos@ff270300 {
compatible = "syscon";
reg = <0x00 0xff270300 0x00 0x20>;
phandle = <0xcb>;
};
qos@ff270380 {
compatible = "syscon";
reg = <0x00 0xff270380 0x00 0x20>;
phandle = <0xcc>;
};
qos@ff270480 {
compatible = "syscon";
reg = <0x00 0xff270480 0x00 0x20>;
phandle = <0xcd>;
};
qos@ff270500 {
compatible = "syscon";
reg = <0x00 0xff270500 0x00 0x20>;
phandle = <0xce>;
};
qos@ff280000 {
compatible = "syscon";
reg = <0x00 0xff280000 0x00 0x20>;
phandle = <0xcf>;
};
qos@ff280080 {
compatible = "syscon";
reg = <0x00 0xff280080 0x00 0x20>;
phandle = <0xd0>;
};
qos@ff280100 {
compatible = "syscon";
reg = <0x00 0xff280100 0x00 0x20>;
phandle = <0xd1>;
};
qos@ff280180 {
compatible = "syscon";
reg = <0x00 0xff280180 0x00 0x20>;
phandle = <0xd2>;
};
qos@ff280200 {
compatible = "syscon";
reg = <0x00 0xff280200 0x00 0x20>;
phandle = <0xd3>;
};
qos@ff280280 {
compatible = "syscon";
reg = <0x00 0xff280280 0x00 0x20>;
phandle = <0xd4>;
};
qos@ff280300 {
compatible = "syscon";
reg = <0x00 0xff280300 0x00 0x20>;
phandle = <0xd5>;
};
qos@ff280380 {
compatible = "syscon";
reg = <0x00 0xff280380 0x00 0x20>;
phandle = <0xd6>;
};
qos@ff280400 {
compatible = "syscon";
reg = <0x00 0xff280400 0x00 0x20>;
phandle = <0xd7>;
};
syscon@ff300000 {
compatible = "rockchip,rk3528-grf\0syscon\0simple-mfd";
reg = <0x00 0xff300000 0x00 0x90000>;
phandle = <0x0e>;
grf-clock-controller {
compatible = "rockchip,rk3528-grf-cru";
#clock-cells = <0x01>;
phandle = <0x71>;
};
reboot-mode {
compatible = "syscon-reboot-mode";
offset = <0x70200>;
mode-bootloader = <0x5242c301>;
mode-charge = <0x5242c30b>;
mode-fastboot = <0x5242c309>;
mode-loader = <0x5242c301>;
mode-normal = <0x5242c300>;
mode-recovery = <0x5242c303>;
mode-ums = <0x5242c30c>;
mode-panic = <0x5242c307>;
mode-watchdog = <0x5242c308>;
phandle = <0xd8>;
};
};
clock-controller@ff4a0000 {
compatible = "rockchip,rk3528-cru";
reg = <0x00 0xff4a0000 0x00 0x30000>;
rockchip,grf = <0x0e>;
#clock-cells = <0x01>;
#reset-cells = <0x01>;
assigned-clocks = <0x02 0x1ff 0x02 0x03 0x02 0x04 0x02 0x02 0x02 0x0d 0x02 0x11 0x02 0x09 0x02 0x0a 0x02 0x0b 0x02 0x0c 0x02 0x0e 0x02 0x0f 0x02 0x10 0x02 0x12 0x02 0x90 0x02 0x8f 0x02 0x95 0x02 0x55 0x02 0x144 0x02 0x96 0x02 0x93>;
assigned-clock-rates = <0x8000 0x46cf7100 0x3b9aca00 0x3b5dc100 0xee6b280 0x1dcd6500 0x2faf080 0x5f5e100 0x8f0d180 0xbebc200 0x11e1a300 0x1443fd00 0x17d78400 0x23c34600 0x2faf080 0x5f5e100 0x7735940 0x1dcd6500 0x1443fd00 0x11e1a300 0xbebc200>;
phandle = <0x02>;
};
syscon@ff540000 {
compatible = "rockchip,rk3528-ioc-grf\0syscon";
reg = <0x00 0xff540000 0x00 0x40000>;
phandle = <0x7f>;
};
power-management@ff600000 {
compatible = "rockchip,rk3528-pmu\0syscon\0simple-mfd";
reg = <0x00 0xff600000 0x00 0x2000>;
phandle = <0xd9>;
power-controller {
compatible = "rockchip,rk3528-power-controller";
#power-domain-cells = <0x01>;
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "okay";
phandle = <0x26>;
pd_gpu@4 {
reg = <0x04>;
clocks = <0x02 0x113 0x02 0x10e>;
pm_qos = <0x24 0x25>;
};
pd_rkvdec@5 {
reg = <0x05>;
};
pd_rkvenc@6 {
reg = <0x06>;
};
pd_vo@7 {
reg = <0x07>;
};
pd_vpu@8 {
reg = <0x08>;
};
};
};
mailbox@ff630000 {
compatible = "rockchip,rk3528-mailbox\0rockchip,rk3368-mailbox";
reg = <0x00 0xff630000 0x00 0x200>;
interrupts = <0x00 0x3c 0x04>;
clocks = <0x02 0x20a>;
clock-names = "pclk_mailbox";
#mbox-cells = <0x01>;
status = "disabled";
phandle = <0xda>;
};
gpu@ff700000 {
compatible = "arm,mali-450";
reg = <0x00 0xff700000 0x00 0x40000>;
interrupts = <0x00 0x58 0x04 0x00 0x59 0x04 0x00 0x56 0x04 0x00 0x5c 0x04 0x00 0x5d 0x04 0x00 0x5a 0x04 0x00 0x5b 0x04>;
interrupt-names = "Mali_GP_IRQ\0Mali_GP_MMU_IRQ\0IRQPP\0Mali_PP0_IRQ\0Mali_PP0_MMU_IRQ\0Mali_PP1_IRQ\0Mali_PP1_MMU_IRQ";
clocks = <0x07 0x16 0x02 0x113 0x02 0x10e>;
clock-names = "clk_mali\0aclk_gpu_mali\0pclk_gpu";
assigned-clocks = <0x07 0x16>;
assigned-clock-rates = <0x11e1a300>;
power-domains = <0x26 0x04>;
operating-points-v2 = <0x27>;
#cooling-cells = <0x02>;
rockchip,grf = <0x0e>;
status = "okay";
mali-supply = <0x28>;
phandle = <0x1e>;
power-model {
compatible = "simple-power-model";
leakage-range = <0x01 0x03>;
ls = <0xffffc2d6 0x1071a 0x00>;
static-coefficient = <0x2710>;
dynamic-coefficient = <0x2d4>;
ts = <0x302a42 0x1d55a 0xfffff636 0x27>;
thermal-zone = "soc-thermal";
phandle = <0xdb>;
};
};
gpu-opp-table {
compatible = "operating-points-v2";
nvmem-cells = <0x29 0x2a>;
nvmem-cell-names = "leakage\0opp-info";
rockchip,pvtm-voltage-sel = <0x00 0x2ee 0x00 0x2ef 0x302 0x01 0x303 0x316 0x02 0x317 0x32a 0x03 0x32b 0x33e 0x04 0x33f 0x352 0x05 0x353 0x366 0x06 0x367 0x37a 0x07 0x37b 0x270f 0x08>;