Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Ensure we account for intrinsics which have gtType=TYP_SIMD16 but gtSIMDSize=32 #35904

Merged
merged 1 commit into from
May 7, 2020
Merged

Ensure we account for intrinsics which have gtType=TYP_SIMD16 but gtSIMDSize=32 #35904

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
8 changes: 7 additions & 1 deletion src/coreclr/src/jit/lower.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1334,7 +1334,13 @@ void Lowering::LowerArg(GenTreeCall* call, GenTree** ppArg)
else if (arg->OperIs(GT_SIMD, GT_HWINTRINSIC))
{
GenTreeJitIntrinsic* jitIntrinsic = reinterpret_cast<GenTreeJitIntrinsic*>(arg);
assert((jitIntrinsic->gtSIMDSize == 12) || (jitIntrinsic->gtSIMDSize == 16));

// For HWIntrinsic, there are some intrinsics like ExtractVector128 which have
// a gtType of TYP_SIMD16 but a gtSIMDSize of 32, so we need to include that in
// the assert below.

assert((jitIntrinsic->gtSIMDSize == 12) || (jitIntrinsic->gtSIMDSize == 16) ||
(jitIntrinsic->gtSIMDSize == 32));

if (jitIntrinsic->gtSIMDSize == 12)
{
Expand Down