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Need to enable interrupt for cross-core message passing with RTIC #94

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Erhannis opened this issue Oct 26, 2024 · 0 comments
Open

Need to enable interrupt for cross-core message passing with RTIC #94

Erhannis opened this issue Oct 26, 2024 · 0 comments

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@Erhannis
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This is a problem I worked around; not sure if it's a bug or just needs to be documented, or what.

So I have an RP2040, and I'm running RTIC tasks on core 0 and I'm using core 1 to read from uart, so the small uart buffer doesn't overflow. I'm passing data from core 1 to core 0 via (StaticSender).try_send(x) on core 1, and reading it via (StaticReceiver).recv().await. At some point I realized that recv wasn't completing until a task (any task?) woke up - for instance, recv would complete when a timer in a different task went off. Suspecting that nothing was getting notified of the pending message, and knowing RTIC uses interrupts, and having specified SW0_IRQ as RTIC's dispatcher, I added this as the first line of my core 1 code.

unsafe { rp2040_hal::pac::NVIC::unmask(rp2040_hal::pac::Interrupt::SW0_IRQ); }

If you use a different interrupt, you presumably need to unmask that one - there may be some subtleties if you have multiple priorities with their own interrupts. I just have the one, so far.

I don't know what's going on under the hood - do you know if this could break something or cause UB? unmask said it could break mask-based critical sections, and I don't know whether having it at the beginning of the code for that core guarantees otherwise.

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