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Releases
Greg Tucker edited this page Aug 17, 2020
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- AES-GCM, AES-XTS for next gen CPU
- EC performance improvements for 6+ parity
- CRC32 and CRC16 next gen CPU
- CRC performance improvements for next gen CPU
- Multi-buffer SM3 functions. Experimental base functions only.
- Multi-architecture support
- Threaded igzip
- Adler32 function
- Multi-arch improvements
- Performance test improvements
- Various fixes for sanitizer warnings
- Compression on random file performance improvements
- Additional small file compression improvements
- Multi-arch autoconf
- Small file compression performance improvements
- igzip gzip/zlib header/trailer handling
- igzip userspace tool/example
- Zero detect memory function
- Decompression Performance Improvements (Multi Byte Decode)
- Level 3 Compression performance improvements
- Better EC Examples
- Level 2 & 3 Compression Level added. Level 3 is currently only optimized for processors with AVX512 instructions.
- New T10dif CRC and Copy function
- CRC32 iSCSI performance improvements
- Multi-buffer hash performance improvement for Intel Atom processors.
- New base functions for multi-buffer hashes.
- Multi Buffer Hashing : extend the max size to > 4 GB
- Add Non Temporal(NT) runtime versions of AES_GCM
- Add Saturation Benchmark for determining the saturation point for each algorithm like MBH, CRC, AES and EC.
- Rolling Hash
- Multi Buffer Hash improvements
- AES GCM : super small packet performance improvements
- Adler and zlib format for Inflate\Deflate
- New 2-pass fully-dynamic deflate compression (level 0-1).
- Base functions for multi-architecture support
- Multi-hash SHA-256 based
- RAID AVX512 versions
ISA-L v2.17 features summary
- Fast Decompression (Inflate) - New.
- Compression Improvements (Deflate) - speed, compression ratio improvements and new features.
- Fast Custom Huffman Code generation – creates optimized Huffman table based on some sample input.
- CRC64