From c1b8c6cf41df4a148e7a89c3a3c7e8049b0a47af Mon Sep 17 00:00:00 2001 From: Aart Bik <39774503+aartbik@users.noreply.github.com> Date: Wed, 28 Feb 2024 10:18:21 -0800 Subject: [PATCH] [mlir][vector][print] do not append newline to printing pure strings (#83213) Since the vector.print str provides no punctuation control, it is slightly more flexible to let the client of this operation decide whether there should be a trailing newline. This allows for printing like vector.print str "nse = " vector.print %nse : index as nse = 42 --- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 3 ++- ...t-wide-int-emulation-compare-results-i16.mlir | 2 +- .../Dialect/Linalg/CPU/ArmSME/fill-2d.mlir | 2 +- .../Linalg/CPU/ArmSME/use-too-many-tiles.mlir | 10 +++++----- .../CPU/ArmSME/Emulated/test-setArmSVLBits.mlir | 8 ++++---- .../CPU/ArmSME/load-store-128-bit-tile.mlir | 8 ++++---- .../Vector/CPU/ArmSME/test-load-vertical.mlir | 8 ++++---- .../CPU/ArmSME/test-multi-tile-transpose.mlir | 8 ++++---- .../Vector/CPU/ArmSME/test-outerproduct-f32.mlir | 16 ++++++++-------- .../Vector/CPU/ArmSME/test-outerproduct-f64.mlir | 16 ++++++++-------- .../Vector/CPU/ArmSME/test-transfer-read-2d.mlir | 12 ++++++------ .../CPU/ArmSME/test-transfer-write-2d.mlir | 2 +- .../Vector/CPU/ArmSME/test-transpose.mlir | 8 ++++---- .../Dialect/Vector/CPU/ArmSME/tile_fill.mlir | 4 ++-- .../Vector/CPU/ArmSME/vector-load-store.mlir | 8 ++++---- .../CPU/ArmSVE/arrays-of-scalable-vectors.mlir | 12 ++++++------ .../Dialect/Vector/CPU/test-print-str.mlir | 4 ++-- 17 files changed, 66 insertions(+), 65 deletions(-) diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp index 19cc914efae005..337f8bb6ab99ed 100644 --- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp +++ b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp @@ -1532,7 +1532,8 @@ class VectorPrintOpConversion : public ConvertOpToLLVMPattern { auto punct = printOp.getPunctuation(); if (auto stringLiteral = printOp.getStringLiteral()) { LLVM::createPrintStrCall(rewriter, loc, parent, "vector_print_str", - *stringLiteral, *getTypeConverter()); + *stringLiteral, *getTypeConverter(), + /*addNewline=*/false); } else if (punct != PrintPunctuation::NoPunctuation) { emitCall(rewriter, printOp->getLoc(), [&] { switch (punct) { diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir index 15bafeda67403e..437e49a6b81446 100644 --- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir +++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir @@ -26,7 +26,7 @@ func.func @check_results(%lhs : i16, %rhs : i16, %res0 : i16, %res1 : i16) -> () %mismatch = arith.cmpi ne, %res0, %res1 : i16 scf.if %mismatch -> () { vector.print %res1 : i16 - vector.print str "Mismatch" + vector.print str "Mismatch\n" } return } diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir index 12f13e8dbc4a9f..881e2799b5b06b 100644 --- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir +++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir @@ -88,7 +88,7 @@ func.func @entry() { } // CHECK: SME: END OF TEST OUTPUT - vector.print str "SME: END OF TEST OUTPUT" + vector.print str "SME: END OF TEST OUTPUT\n" return } diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir index ee3866de303e03..588b44a36c29f3 100644 --- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir +++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir @@ -24,23 +24,23 @@ func.func @use_too_many_tiles(%a: memref, %b: memref, %c: mem // CHECK-LABEL: tile_a: // CHECK-COUNT-8: ( 0, 0, 0, 0, 0, 0, 0, 0 - vector.print str "tile_a:" + vector.print str "tile_a:\n" vector.print %tile_a : vector<[8]x[8]xi16> // CHECK-LABEL: tile_b: // CHECK-COUNT-8: ( 1, 1, 1, 1, 1, 1, 1, 1 - vector.print str "tile_b:" + vector.print str "tile_b:\n" vector.print %tile_b : vector<[8]x[8]xi16> // CHECK-LABEL: tile_c: // CHECK-COUNT-8: ( 2, 2, 2, 2, 2, 2, 2, 2 - vector.print str "tile_c:" + vector.print str "tile_c:\n" vector.print %tile_c : vector<[8]x[8]xi16> // CHECK-LABEL: tile_d: // CHECK-COUNT-8: ( 3, 3, 3, 3, 3, 3, 3, 3 - vector.print str "tile_d:" + vector.print str "tile_d:\n" vector.print %tile_d : vector<[8]x[8]xi16> // CHECK-LABEL: tile_e: // CHECK-COUNT-8: ( 4, 4, 4, 4, 4, 4, 4, 4 - vector.print str "tile_e:" + vector.print str "tile_e:\n" vector.print %tile_e : vector<[8]x[8]xi16> return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/Emulated/test-setArmSVLBits.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/Emulated/test-setArmSVLBits.mlir index 415181171e27b8..1794564a6a7244 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/Emulated/test-setArmSVLBits.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/Emulated/test-setArmSVLBits.mlir @@ -12,13 +12,13 @@ func.func @checkSVL() { %svl_h = arm_sme.streaming_vl %svl_w = arm_sme.streaming_vl %svl_d = arm_sme.streaming_vl - vector.print str "SVL.b" + vector.print str "SVL.b\n" vector.print %svl_b : index - vector.print str "SVL.h" + vector.print str "SVL.h\n" vector.print %svl_h : index - vector.print str "SVL.w" + vector.print str "SVL.w\n" vector.print %svl_w : index - vector.print str "SVL.d" + vector.print str "SVL.d\n" vector.print %svl_d : index return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir index 2b8899b6c6fc32..41e724844fe403 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir @@ -53,13 +53,13 @@ func.func @test_load_store_zaq0() { // CHECK-LABEL: INITIAL TILE A: // CHECK: ( 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 ) - vector.print str "INITIAL TILE A:" + vector.print str "INITIAL TILE A:\n" func.call @print_i8s(%tile_a_bytes, %zaq_size_bytes) : (memref, index) -> () vector.print punctuation // CHECK-LABEL: INITIAL TILE B: // CHECK: ( 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64 ) - vector.print str "INITIAL TILE B:" + vector.print str "INITIAL TILE B:\n" func.call @print_i8s(%tile_b_bytes, %zaq_size_bytes) : (memref, index) -> () vector.print punctuation @@ -68,13 +68,13 @@ func.func @test_load_store_zaq0() { // CHECK-LABEL: FINAL TILE A: // CHECK: ( 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 ) - vector.print str "FINAL TILE A:" + vector.print str "FINAL TILE A:\n" func.call @print_i8s(%tile_a_bytes, %zaq_size_bytes) : (memref, index) -> () vector.print punctuation // CHECK-LABEL: FINAL TILE B: // CHECK: ( 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 ) - vector.print str "FINAL TILE B:" + vector.print str "FINAL TILE B:\n" func.call @print_i8s(%tile_b_bytes, %zaq_size_bytes) : (memref, index) -> () return diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir index 27be801252b812..68c31ac1dd8e9c 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-load-vertical.mlir @@ -49,12 +49,12 @@ func.func @entry() { // CHECK-NEXT: ( 2, 2, 2, 2 // CHECK-NEXT: ( 3, 3, 3, 3 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" scf.for %i = %c0 to %za_s_size step %svl_s { %tileslice = vector.load %mem1[%i] : memref, vector<[4]xi32> vector.print %tileslice : vector<[4]xi32> } - vector.print str "TILE END" + vector.print str "TILE END\n" // 2. VERTICAL LAYOUT // Dump "mem2". The smallest SVL is 128-bits so the tile will be at least @@ -66,9 +66,9 @@ func.func @entry() { // CHECK-NEXT: ( 0, 1, 2, 3 // CHECK-NEXT: ( 0, 1, 2, 3 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %0 : vector<[4]x[4]xi32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir index 9d836d93c85bb7..cd48f2a9ebfd89 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-multi-tile-transpose.mlir @@ -46,12 +46,12 @@ func.func @testTransposedReadWithMask(%maskRows: index, %maskCols: index) { vector.transfer_write %readTransposed, %outDyn[%c0, %c0] {in_bounds = [true, true]} : vector<[16]x[4]xf32>, memref /// Print the input memref. - vector.print str "Input memref:" + vector.print str "Input memref:\n" %inUnranked = memref.cast %inDyn : memref to memref<*xf32> call @printMemrefF32(%inUnranked) : (memref<*xf32>) -> () /// Print the result memref. - vector.print str "Masked transposed result:" + vector.print str "Masked transposed result:\n" %outUnranked = memref.cast %outDyn : memref to memref<*xf32> call @printMemrefF32(%outUnranked) : (memref<*xf32>) -> () @@ -84,12 +84,12 @@ func.func @testTransposedWriteWithMask(%maskRows: index, %maskCols: index) { : vector<[16]x[4]xf32>, memref /// Print the input memref. - vector.print str "Input memref:" + vector.print str "Input memref:\n" %inUnranked = memref.cast %inDyn : memref to memref<*xf32> call @printMemrefF32(%inUnranked) : (memref<*xf32>) -> () /// Print the result memref. - vector.print str "Masked transposed result:" + vector.print str "Masked transposed result:\n" %outUnranked = memref.cast %outDyn : memref to memref<*xf32> call @printMemrefF32(%outUnranked) : (memref<*xf32>) -> () diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir index 7e7869d1c957aa..fb6c06cfd69999 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f32.mlir @@ -35,9 +35,9 @@ func.func @test_outerproduct_no_accumulator_4x4xf32() { // WITHOUT-ACC-NEXT: ( 0, 2, 4, 6 // WITHOUT-ACC-NEXT: ( 0, 3, 6, 9 // WITHOUT-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xf32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -60,9 +60,9 @@ func.func @test_outerproduct_with_accumulator_4x4xf32() { // WITH-ACC-NEXT: ( 10, 12, 14, 16 // WITH-ACC-NEXT: ( 10, 13, 16, 19 // WITH-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xf32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -91,9 +91,9 @@ func.func @test_masked_outerproduct_no_accumulator_4x4xf32() { // WITH-MASK-NEXT: ( 3, 6, 0, 0 // WITH-MASK-NEXT: ( 0, 0, 0, 0 // WITH-MASK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xf32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -124,9 +124,9 @@ func.func @test_masked_outerproduct_with_accumulator_4x4xf32() { // WITH-MASK-AND-ACC-NEXT: ( 10, 10, 10, 10 // WITH-MASK-AND-ACC-NEXT: ( 10, 10, 10, 10 // WITH-MASK-AND-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xf32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir index 46bf799232ae3a..b8458606d3f324 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-outerproduct-f64.mlir @@ -40,9 +40,9 @@ func.func @test_outerproduct_no_accumulator_2x2xf64() { // CHECK-NEXT: ( 1, 2 // CHECK-NEXT: ( 2, 4 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[2]x[2]xf64> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -66,9 +66,9 @@ func.func @test_outerproduct_with_accumulator_2x2xf64() { // WITH-ACC-NEXT: ( 11, 12 // WITH-ACC-NEXT: ( 12, 14 // WITH-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[2]x[2]xf64> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -96,9 +96,9 @@ func.func @test_masked_outerproduct_no_accumulator_2x2xf64() { // WITH-MASK-NEXT: ( 1, 0 // WITH-MASK-NEXT: ( 2, 0 // WITH-MASK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[2]x[2]xf64> - vector.print str "TILE END" + vector.print str "TILE END\n" return } @@ -127,9 +127,9 @@ func.func @test_masked_outerproduct_with_accumulator_2x2xf64() { // WITH-MASK-AND-ACC-NEXT: ( 11, 12 // WITH-MASK-AND-ACC-NEXT: ( 10, 10 // WITH-MASK-AND-ACC: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[2]x[2]xf64> - vector.print str "TILE END" + vector.print str "TILE END\n" return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir index 52f56883cad9c1..7421521b96bf92 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-read-2d.mlir @@ -14,7 +14,7 @@ func.func @transfer_read_2d(%A : memref, %base1: index, %base2: index) %0 = vector.transfer_read %A[%base1, %base2], %pad {in_bounds=[true, true]} : memref, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return @@ -27,7 +27,7 @@ func.func @transfer_read_2d_transposed(%A : memref, %base1: index, %bas {permutation_map = affine_map<(d0, d1) -> (d1, d0)>, in_bounds=[true, true]} : memref, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0 : vector<[4]x[4]xf32> return @@ -42,7 +42,7 @@ func.func @transfer_read_2d_mask(%A : memref, %base1: index, %base2: in %0 = vector.transfer_read %A[%base1, %base2], %pad, %mask {in_bounds = [true, true]} : memref, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return @@ -58,7 +58,7 @@ func.func @transfer_read_2d_mask_transposed(%A : memref, %base1: index, {permutation_map = affine_map<(d0, d1) -> (d1, d0)>, in_bounds=[true, true]} : memref, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return @@ -73,7 +73,7 @@ func.func @transfer_read_2d_mask_non_zero_pad(%A : memref, %base1: inde %0 = vector.transfer_read %A[%base1, %base2], %pad, %mask {in_bounds = [true, true]} : memref, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return @@ -89,7 +89,7 @@ func.func @transfer_read_2d_mask_non_zero_pad_transposed(%A : memref, % {permutation_map = affine_map<(d0, d1) -> (d1, d0)>, in_bounds=[true, true]} : memref, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir index 710cc6672f0057..2fef705861f28e 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transfer-write-2d.mlir @@ -51,7 +51,7 @@ func.func @transfer_write_2d_mask_transposed(%A : memref, %base1: index func.func @load_and_print(%A : memref, %base1: index, %base2: index) { %0 = vector.load %A[%base1, %base2] : memref, vector<[4]x[4]xf32> - vector.print str "TILE BEGIN:" + vector.print str "TILE BEGIN:\n" vector.print %0: vector<[4]x[4]xf32> return diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir index 88bc0d0709d489..177c96f1d8aae6 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-transpose.mlir @@ -51,9 +51,9 @@ func.func @entry() { // CHECK-NEXT: ( 2, 2, 2, 2 // CHECK-NEXT: ( 3, 3, 3, 3 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xi32> - vector.print str "TILE END" + vector.print str "TILE END\n" // Dump the transposed tile. The smallest SVL is 128-bits so the tile will be // at least 4x4xi32. @@ -64,9 +64,9 @@ func.func @entry() { // CHECK-NEXT: ( 0, 1, 2, 3 // CHECK-NEXT: ( 0, 1, 2, 3 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %transposed_tile : vector<[4]x[4]xi32> - vector.print str "TILE END" + vector.print str "TILE END\n" return } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir index e14917486d845d..3d74508cd23b57 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir @@ -23,9 +23,9 @@ func.func @entry() -> i32 { // CHECK-NEXT: ( 123, 123, 123, 123 // CHECK-NEXT: ( 123, 123, 123, 123 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" vector.print %tile : vector<[4]x[4]xi32> - vector.print str "TILE END" + vector.print str "TILE END\n" %c0_i32 = arith.constant 0 : i32 return %c0_i32 : i32 diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir index b29790db14ddc4..48080fd0a26a2b 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir @@ -255,7 +255,7 @@ func.func @load_store_two_za_s_tiles() -> i32 { // CHECK-NEXT: ( 1, 1, 1, 1 // CHECK-NEXT: ( 1, 1, 1, 1 // CHECK: TILE END - vector.print str "TILE BEGIN" + vector.print str "TILE BEGIN\n" scf.for %i = %c0 to %size_of_two_tiles step %svl_s { %av = vector.load %mem2[%i] : memref, vector<[4]xi32> vector.print %av : vector<[4]xi32> @@ -263,11 +263,11 @@ func.func @load_store_two_za_s_tiles() -> i32 { %tileSizeMinusStep = arith.subi %size_of_tile, %svl_s : index %isNextTile = arith.cmpi eq, %i, %tileSizeMinusStep : index scf.if %isNextTile { - vector.print str "TILE END" - vector.print str "TILE BEGIN" + vector.print str "TILE END\n" + vector.print str "TILE BEGIN\n" } } - vector.print str "TILE END" + vector.print str "TILE END\n" return %c0_i32 : i32 } diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/arrays-of-scalable-vectors.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/arrays-of-scalable-vectors.mlir index c486bf0de5d352..afb23e8e520660 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/arrays-of-scalable-vectors.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/arrays-of-scalable-vectors.mlir @@ -24,7 +24,7 @@ func.func @read_and_print_2d_vector(%memref: memref<3x?xf32>) { /// Print each of the vectors. /// vscale is >= 1, so at least 8 elements will be printed. - vector.print str "read_and_print_2d_vector()" + vector.print str "read_and_print_2d_vector()\n" // CHECK-LABEL: read_and_print_2d_vector() // CHECK: ( 8, 8, 8, 8, 8, 8, 8, 8 vector.print %row0 : vector<[8]xf32> @@ -62,21 +62,21 @@ func.func @add_arrays_of_scalable_vectors(%a: memref<1x2x?xf32>, %b: memref<1x2x // CHECK-LABEL: Vector A // CHECK-NEXT: ( 5, 5, 5, 5 // CHECK-NEXT: ( 5, 5, 5, 5 - vector.print str "\nVector A" + vector.print str "\nVector A\n" %vector_a = vector.transfer_read %a[%c0, %c0, %c0], %cst, %mask_a {in_bounds = [true, true, true]} : memref<1x2x?xf32>, vector<1x2x[4]xf32> func.call @print_1x2xVSCALExf32(%vector_a) : (vector<1x2x[4]xf32>) -> () // CHECK-LABEL: Vector B // CHECK-NEXT: ( 4, 4, 4, 4 // CHECK-NEXT: ( 4, 4, 4, 4 - vector.print str "\nVector B" + vector.print str "\nVector B\n" %vector_b = vector.transfer_read %b[%c0, %c0, %c0], %cst, %mask_b {in_bounds = [true, true, true]} : memref<1x2x?xf32>, vector<1x2x[4]xf32> func.call @print_1x2xVSCALExf32(%vector_b) : (vector<1x2x[4]xf32>) -> () // CHECK-LABEL: Sum // CHECK-NEXT: ( 9, 9, 9, 9 // CHECK-NEXT: ( 9, 9, 9, 9 - vector.print str "\nSum" + vector.print str "\nSum\n" %sum = arith.addf %vector_a, %vector_b : vector<1x2x[4]xf32> func.call @print_1x2xVSCALExf32(%sum) : (vector<1x2x[4]xf32>) -> () @@ -97,7 +97,7 @@ func.func @entry() { linalg.fill ins(%f32_8 : f32) outs(%test_1_memref :memref<3x?xf32>) - vector.print str "=> Print and read 2D arrays of scalable vectors:" + vector.print str "=> Print and read 2D arrays of scalable vectors:\n" func.call @read_and_print_2d_vector(%test_1_memref) : (memref<3x?xf32>) -> () vector.print str "\n====================\n" @@ -109,7 +109,7 @@ func.func @entry() { linalg.fill ins(%f32_5 : f32) outs(%test_2_memref_a :memref<1x2x?xf32>) linalg.fill ins(%f32_4 : f32) outs(%test_2_memref_b :memref<1x2x?xf32>) - vector.print str "=> Reading and adding two 3D arrays of scalable vectors:" + vector.print str "=> Reading and adding two 3D arrays of scalable vectors:\n" func.call @add_arrays_of_scalable_vectors( %test_2_memref_a, %test_2_memref_b) : (memref<1x2x?xf32>, memref<1x2x?xf32>) -> () diff --git a/mlir/test/Integration/Dialect/Vector/CPU/test-print-str.mlir b/mlir/test/Integration/Dialect/Vector/CPU/test-print-str.mlir index 78d6609ccaf9a9..25a44f22c2dc0b 100644 --- a/mlir/test/Integration/Dialect/Vector/CPU/test-print-str.mlir +++ b/mlir/test/Integration/Dialect/Vector/CPU/test-print-str.mlir @@ -7,8 +7,8 @@ func.func @entry() { // CHECK: Hello, World! - vector.print str "Hello, World!" + vector.print str "Hello, World!\n" // CHECK-NEXT: Bye! - vector.print str "Bye!" + vector.print str "Bye!\n" return }