diff --git a/llvm/test/CodeGen/Hexagon/convert-to-dot-old.ll b/llvm/test/CodeGen/Hexagon/convert-to-dot-old.ll index f1c398d3a7add..d6c7bd787cfdc 100644 --- a/llvm/test/CodeGen/Hexagon/convert-to-dot-old.ll +++ b/llvm/test/CodeGen/Hexagon/convert-to-dot-old.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv55 -filetype=obj -o /dev/null +; RUN: llc -mtriple=hexagon -mcpu=hexagonv55 -filetype=obj -o /dev/null ; REQUIRES: asserts ; There should be no output (nothing on stderr). diff --git a/llvm/test/CodeGen/Lanai/codemodel.ll b/llvm/test/CodeGen/Lanai/codemodel.ll index 72d1d65daf52d..205f08d4d1478 100644 --- a/llvm/test/CodeGen/Lanai/codemodel.ll +++ b/llvm/test/CodeGen/Lanai/codemodel.ll @@ -1,7 +1,7 @@ -; RUN: llc -march=lanai < %s | FileCheck %s -; RUN: llc -march=lanai < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s -; RUN: not llc -march=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s -; RUN: not llc -march=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s +; RUN: llc -mtriple=lanai < %s | FileCheck %s +; RUN: llc -mtriple=lanai < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s +; RUN: not llc -mtriple=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s +; RUN: not llc -mtriple=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s ; CHECK-TINY: Target does not support the tiny CodeModel ; CHECK-KERNEL: Target does not support the kernel CodeModel diff --git a/llvm/test/CodeGen/Lanai/mem_alu_combiner.ll b/llvm/test/CodeGen/Lanai/mem_alu_combiner.ll index 4e6e77361444b..2dbe1268958d4 100644 --- a/llvm/test/CodeGen/Lanai/mem_alu_combiner.ll +++ b/llvm/test/CodeGen/Lanai/mem_alu_combiner.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=lanai | FileCheck %s -; RUN: llc < %s -march=lanai -disable-lanai-mem-alu-combiner | \ +; RUN: llc < %s -mtriple=lanai | FileCheck %s +; RUN: llc < %s -mtriple=lanai -disable-lanai-mem-alu-combiner | \ ; RUN: FileCheck %s -check-prefix=CHECK-DIS ; CHECK-LABEL: sum, diff --git a/llvm/test/CodeGen/Lanai/multiply.ll b/llvm/test/CodeGen/Lanai/multiply.ll index c92a06c3f0170..dd6e70f28636b 100644 --- a/llvm/test/CodeGen/Lanai/multiply.ll +++ b/llvm/test/CodeGen/Lanai/multiply.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=lanai < %s | FileCheck %s +; RUN: llc -mtriple=lanai < %s | FileCheck %s ; Test the in place lowering of mul i32. diff --git a/llvm/test/CodeGen/Lanai/shift.ll b/llvm/test/CodeGen/Lanai/shift.ll index df5f91122ed8b..5bf2d63d07b1e 100644 --- a/llvm/test/CodeGen/Lanai/shift.ll +++ b/llvm/test/CodeGen/Lanai/shift.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=lanai | FileCheck %s +; RUN: llc < %s -mtriple=lanai | FileCheck %s ; Test lowering of shifts. diff --git a/llvm/test/CodeGen/Mips/eh.ll b/llvm/test/CodeGen/Mips/eh.ll index 217059b477313..01a7e1fbacfed 100644 --- a/llvm/test/CodeGen/Mips/eh.ll +++ b/llvm/test/CodeGen/Mips/eh.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-EL -; RUN: llc < %s -march=mips | FileCheck %s -check-prefix=CHECK-EB +; RUN: llc < %s -mtriple=mipsel | FileCheck %s -check-prefix=CHECK-EL +; RUN: llc < %s -mtriple=mips | FileCheck %s -check-prefix=CHECK-EB @g1 = global double 0.000000e+00, align 8 @_ZTId = external constant ptr diff --git a/llvm/test/CodeGen/Mips/insn-zero-size-bb.ll b/llvm/test/CodeGen/Mips/insn-zero-size-bb.ll index d5d3ac3e1951a..a5c16f8c45322 100644 --- a/llvm/test/CodeGen/Mips/insn-zero-size-bb.ll +++ b/llvm/test/CodeGen/Mips/insn-zero-size-bb.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s -; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s -; RUN: llc < %s -march=mips -mattr=mips16 | FileCheck %s +; RUN: llc < %s -mtriple=mips -mcpu=mips32 | FileCheck %s +; RUN: llc < %s -mtriple=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s +; RUN: llc < %s -mtriple=mips -mattr=mips16 | FileCheck %s ; Verify that we emit the .insn directive for zero-sized (empty) basic blocks. ; This only really matters for microMIPS and MIPS16. diff --git a/llvm/test/CodeGen/Mips/lw16-base-reg.ll b/llvm/test/CodeGen/Mips/lw16-base-reg.ll index f43e02e8d0616..c236b9a24b85f 100644 --- a/llvm/test/CodeGen/Mips/lw16-base-reg.ll +++ b/llvm/test/CodeGen/Mips/lw16-base-reg.ll @@ -1,4 +1,4 @@ -; RUN: llc %s -march=mips -mcpu=mips32r3 -mattr=micromips -filetype=asm \ +; RUN: llc %s -mtriple=mips -mcpu=mips32r3 -mattr=micromips -filetype=asm \ ; RUN: -relocation-model=pic -O3 -o - | FileCheck %s ; The purpose of this test is to check whether the CodeGen selects diff --git a/llvm/test/CodeGen/Mips/mips16ex.ll b/llvm/test/CodeGen/Mips/mips16ex.ll index 609f53bae6492..7dbccc7b223bd 100644 --- a/llvm/test/CodeGen/Mips/mips16ex.ll +++ b/llvm/test/CodeGen/Mips/mips16ex.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 +; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 ;16: main: ;16-NEXT: [[TMP:.*]]: diff --git a/llvm/test/CodeGen/RISCV/dwarf-eh.ll b/llvm/test/CodeGen/RISCV/dwarf-eh.ll index 2117c0cbd390f..39cc0d52c9fe1 100644 --- a/llvm/test/CodeGen/RISCV/dwarf-eh.ll +++ b/llvm/test/CodeGen/RISCV/dwarf-eh.ll @@ -1,18 +1,18 @@ -; RUN: llc -march=riscv32 --code-model=small < %s \ +; RUN: llc -mtriple=riscv32 --code-model=small < %s \ ; RUN: | FileCheck %s -; RUN: llc -march=riscv32 --code-model=medium < %s \ +; RUN: llc -mtriple=riscv32 --code-model=medium < %s \ ; RUN: | FileCheck %s -; RUN: llc -march=riscv32 --code-model=small -relocation-model=pic < %s \ +; RUN: llc -mtriple=riscv32 --code-model=small -relocation-model=pic < %s \ ; RUN: | FileCheck %s -; RUN: llc -march=riscv32 --code-model=medium -relocation-model=pic < %s \ +; RUN: llc -mtriple=riscv32 --code-model=medium -relocation-model=pic < %s \ ; RUN: | FileCheck %s -; RUN: llc -march=riscv64 --code-model=small < %s \ +; RUN: llc -mtriple=riscv64 --code-model=small < %s \ ; RUN: | FileCheck %s -; RUN: llc -march=riscv64 --code-model=medium < %s \ +; RUN: llc -mtriple=riscv64 --code-model=medium < %s \ ; RUN: | FileCheck %s -; RUN: llc -march=riscv64 --code-model=small -relocation-model=pic < %s \ +; RUN: llc -mtriple=riscv64 --code-model=small -relocation-model=pic < %s \ ; RUN: | FileCheck %s -; RUN: llc -march=riscv64 --code-model=medium -relocation-model=pic < %s \ +; RUN: llc -mtriple=riscv64 --code-model=medium -relocation-model=pic < %s \ ; RUN: | FileCheck %s declare void @throw_exception() diff --git a/llvm/test/MC/Hexagon/inst_add.ll b/llvm/test/MC/Hexagon/inst_add.ll index 826776952e050..3e8e3fb98c27c 100644 --- a/llvm/test/MC/Hexagon/inst_add.ll +++ b/llvm/test/MC/Hexagon/inst_add.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: llc -mtriple=hexagon -filetype=obj %s -o - \ ; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i32 %a, i32 %b) diff --git a/llvm/test/MC/Hexagon/inst_select.ll b/llvm/test/MC/Hexagon/inst_select.ll index e7a8a32e89cbf..1f5b8238f2d1b 100644 --- a/llvm/test/MC/Hexagon/inst_select.ll +++ b/llvm/test/MC/Hexagon/inst_select.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: llc -mtriple=hexagon -filetype=obj %s -o - \ ; RUN: | llvm-objdump --no-print-imm-hex -d - | FileCheck %s define i32 @foo (i1 %a, i32 %b, i32 %c) diff --git a/llvm/test/MC/Hexagon/inst_sxtb.ll b/llvm/test/MC/Hexagon/inst_sxtb.ll index 34219c72c99ee..df4b5bcfa5937 100644 --- a/llvm/test/MC/Hexagon/inst_sxtb.ll +++ b/llvm/test/MC/Hexagon/inst_sxtb.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: llc -mtriple=hexagon -filetype=obj %s -o - \ ; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i8 %a) diff --git a/llvm/test/MC/Hexagon/inst_zxtb.ll b/llvm/test/MC/Hexagon/inst_zxtb.ll index 86da5e52cac1d..b74fc2207088b 100644 --- a/llvm/test/MC/Hexagon/inst_zxtb.ll +++ b/llvm/test/MC/Hexagon/inst_zxtb.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: llc -mtriple=hexagon -filetype=obj %s -o - \ ; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i8 %a) diff --git a/llvm/test/MC/Hexagon/inst_zxth.ll b/llvm/test/MC/Hexagon/inst_zxth.ll index 7b3d1b30648c1..90bbed7044ee2 100644 --- a/llvm/test/MC/Hexagon/inst_zxth.ll +++ b/llvm/test/MC/Hexagon/inst_zxth.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: llc -mtriple=hexagon -filetype=obj %s -o - \ ; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i16 %a) diff --git a/llvm/test/MC/Hexagon/v62a.s b/llvm/test/MC/Hexagon/v62a.s index 968608c1c8b72..206f7777046a0 100644 --- a/llvm/test/MC/Hexagon/v62a.s +++ b/llvm/test/MC/Hexagon/v62a.s @@ -1,4 +1,4 @@ -# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv62 -filetype=obj -o - %s | llvm-objdump --triple=hexagon --triple=hexagon --mcpu=hexagonv62 -d - | FileCheck %s +# RUN: llvm-mc -triple=hexagon -mcpu=hexagonv62 -filetype=obj -o - %s | llvm-objdump --triple=hexagon --triple=hexagon --mcpu=hexagonv62 -d - | FileCheck %s r31:30=vabsdiffb(r29:28, r27:26) # CHECK: e8fadc1e { r31:30 = vabsdiffb(r29:28,r27:26) diff --git a/llvm/test/MC/Mips/mips64shift.ll b/llvm/test/MC/Mips/mips64shift.ll index 288e4460d0235..0d8cdad9c5c13 100644 --- a/llvm/test/MC/Mips/mips64shift.ll +++ b/llvm/test/MC/Mips/mips64shift.ll @@ -1,7 +1,7 @@ -; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - \ +; RUN: llc -mtriple=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - \ ; RUN: | llvm-objdump --no-print-imm-hex -d - | FileCheck %s -; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \ +; RUN: llc -mtriple=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \ ; RUN: | llvm-objdump --no-print-imm-hex -d - | FileCheck %s define i64 @f3(i64 %a0) nounwind readnone { diff --git a/llvm/test/MC/Mips/multi-64bit-func.ll b/llvm/test/MC/Mips/multi-64bit-func.ll index 83577aa1628bd..909399dcdb40c 100644 --- a/llvm/test/MC/Mips/multi-64bit-func.ll +++ b/llvm/test/MC/Mips/multi-64bit-func.ll @@ -1,8 +1,8 @@ ; There is no real check here. If the test doesn't ; assert it passes. -; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler < %s +; RUN: llc -mtriple=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler < %s ; Run it again without extra nop in delay slot -; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 < %s +; RUN: llc -mtriple=mips64el -filetype=obj -mcpu=mips64r2 < %s define i32 @bosco1(i32 %x) nounwind readnone { entry: diff --git a/llvm/test/MC/Mips/sext_64_32.ll b/llvm/test/MC/Mips/sext_64_32.ll index ee80b5fa1ae7c..4f1f739c207a9 100644 --- a/llvm/test/MC/Mips/sext_64_32.ll +++ b/llvm/test/MC/Mips/sext_64_32.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - | \ +; RUN: llc -mtriple=mips64el -filetype=obj -mcpu=mips64r2 %s -o - | \ ; RUN: llvm-objdump --no-print-imm-hex -d - | FileCheck %s ; Sign extend from 32 to 64 was creating nonsense opcodes diff --git a/llvm/test/MC/Mips/sort-relocation-table.s b/llvm/test/MC/Mips/sort-relocation-table.s index a6068ed76fc6d..cc951956fd24a 100644 --- a/llvm/test/MC/Mips/sort-relocation-table.s +++ b/llvm/test/MC/Mips/sort-relocation-table.s @@ -1,4 +1,4 @@ -# RUN: llvm-mc -filetype=obj -arch mipsel %s | llvm-readobj -r - | FileCheck %s +# RUN: llvm-mc -filetype=obj -triple=mipsel %s | llvm-readobj -r - | FileCheck %s # Test the order of records in the relocation table. #