-
Notifications
You must be signed in to change notification settings - Fork 1
/
Copy pathMapper_1.c
275 lines (240 loc) · 9.4 KB
/
Mapper_1.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
#include "Mapper_1.h"
/*===================================================================*/
/* */
/* Mapper 1 */
/* */
/*===================================================================*/
uint32 Mapper_1_write_count;
uint8 Mapper_1_bits;
uint8 Mapper_1_regs[4];
uint32 Mapper_1_last_write_addr;
enum MMC1_Size {
MMC1_SMALL,
MMC1_512K,
MMC1_1024K
} Mapper_1_Size;
uint32 Mapper_1_256K_base;
uint32 Mapper_1_swap;
// these are the 4 ROM banks currently selected
uint32 Mapper_1_bank1;
uint32 Mapper_1_bank2;
uint32 Mapper_1_bank3;
uint32 Mapper_1_bank4;
uint32 Mapper_1_HI1;
uint32 Mapper_1_HI2;
void Mapper_1_Set_CPU_Banks() {
ROMBANK0 = ROMPAGE((Mapper_1_256K_base << 5) + (Mapper_1_bank1 & ((256/8)-1)));
ROMBANK1 = ROMPAGE((Mapper_1_256K_base << 5) + (Mapper_1_bank2 & ((256/8)-1)));
ROMBANK2 = ROMPAGE((Mapper_1_256K_base << 5) + (Mapper_1_bank3 & ((256/8)-1)));
ROMBANK3 = ROMPAGE((Mapper_1_256K_base << 5) + (Mapper_1_bank4 & ((256/8)-1)));
}
/*-------------------------------------------------------------------*/
/* Initialize Mapper 1 */
/*-------------------------------------------------------------------*/
void Mapper_1_Init() {
Mapper_1_write_count = 0;
Mapper_1_bits = 0x00;
Mapper_1_regs[0] = 0x0C; // reflects initial ROM state
Mapper_1_regs[1] = 0x00;
Mapper_1_regs[2] = 0x00;
Mapper_1_regs[3] = 0x00;
uint32 num_8k_ROM_banks = NesHeader.byRomSize * 2;
uint32 size_in_K = num_8k_ROM_banks * 8;
if (size_in_K == 1024) {
Mapper_1_Size = MMC1_1024K;
} else if(size_in_K == 512) {
Mapper_1_Size = MMC1_512K;
} else {
Mapper_1_Size = MMC1_SMALL;
}
Mapper_1_256K_base = 0; // use first 256K
Mapper_1_swap = 0;
if (Mapper_1_Size == MMC1_SMALL) {
// set two high pages to last two banks
Mapper_1_HI1 = num_8k_ROM_banks - 2;
Mapper_1_HI2 = num_8k_ROM_banks - 1;
} else {
// set two high pages to last two banks of current 256K region
Mapper_1_HI1 = (256/8) - 2;
Mapper_1_HI2 = (256/8) - 1;
}
// set CPU bank pointers
Mapper_1_bank1 = 0;
Mapper_1_bank2 = 1;
Mapper_1_bank3 = Mapper_1_HI1;
Mapper_1_bank4 = Mapper_1_HI2;
Mapper_1_Set_CPU_Banks();
/* Set PPU VROM Banks */
if ( NesHeader.byVRomSize > 0 ) {
for ( int nPage = 0; nPage < 8; ++nPage )
PPUBANK[ nPage ] = &VROM[ nPage * 0x400 ];
}
/* Set up wiring of the interrupt pin */
K6502_Set_Int_Wiring( 1, 1 );
}
/*-------------------------------------------------------------------*/
/* Mapper 1 Write Function */
/*-------------------------------------------------------------------*/
void Mapper_1_Write( uint16 wAddr, unsigned char byData ) {
uint32 reg_num;
// if write is to a different reg, reset
if ((wAddr & 0x6000) != (Mapper_1_last_write_addr & 0x6000)) {
Mapper_1_write_count = 0;
Mapper_1_bits = 0x00;
}
Mapper_1_last_write_addr = wAddr;
// if bit 7 set, reset and return
if (byData & 0x80) {
Mapper_1_write_count = 0;
Mapper_1_bits = 0x00;
return;
}
Mapper_1_bits |= (byData & 0x01) << Mapper_1_write_count;
if (++Mapper_1_write_count < 5) return;
reg_num = (wAddr & 0x7FFF) >> 13;
Mapper_1_regs[reg_num] = Mapper_1_bits;
Mapper_1_write_count = 0;
Mapper_1_bits = 0x00;
switch(reg_num) {
case 0: {
// set mirroring
if (Mapper_1_regs[0] & 0x02) {
if (Mapper_1_regs[0] & 0x01) {
pNesX_Mirroring(MIRRORING_HORIZONTAL);
} else {
pNesX_Mirroring(MIRRORING_VERTICAL);
}
} else {
// one-screen mirroring
if (Mapper_1_regs[0] & 0x01) {
pNesX_Mirroring(MIRRORING_SINGLE_SCREEN_HIGH);
} else {
pNesX_Mirroring(MIRRORING_SINGLE_SCREEN_LOW);
}
}
} break;
case 1: {
uint8 bank_num = Mapper_1_regs[1];
uint32 num_1k_VROM_banks = NesHeader.byVRomSize * 8;
if (Mapper_1_Size == MMC1_1024K) {
if (Mapper_1_regs[0] & 0x10) {
if (Mapper_1_swap) {
Mapper_1_256K_base = (Mapper_1_regs[1] & 0x10) >> 4;
if (Mapper_1_regs[0] & 0x08) {
Mapper_1_256K_base |= ((Mapper_1_regs[2] & 0x10) >> 3);
}
Mapper_1_Set_CPU_Banks();
Mapper_1_swap = 0;
} else {
Mapper_1_swap = 1;
}
} else {
// use 1st or 4th 256K banks
Mapper_1_256K_base = (Mapper_1_regs[1] & 0x10) ? 3 : 0;
Mapper_1_Set_CPU_Banks();
}
} else if((Mapper_1_Size == MMC1_512K) && (!num_1k_VROM_banks)) {
Mapper_1_256K_base = (Mapper_1_regs[1] & 0x10) >> 4;
Mapper_1_Set_CPU_Banks();
} else if (num_1k_VROM_banks) {
// set VROM bank at $0000
if (Mapper_1_regs[0] & 0x10) {
// swap 4K
bank_num <<= 2;
PPUBANK[0] = &VROM[bank_num * 0x400];
PPUBANK[1] = &VROM[(bank_num + 1) * 0x400];
PPUBANK[2] = &VROM[(bank_num + 2) * 0x400];
PPUBANK[3] = &VROM[(bank_num + 3) * 0x400];
} else {
// swap 8K
bank_num <<= 2;
PPUBANK[0] = &VROM[bank_num * 0x400];
PPUBANK[1] = &VROM[(bank_num + 1) * 0x400];
PPUBANK[2] = &VROM[(bank_num + 2) * 0x400];
PPUBANK[3] = &VROM[(bank_num + 3) * 0x400];
PPUBANK[4] = &VROM[(bank_num + 4) * 0x400];
PPUBANK[5] = &VROM[(bank_num + 5) * 0x400];
PPUBANK[6] = &VROM[(bank_num + 6) * 0x400];
PPUBANK[7] = &VROM[(bank_num + 7) * 0x400];
}
} else {
if (Mapper_1_regs[0] & 0x10) {
bank_num <<= 2;
/* // TODO: How to handle VRAM ...
set_VRAM_bank0(0, bank_num+0);
set_VRAM_bank0(1, bank_num+1);
set_VRAM_bank0(2, bank_num+2);
set_VRAM_bank0(3, bank_num+3);
*/
}
}
} break;
case 2: {
uint8 bank_num = Mapper_1_regs[2];
uint32 num_1k_VROM_banks = NesHeader.byVRomSize * 8;
if ((Mapper_1_Size == MMC1_1024K) && (Mapper_1_regs[0] & 0x08)) {
if (Mapper_1_swap) {
Mapper_1_256K_base = (Mapper_1_regs[1] & 0x10) >> 4;
Mapper_1_256K_base |= ((Mapper_1_regs[2] & 0x10) >> 3);
Mapper_1_Set_CPU_Banks();
Mapper_1_swap = 0;
} else {
Mapper_1_swap = 1;
}
}
if (!num_1k_VROM_banks) {
if (Mapper_1_regs[0] & 0x10) {
bank_num <<= 2;
/* // TODO: How to handle VRAM ...
set_VRAM_bank0(4, bank_num+0);
set_VRAM_bank0(5, bank_num+1);
set_VRAM_bank0(6, bank_num+2);
set_VRAM_bank0(7, bank_num+3);
*/
break;
}
}
// set 4K VROM bank at $1000
if (Mapper_1_regs[0] & 0x10) {
// swap 4K
bank_num <<= 2;
PPUBANK[4] = &VROM[bank_num * 0x400];
PPUBANK[5] = &VROM[(bank_num + 1) * 0x400];
PPUBANK[6] = &VROM[(bank_num + 2) * 0x400];
PPUBANK[7] = &VROM[(bank_num + 3) * 0x400];
}
} break;
case 3: {
uint8 bank_num = Mapper_1_regs[3];
if (Mapper_1_regs[0] & 0x08) {
// 16K of ROM
bank_num <<= 1;
if (Mapper_1_regs[0] & 0x04) {
// 16K of ROM at $8000
Mapper_1_bank1 = bank_num;
Mapper_1_bank2 = bank_num+1;
Mapper_1_bank3 = Mapper_1_HI1;
Mapper_1_bank4 = Mapper_1_HI2;
} else {
// 16K of ROM at $C000
if(Mapper_1_Size == MMC1_SMALL) {
Mapper_1_bank1 = 0;
Mapper_1_bank2 = 1;
Mapper_1_bank3 = bank_num;
Mapper_1_bank4 = bank_num+1;
}
}
} else {
// 32K of ROM at $8000
bank_num <<= 1;
Mapper_1_bank1 = bank_num;
Mapper_1_bank2 = bank_num+1;
if (Mapper_1_Size == MMC1_SMALL) {
Mapper_1_bank3 = bank_num+2;
Mapper_1_bank4 = bank_num+3;
}
}
Mapper_1_Set_CPU_Banks();
} break;
}
}