diff --git a/examples/ccm-demo/Embed.toml b/examples/ccm-demo/Embed.toml index d64fb342..f0ac4fb9 100644 --- a/examples/ccm-demo/Embed.toml +++ b/examples/ccm-demo/Embed.toml @@ -19,7 +19,7 @@ restore_unwritten_bytes = false [general] # The chip name of the chip to be debugged. -chip = "nRF52832" +#chip = "nRF52832" # A list of chip descriptions to be loaded during runtime. chip_descriptions = [] # The default log level to be used. diff --git a/examples/ccm-demo/src/main.rs b/examples/ccm-demo/src/main.rs index 86bae00c..7759de64 100644 --- a/examples/ccm-demo/src/main.rs +++ b/examples/ccm-demo/src/main.rs @@ -53,7 +53,7 @@ fn main() -> ! { let mut ccm_data_enc = CcmData::new(KEY, iv); let mut ccm_data_dec = CcmData::new(KEY, iv); - let mut ccm = Ccm::init(p.CCM, p.AAR, DataRate::_1Mbit); + let mut ccm = Ccm::init(p.CCM, p.AAR, DataRate::_2Mbit); let mut clear_buffer = [0u8; 254]; let mut cipher_buffer = [0u8; 258]; @@ -87,16 +87,6 @@ fn main() -> ! { rprintln!("Encryption Took: {} us", now); - //rprint!("Cipher Packet: "); - //for number in cipher_buffer.iter().take(length + MIC_SIZE + HEADER_SIZE) { - // rprint!("{:x} ", *number); - //} - - // Since we're both encrypting and decrypting, we need to decrement the counter to have the - // same counter that encrypted the message. `encrypt_packet` and `decrypt_packet` - // automatically increments the counter when the operation succeeds. - //ccm_data.decrement_counter(); - // Clears the buffer, so we can inspect the decrypted text clear_buffer = [0u8; 254]; @@ -122,9 +112,6 @@ fn main() -> ! { &MSG[..length] ); - //let msg = core::str::from_utf8(&clear_buffer[HEADER_SIZE..length]).unwrap(); - //rprintln!("Clear text: {}\n", msg); - // Clears the cipher text for next round cipher_buffer = [0u8; 258]; } diff --git a/nrf-hal-common/src/ccm.rs b/nrf-hal-common/src/ccm.rs index a1681465..30369c95 100644 --- a/nrf-hal-common/src/ccm.rs +++ b/nrf-hal-common/src/ccm.rs @@ -179,7 +179,6 @@ impl Ccm { // This register is shared with AAR, reset it and write the chosen data rate regs.mode.write(|w| w.datarate().variant(data_rate.into())); - regs.shorts.write(|w| w.endksgen_crypt().enabled()); regs.enable.write(|w| w.enable().enabled()); Self { regs, _aar: arr } @@ -190,7 +189,7 @@ impl Ccm { /// The generated MIC will be appended to after the payload in the `cipher_packet`. The slices /// passed to this method must have the correct size, for more information refer to the module /// level documentation. The counter in `ccm_data` will be incremented if the operation - /// succeeds. + /// succeeds. All parameters passed to this method must reside in RAM. pub fn encrypt_packet( &mut self, ccm_data: &mut CcmData, @@ -228,7 +227,7 @@ impl Ccm { let length_variant = if payload_len <= MAXIMUM_LENGTH_5BITS { LENGTH_A::DEFAULT } else { - #[cfg(any(feature = "52840", feature = "52833"))] + #[cfg(any(feature = "52840", feature = "52833", feature = "52810"))] // NOTE(unsafe) Any 8bits pattern is safe to write to this register self.regs .maxpacketsize @@ -267,11 +266,15 @@ impl Ccm { // "Preceding reads and writes cannot be moved past subsequent writes." compiler_fence(Ordering::Release); - // Start key generation, encryption will start automatically because of the enabled short - // in init + // Start key generation // NOTE(unsafe) 1 is a valid pattern to write to this register self.regs.tasks_ksgen.write(|w| unsafe { w.bits(1) }); + while self.regs.events_endksgen.read().bits() == 0 {} + + // NOTE(unsafe) 1 is a valid pattern to write to this register + self.regs.tasks_crypt.write(|w| unsafe { w.bits(1) }); + while self.regs.events_endcrypt.read().bits() == 0 && self.regs.events_error.read().bits() == 0 {} @@ -292,7 +295,8 @@ impl Ccm { /// /// This method will return an error if the MIC verification fails. The slices passed to this /// method must have the correct size, for more information refer to the module level - /// documentation. The counter in `ccm_data` will be incremented if the operation succeeds. + /// documentation. The counter in `ccm_data` will be incremented if the operation succeeds. All + /// parameters passed to this method must reside in RAM. pub fn decrypt_packet( &mut self, ccm_data: &mut CcmData, @@ -335,7 +339,7 @@ impl Ccm { let length_variant = if payload_len <= MAXIMUM_LENGTH_5BITS { LENGTH_A::DEFAULT } else { - #[cfg(any(feature = "52840", feature = "52833"))] + #[cfg(any(feature = "52840", feature = "52833", feature = "52810"))] // NOTE(unsafe) Any 8bits pattern is safe to write to this register self.regs .maxpacketsize @@ -374,11 +378,15 @@ impl Ccm { // "Preceding reads and writes cannot be moved past subsequent writes." compiler_fence(Ordering::Release); - // Start key generation, decryption will start automatically because of the enabled short - // in init + // Start key generation // NOTE(unsafe) 1 is a valid pattern to write to this register self.regs.tasks_ksgen.write(|w| unsafe { w.bits(1) }); + while self.regs.events_endksgen.read().bits() == 0 {} + + // NOTE(unsafe) 1 is a valid pattern to write to this register + self.regs.tasks_crypt.write(|w| unsafe { w.bits(1) }); + while self.regs.events_endcrypt.read().bits() == 0 && self.regs.events_error.read().bits() == 0 {}