diff --git a/nrf-hal-common/src/saadc.rs b/nrf-hal-common/src/saadc.rs index e650b180..505fa7e7 100644 --- a/nrf-hal-common/src/saadc.rs +++ b/nrf-hal-common/src/saadc.rs @@ -178,6 +178,8 @@ where 7 => self.0.ch[0].pselp.write(|w| w.pselp().analog_input7()), #[cfg(not(feature = "9160"))] 8 => self.0.ch[0].pselp.write(|w| w.pselp().vdd()), + #[cfg(any(feature = "52833", feature = "52840"))] + 13 => self.0.ch[0].pselp.write(|w| w.pselp().vddhdiv5()), // This can never happen the only analog pins have already been defined // PAY CLOSE ATTENTION TO ANY CHANGES TO THIS IMPL OR THE `channel_mappings!` MACRO _ => unsafe { unreachable_unchecked() }, @@ -265,3 +267,16 @@ impl Channel for InternalVdd { #[cfg(not(feature = "9160"))] /// Channel that doesn't sample a pin, but the internal VDD voltage. pub struct InternalVdd; + +#[cfg(any(feature = "52833", feature = "52840"))] +impl Channel for InternalVddHdiv5 { + type ID = u8; + + fn channel() -> >::ID { + 13 + } +} + +#[cfg(any(feature = "52833", feature = "52840"))] +/// The voltage on the VDDH pin, divided by 5. +pub struct InternalVddHdiv5;