diff --git a/machine/lenovo/lenovo_ne1032/u-boot/01-uboot-msg-cleanup.patch b/machine/lenovo/lenovo_ne1032/u-boot/01-uboot-msg-cleanup.patch
new file mode 100644
index 000000000..0d7cbdf7d
--- /dev/null
+++ b/machine/lenovo/lenovo_ne1032/u-boot/01-uboot-msg-cleanup.patch
@@ -0,0 +1,48 @@
+diff --git a/board/lenovo/lenovo_ne10x2/tlb.c b/board/lenovo/lenovo_ne10x2/tlb.c
+index 44f6aa3..939d20c 100644
+--- a/board/lenovo/lenovo_ne10x2/tlb.c
++++ b/board/lenovo/lenovo_ne10x2/tlb.c
+@@ -54,12 +54,12 @@ struct fsl_e_tlb_entry tlb_table[] = {
+ 
+ #ifndef CONFIG_SPL_BUILD
+ 	/* *I*G* - PCI */
+-	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
++	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_MEM_VIRT, CONFIG_SYS_PCIE2_MEM_PHYS,
+ 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 		      0, 3, BOOKE_PAGESZ_1G, 1),
+ 
+ 	/* *I*G* - PCI I/O */
+-	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
++	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_IO_VIRT, CONFIG_SYS_PCIE2_IO_PHYS,
+ 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 		      0, 4, BOOKE_PAGESZ_256K, 1),
+ 
+diff --git a/include/configs/lenovo_ne10x2.h b/include/configs/lenovo_ne10x2.h
+index 49d2ac8..e226299 100644
+--- a/include/configs/lenovo_ne10x2.h
++++ b/include/configs/lenovo_ne10x2.h
+@@ -38,10 +38,10 @@
+ #define CONFIG_FSL_IFC			/* Enable IFC Support */
+ #define CONFIG_PCI			/* Enable PCI/PCIE */
+ #define CONFIG_PCI_INDIRECT_BRIDGE
+-#define CONFIG_PCIE1			/* PCIE controler 1 */
++#undef  CONFIG_PCIE1			/* PCIE controler 1 */
+ #define CONFIG_PCIE2			/* PCIE controler 2 */
+-#define CONFIG_PCIE3			/* PCIE controler 3 */
+-#define CONFIG_PCIE4			/* PCIE controler 4 */
++#undef  CONFIG_PCIE3			/* PCIE controler 3 */
++#undef  CONFIG_PCIE4			/* PCIE controler 4 */
+ 
+ #define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
+ #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
+@@ -593,10 +593,6 @@
+ 	"bootargs=root=/dev/ram rw console=ttyS0,11520 quiet\0" \
+ 	"consoledev=ttyS0\0"					\
+ 	"ethaddr=00:11:22:33:44:00\0"  				\
+-	"eth1addr=00:11:22:33:44:11\0" 				\
+-	"eth2addr=00:11:22:33:44:22\0" 				\
+-	"eth3addr=00:11:22:33:44:33\0" 				\
+-	"eth4addr=00:11:22:33:44:44\0" 				\
+ 	"onie_start=0xefaa0000\0"      				\
+ 	"onie_sz.b=0x004a0000\0"
+ 
diff --git a/machine/lenovo/lenovo_ne1032/u-boot/series b/machine/lenovo/lenovo_ne1032/u-boot/series
index c906a17fd..e2cd1d739 100644
--- a/machine/lenovo/lenovo_ne1032/u-boot/series
+++ b/machine/lenovo/lenovo_ne1032/u-boot/series
@@ -1 +1,2 @@
 platform-lenovo-ne1032.patch
+01-uboot-msg-cleanup.patch
diff --git a/machine/lenovo/lenovo_ne1032t/u-boot/01-uboot-msg-cleanup.patch b/machine/lenovo/lenovo_ne1032t/u-boot/01-uboot-msg-cleanup.patch
new file mode 100644
index 000000000..0d7cbdf7d
--- /dev/null
+++ b/machine/lenovo/lenovo_ne1032t/u-boot/01-uboot-msg-cleanup.patch
@@ -0,0 +1,48 @@
+diff --git a/board/lenovo/lenovo_ne10x2/tlb.c b/board/lenovo/lenovo_ne10x2/tlb.c
+index 44f6aa3..939d20c 100644
+--- a/board/lenovo/lenovo_ne10x2/tlb.c
++++ b/board/lenovo/lenovo_ne10x2/tlb.c
+@@ -54,12 +54,12 @@ struct fsl_e_tlb_entry tlb_table[] = {
+ 
+ #ifndef CONFIG_SPL_BUILD
+ 	/* *I*G* - PCI */
+-	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
++	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_MEM_VIRT, CONFIG_SYS_PCIE2_MEM_PHYS,
+ 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 		      0, 3, BOOKE_PAGESZ_1G, 1),
+ 
+ 	/* *I*G* - PCI I/O */
+-	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
++	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_IO_VIRT, CONFIG_SYS_PCIE2_IO_PHYS,
+ 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 		      0, 4, BOOKE_PAGESZ_256K, 1),
+ 
+diff --git a/include/configs/lenovo_ne10x2.h b/include/configs/lenovo_ne10x2.h
+index 49d2ac8..e226299 100644
+--- a/include/configs/lenovo_ne10x2.h
++++ b/include/configs/lenovo_ne10x2.h
+@@ -38,10 +38,10 @@
+ #define CONFIG_FSL_IFC			/* Enable IFC Support */
+ #define CONFIG_PCI			/* Enable PCI/PCIE */
+ #define CONFIG_PCI_INDIRECT_BRIDGE
+-#define CONFIG_PCIE1			/* PCIE controler 1 */
++#undef  CONFIG_PCIE1			/* PCIE controler 1 */
+ #define CONFIG_PCIE2			/* PCIE controler 2 */
+-#define CONFIG_PCIE3			/* PCIE controler 3 */
+-#define CONFIG_PCIE4			/* PCIE controler 4 */
++#undef  CONFIG_PCIE3			/* PCIE controler 3 */
++#undef  CONFIG_PCIE4			/* PCIE controler 4 */
+ 
+ #define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
+ #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
+@@ -593,10 +593,6 @@
+ 	"bootargs=root=/dev/ram rw console=ttyS0,11520 quiet\0" \
+ 	"consoledev=ttyS0\0"					\
+ 	"ethaddr=00:11:22:33:44:00\0"  				\
+-	"eth1addr=00:11:22:33:44:11\0" 				\
+-	"eth2addr=00:11:22:33:44:22\0" 				\
+-	"eth3addr=00:11:22:33:44:33\0" 				\
+-	"eth4addr=00:11:22:33:44:44\0" 				\
+ 	"onie_start=0xefaa0000\0"      				\
+ 	"onie_sz.b=0x004a0000\0"
+ 
diff --git a/machine/lenovo/lenovo_ne1032t/u-boot/series b/machine/lenovo/lenovo_ne1032t/u-boot/series
index dc9cf9046..f81cf9e3c 100644
--- a/machine/lenovo/lenovo_ne1032t/u-boot/series
+++ b/machine/lenovo/lenovo_ne1032t/u-boot/series
@@ -1 +1,2 @@
 platform-lenovo-ne1032t.patch
+01-uboot-msg-cleanup.patch
diff --git a/machine/lenovo/lenovo_ne1072t/u-boot/01-uboot-msg-cleanup.patch b/machine/lenovo/lenovo_ne1072t/u-boot/01-uboot-msg-cleanup.patch
new file mode 100644
index 000000000..0d7cbdf7d
--- /dev/null
+++ b/machine/lenovo/lenovo_ne1072t/u-boot/01-uboot-msg-cleanup.patch
@@ -0,0 +1,48 @@
+diff --git a/board/lenovo/lenovo_ne10x2/tlb.c b/board/lenovo/lenovo_ne10x2/tlb.c
+index 44f6aa3..939d20c 100644
+--- a/board/lenovo/lenovo_ne10x2/tlb.c
++++ b/board/lenovo/lenovo_ne10x2/tlb.c
+@@ -54,12 +54,12 @@ struct fsl_e_tlb_entry tlb_table[] = {
+ 
+ #ifndef CONFIG_SPL_BUILD
+ 	/* *I*G* - PCI */
+-	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
++	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_MEM_VIRT, CONFIG_SYS_PCIE2_MEM_PHYS,
+ 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 		      0, 3, BOOKE_PAGESZ_1G, 1),
+ 
+ 	/* *I*G* - PCI I/O */
+-	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
++	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_IO_VIRT, CONFIG_SYS_PCIE2_IO_PHYS,
+ 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 		      0, 4, BOOKE_PAGESZ_256K, 1),
+ 
+diff --git a/include/configs/lenovo_ne10x2.h b/include/configs/lenovo_ne10x2.h
+index 49d2ac8..e226299 100644
+--- a/include/configs/lenovo_ne10x2.h
++++ b/include/configs/lenovo_ne10x2.h
+@@ -38,10 +38,10 @@
+ #define CONFIG_FSL_IFC			/* Enable IFC Support */
+ #define CONFIG_PCI			/* Enable PCI/PCIE */
+ #define CONFIG_PCI_INDIRECT_BRIDGE
+-#define CONFIG_PCIE1			/* PCIE controler 1 */
++#undef  CONFIG_PCIE1			/* PCIE controler 1 */
+ #define CONFIG_PCIE2			/* PCIE controler 2 */
+-#define CONFIG_PCIE3			/* PCIE controler 3 */
+-#define CONFIG_PCIE4			/* PCIE controler 4 */
++#undef  CONFIG_PCIE3			/* PCIE controler 3 */
++#undef  CONFIG_PCIE4			/* PCIE controler 4 */
+ 
+ #define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
+ #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
+@@ -593,10 +593,6 @@
+ 	"bootargs=root=/dev/ram rw console=ttyS0,11520 quiet\0" \
+ 	"consoledev=ttyS0\0"					\
+ 	"ethaddr=00:11:22:33:44:00\0"  				\
+-	"eth1addr=00:11:22:33:44:11\0" 				\
+-	"eth2addr=00:11:22:33:44:22\0" 				\
+-	"eth3addr=00:11:22:33:44:33\0" 				\
+-	"eth4addr=00:11:22:33:44:44\0" 				\
+ 	"onie_start=0xefaa0000\0"      				\
+ 	"onie_sz.b=0x004a0000\0"
+ 
diff --git a/machine/lenovo/lenovo_ne1072t/u-boot/series b/machine/lenovo/lenovo_ne1072t/u-boot/series
index c4f0507a7..35cc5ae1a 100644
--- a/machine/lenovo/lenovo_ne1072t/u-boot/series
+++ b/machine/lenovo/lenovo_ne1072t/u-boot/series
@@ -1 +1,2 @@
 platform-lenovo-ne1072t.patch
+01-uboot-msg-cleanup.patch