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I'm seeing about 4μs between peaks whatever I set SPI speed_hz to. I'm using a logical level shifter up to 5V and it would be lovely to be able to clock the bus down some as the shifter is having trouble keeping up.
Thanks for the advice the other day. Setting up an SPI-group worked fine.
The text was updated successfully, but these errors were encountered:
I'm seeing about 4μs between peaks whatever I set SPI speed_hz to. I'm using a logical level shifter up to 5V and it would be lovely to be able to clock the bus down some as the shifter is having trouble keeping up.
Thanks for the advice the other day. Setting up an SPI-group worked fine.
The text was updated successfully, but these errors were encountered: