From c6a3265f6cb0af28524fbd4d607d9f4d3f7f2634 Mon Sep 17 00:00:00 2001
From: Amanieu d'Antras <amanieu@gmail.com>
Date: Mon, 5 Apr 2021 14:28:45 +0100
Subject: [PATCH] Emit an error if trying to use Intel syntax asm! with an old
 LLVM

asm! with Intel syntax requires LLVM 10.0.1.
---
 compiler/rustc_codegen_llvm/src/asm.rs       | 14 ++++++++++++++
 compiler/rustc_codegen_ssa/src/mir/block.rs  |  8 +++++++-
 compiler/rustc_codegen_ssa/src/traits/asm.rs |  1 +
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/compiler/rustc_codegen_llvm/src/asm.rs b/compiler/rustc_codegen_llvm/src/asm.rs
index e7d359c4f149c..004f3fe9e900d 100644
--- a/compiler/rustc_codegen_llvm/src/asm.rs
+++ b/compiler/rustc_codegen_llvm/src/asm.rs
@@ -1,6 +1,7 @@
 use crate::builder::Builder;
 use crate::context::CodegenCx;
 use crate::llvm;
+use crate::llvm_util;
 use crate::type_::Type;
 use crate::type_of::LayoutLlvmExt;
 use crate::value::Value;
@@ -120,6 +121,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
         operands: &[InlineAsmOperandRef<'tcx, Self>],
         options: InlineAsmOptions,
         line_spans: &[Span],
+        span: Span,
     ) {
         let asm_arch = self.tcx.sess.asm_arch.unwrap();
 
@@ -281,6 +283,18 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
             InlineAsmArch::X86 | InlineAsmArch::X86_64
                 if !options.contains(InlineAsmOptions::ATT_SYNTAX) =>
             {
+                if llvm_util::get_version() < (10, 0, 1) {
+                    let mut err = self.sess().struct_span_err(
+                        span,
+                        "Intel syntax inline assembly requires LLVM 10.0.1 or later",
+                    );
+                    err.help("Consider using AT&T syntax instead with the att_syntax option");
+                    err.emit();
+
+                    // We still emit the LLVM IR, but that's fine since we stop
+                    // before reaching LLVM codegen which actually tries to
+                    // parse the asm constraint codes.
+                }
                 LlvmAsmDialect::Intel
             }
             _ => LlvmAsmDialect::Att,
diff --git a/compiler/rustc_codegen_ssa/src/mir/block.rs b/compiler/rustc_codegen_ssa/src/mir/block.rs
index 04225ddd36ffb..483d56668e7aa 100644
--- a/compiler/rustc_codegen_ssa/src/mir/block.rs
+++ b/compiler/rustc_codegen_ssa/src/mir/block.rs
@@ -879,7 +879,13 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
             })
             .collect();
 
-        bx.codegen_inline_asm(template, &operands, options, line_spans);
+        bx.codegen_inline_asm(
+            template,
+            &operands,
+            options,
+            line_spans,
+            terminator.source_info.span,
+        );
 
         if let Some(target) = destination {
             helper.funclet_br(self, &mut bx, target);
diff --git a/compiler/rustc_codegen_ssa/src/traits/asm.rs b/compiler/rustc_codegen_ssa/src/traits/asm.rs
index 69931935c4963..3ba4243598161 100644
--- a/compiler/rustc_codegen_ssa/src/traits/asm.rs
+++ b/compiler/rustc_codegen_ssa/src/traits/asm.rs
@@ -53,6 +53,7 @@ pub trait AsmBuilderMethods<'tcx>: BackendTypes {
         operands: &[InlineAsmOperandRef<'tcx, Self>],
         options: InlineAsmOptions,
         line_spans: &[Span],
+        span: Span,
     );
 }