From e72c8fd874829a1dc524c7e493b64a3f17b62634 Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Sat, 28 Oct 2017 18:46:03 +0200 Subject: [PATCH] [aarch64] refactor AArch64 intrinsics into its own architecture module --- src/aarch64/mod.rs | 17 +++++++++++++++++ src/{arm/v8_neon.rs => aarch64/neon.rs} | 0 src/{arm => aarch64}/v8.rs | 4 +--- src/arm/mod.rs | 20 +++++--------------- src/arm/{v7_neon.rs => neon.rs} | 0 src/lib.rs | 5 +++++ src/x86/avx2.rs | 19 ++++++++++++++----- stdsimd-test/src/lib.rs | 2 +- 8 files changed, 43 insertions(+), 24 deletions(-) create mode 100644 src/aarch64/mod.rs rename src/{arm/v8_neon.rs => aarch64/neon.rs} (100%) rename src/{arm => aarch64}/v8.rs (98%) rename src/arm/{v7_neon.rs => neon.rs} (100%) diff --git a/src/aarch64/mod.rs b/src/aarch64/mod.rs new file mode 100644 index 0000000000..f8e0fbd40c --- /dev/null +++ b/src/aarch64/mod.rs @@ -0,0 +1,17 @@ +//! AArch64 intrinsics. +//! +//! The reference for NEON is [ARM's NEON Intrinsics Reference][arm_ref]. The +//! [ARM's NEON Intrinsics Online Database][arm_dat] is also useful. +//! +//! [arm_ref]: +//! http://infocenter.arm.com/help/topic/com.arm.doc. +//! ihi0073a/IHI0073A_arm_neon_intrinsics_ref.pdf +//! [arm_dat]: https://developer.arm.com/technologies/neon/intrinsics + +mod v8; +pub use self::v8::*; + +#[cfg(target_feature = "neon")] +mod neon; +#[cfg(target_feature = "neon")] +pub use self::neon::*; diff --git a/src/arm/v8_neon.rs b/src/aarch64/neon.rs similarity index 100% rename from src/arm/v8_neon.rs rename to src/aarch64/neon.rs diff --git a/src/arm/v8.rs b/src/aarch64/v8.rs similarity index 98% rename from src/arm/v8.rs rename to src/aarch64/v8.rs index cf623fd9fc..e6b7e172f0 100644 --- a/src/arm/v8.rs +++ b/src/aarch64/v8.rs @@ -5,8 +5,6 @@ //! [armv8]: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc. //! ddi0487a.k_10775/index.html -pub use super::v7::*; - #[cfg(test)] use stdsimd_test::assert_instr; @@ -59,7 +57,7 @@ pub unsafe fn _cls_u64(x: u64) -> u64 { #[cfg(test)] mod tests { - use arm::v8; + use aarch64::v8; #[test] fn _rev_u64() { diff --git a/src/arm/mod.rs b/src/arm/mod.rs index 8266842d82..f1611e70b0 100644 --- a/src/arm/mod.rs +++ b/src/arm/mod.rs @@ -8,23 +8,13 @@ //! ihi0073a/IHI0073A_arm_neon_intrinsics_ref.pdf //! [arm_dat]: https://developer.arm.com/technologies/neon/intrinsics +mod v6; pub use self::v6::*; + +mod v7; pub use self::v7::*; -#[cfg(target_arch = "aarch64")] -pub use self::v8::*; #[cfg(target_feature = "neon")] -pub use self::v7_neon::*; - -#[cfg(all(target_arch = "aarch64", target_feature = "neon"))] -pub use self::v8_neon::*; - -mod v6; -mod v7; +mod neon; #[cfg(target_feature = "neon")] -mod v7_neon; - -#[cfg(target_arch = "aarch64")] -mod v8; -#[cfg(all(target_arch = "aarch64", target_feature = "neon"))] -mod v8_neon; +pub use self::neon::*; diff --git a/src/arm/v7_neon.rs b/src/arm/neon.rs similarity index 100% rename from src/arm/v7_neon.rs rename to src/arm/neon.rs diff --git a/src/lib.rs b/src/lib.rs index 849acba395..5c1333dc2d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -144,6 +144,9 @@ pub mod vendor { #[cfg(any(target_arch = "arm", target_arch = "aarch64"))] pub use arm::*; + + #[cfg(target_arch = "aarch64")] + pub use aarch64::*; } #[macro_use] @@ -160,3 +163,5 @@ mod x86; #[cfg(any(target_arch = "arm", target_arch = "aarch64"))] mod arm; +#[cfg(target_arch = "aarch64")] +mod aarch64; diff --git a/src/x86/avx2.rs b/src/x86/avx2.rs index edbf720643..d8671b3f57 100644 --- a/src/x86/avx2.rs +++ b/src/x86/avx2.rs @@ -755,7 +755,9 @@ pub unsafe fn _mm_maskload_epi32(mem_addr: *const i32, mask: i32x4) -> i32x4 { #[inline(always)] #[target_feature = "+avx2"] #[cfg_attr(test, assert_instr(vpmaskmovd))] -pub unsafe fn _mm256_maskload_epi32(mem_addr: *const i32, mask: i32x8) -> i32x8 { +pub unsafe fn _mm256_maskload_epi32( + mem_addr: *const i32, mask: i32x8 +) -> i32x8 { maskloadd256(mem_addr as *const i8, mask) } @@ -775,7 +777,9 @@ pub unsafe fn _mm_maskload_epi64(mem_addr: *const i64, mask: i64x2) -> i64x2 { #[inline(always)] #[target_feature = "+avx2"] #[cfg_attr(test, assert_instr(vpmaskmovq))] -pub unsafe fn _mm256_maskload_epi64(mem_addr: *const i64, mask: i64x4) -> i64x4 { +pub unsafe fn _mm256_maskload_epi64( + mem_addr: *const i64, mask: i64x4 +) -> i64x4 { maskloadq256(mem_addr as *const i8, mask) } @@ -795,7 +799,9 @@ pub unsafe fn _mm_maskstore_epi32(mem_addr: *mut i32, mask: i32x4, a: i32x4) { #[inline(always)] #[target_feature = "+avx2"] #[cfg_attr(test, assert_instr(vpmaskmovd))] -pub unsafe fn _mm256_maskstore_epi32(mem_addr: *mut i32, mask: i32x8, a: i32x8) { +pub unsafe fn _mm256_maskstore_epi32( + mem_addr: *mut i32, mask: i32x8, a: i32x8 +) { maskstored256(mem_addr as *mut i8, mask, a) } @@ -815,7 +821,9 @@ pub unsafe fn _mm_maskstore_epi64(mem_addr: *mut i64, mask: i64x2, a: i64x2) { #[inline(always)] #[target_feature = "+avx2"] #[cfg_attr(test, assert_instr(vpmaskmovq))] -pub unsafe fn _mm256_maskstore_epi64(mem_addr: *mut i64, mask: i64x4, a: i64x4) { +pub unsafe fn _mm256_maskstore_epi64( + mem_addr: *mut i64, mask: i64x4, a: i64x4 +) { maskstoreq256(mem_addr as *mut i8, mask, a) } @@ -1184,7 +1192,8 @@ pub unsafe fn _mm256_shuffle_epi8(a: u8x32, b: u8x32) -> u8x32 { pshufb(a, b) } -/// Shuffle 32-bit integers in 128-bit lanes of `a` using the control in `imm8`. +/// Shuffle 32-bit integers in 128-bit lanes of `a` using the control in +/// `imm8`. /// /// ```rust /// # #![feature(cfg_target_feature)] diff --git a/stdsimd-test/src/lib.rs b/stdsimd-test/src/lib.rs index 5de401695f..ce52ea5d27 100644 --- a/stdsimd-test/src/lib.rs +++ b/stdsimd-test/src/lib.rs @@ -326,7 +326,7 @@ pub fn assert(fnptr: usize, fnname: &str, expected: &str) { pub fn assert_skip_test_ok(name: &str) { if env::var("STDSIMD_TEST_EVERYTHING").is_err() { - return + return; } panic!("skipped test `{}` when it shouldn't be skipped", name); }