diff --git a/common/driver/gpu_async.c b/common/driver/gpu_async.c
index ef50074..4098b75 100755
--- a/common/driver/gpu_async.c
+++ b/common/driver/gpu_async.c
@@ -172,7 +172,7 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) {
          if (buffer->write) {
             writel(buffer->dmaMapping->dma_addresses[0] & 0xFFFFFFFF, data->base+0x100+data->writeBuffers.count*16);
             writel((buffer->dmaMapping->dma_addresses[0] >> 32) & 0xFFFFFFFF, data->base+0x104+data->writeBuffers.count*16);
-            writel(mapSize, data->base+0x108+data->writeBuffers.count*16);
+            writel(mapSize - BUFFER_OFFSET, data->base+0x108+data->writeBuffers.count*16);
             data->writeBuffers.count++;
          } else {
             writel(buffer->dmaMapping->dma_addresses[0] & 0xFFFFFFFF, data->base+0x200+data->readBuffers.count*16);
diff --git a/common/driver/gpu_async.h b/common/driver/gpu_async.h
index f070fbd..466a590 100755
--- a/common/driver/gpu_async.h
+++ b/common/driver/gpu_async.h
@@ -44,6 +44,21 @@
  */
 #define GPU_BOUND_MASK    (~GPU_BOUND_OFFSET)
 
+/**
+ * BUFFER_OFFSET_SHIFT - Shift for buffer offset address boundary
+ */
+#define BUFFER_OFFSET_SHIFT   8
+
+/**
+ * BUFFER_OFFSET_SIZE - Size of buffer offset boundary
+ */
+#define BUFFER_OFFSET_SIZE    ((u64)1 << BUFFER_OFFSET_SHIFT)
+
+/**
+ * BUFFER_OFFSET - Offset for setting correct buffer size (maxSize)
+ */
+#define BUFFER_OFFSET  (BUFFER_OFFSET_SIZE - 1)
+
 /**
  * MAX_GPU_BUFFERS - Maximum number of GPU buffers allowed
  */