diff --git a/python/surf/xilinx/_RfBlock.py b/python/surf/xilinx/_RfBlock.py index 035936f1f7..9a005134b6 100644 --- a/python/surf/xilinx/_RfBlock.py +++ b/python/surf/xilinx/_RfBlock.py @@ -18,11 +18,14 @@ class RfBlock(pr.Device): def __init__( self, + RestartSM = None, # Pointer to the RestartSM remote variable isAdc = False, # True if this is an ADC tile description = 'RFSoC data converter block registers', **kwargs): super().__init__(description=description, **kwargs) + self.RestartSM = RestartSM + ############################## # Variables ############################## @@ -36,7 +39,6 @@ def __init__( bitOffset = 0, mode = 'RO', enum = {0: 'FullBw', 1: 'NA', 2: 'HalfBwImr', 3: 'FullBwByPass'}, - overlapEn = True, )) self.add(pr.RemoteVariable( @@ -47,7 +49,6 @@ def __init__( bitOffset = 0, mode = 'RO', enum = {0: 'Real', 1: 'IQ'}, - overlapEn = True, )) if isAdc is True: @@ -60,7 +61,6 @@ def __init__( bitOffset = 0, mode = 'RO', enum = {0: 'I Data', 1: 'Q DATA', 2: 'IQ Data', 3: '4GSPS'}, - overlapEn = True, )) self.add(pr.RemoteVariable( @@ -71,7 +71,6 @@ def __init__( bitOffset = 0, mode = 'RO', enum = {0: 'NA', 1: 'Even', 2: 'Odd', 3: '4Phase'}, - overlapEn = True, )) @@ -82,8 +81,6 @@ def __init__( bitSize = 16, bitOffset = 0, mode = 'RW', - overlapEn = True, - hidden = True, )) self.add(pr.RemoteVariable( @@ -93,8 +90,6 @@ def __init__( bitSize = 16, bitOffset = 0, mode = 'RW', - overlapEn = True, - hidden = True, )) self.add(pr.RemoteVariable( @@ -104,8 +99,6 @@ def __init__( bitSize = 16, bitOffset = 0, mode = 'RW', - overlapEn = True, - hidden = True, )) self.add(pr.RemoteVariable( @@ -115,8 +108,6 @@ def __init__( bitSize = 16, bitOffset = 0, mode = 'RO', - overlapEn = True, - hidden = True, )) self.add(pr.RemoteVariable( @@ -126,8 +117,6 @@ def __init__( bitSize = 16, bitOffset = 0, mode = 'RO', - overlapEn = True, - hidden = True, )) self.add(pr.RemoteVariable( @@ -137,8 +126,6 @@ def __init__( bitSize = 1, bitOffset = 5, mode = 'RO', - overlapEn = True, - hidden = True, )) self.add(pr.LocalVariable( @@ -196,6 +183,8 @@ def _ncoFreqSet(self, value, write, verify, check): self.ncoFqwdMid.set(value=int.from_bytes(ba[2:4], byteorder='little', signed=False), write=write, verify=verify, check=check) self.ncoFqwdUp.set (value=int.from_bytes(ba[4:6], byteorder='little', signed=False), write=write, verify=verify, check=check) + # Reset the tile after changing the NCO value + self.RestartSM.set(value=0x1, write=write, verify=False, check=False) def _ncoFreqGet(self, read, check): samplingRate = self.samplingRate.value() diff --git a/python/surf/xilinx/_RfDataConverter.py b/python/surf/xilinx/_RfDataConverter.py index 26e7113050..1180bab72b 100644 --- a/python/surf/xilinx/_RfDataConverter.py +++ b/python/surf/xilinx/_RfDataConverter.py @@ -27,87 +27,79 @@ def __init__( # Variables ############################## self.add(pr.RemoteVariable( - name = "ipVersionMajor", - description = "IP version major", + name = 'ipVersionMajor', + description = 'IP version major', offset = 0x0000, bitSize = 8, bitOffset = 24, - mode = "RO", - overlapEn = True, + mode = 'RO', )) self.add(pr.RemoteVariable( - name = "ipVersionMinor", - description = "IP version minor", + name = 'ipVersionMinor', + description = 'IP version minor', offset = 0x0000, bitSize = 8, bitOffset = 16, - mode = "RO", - overlapEn = True, + mode = 'RO', )) self.add(pr.RemoteVariable( - name = "ipVersionRevision", - description = "IP version revision", + name = 'ipVersionRevision', + description = 'IP version revision', offset = 0x0000, bitSize = 8, bitOffset = 8, - mode = "RO", - overlapEn = True, + mode = 'RO', )) self.add(pr.RemoteVariable( - name = "Reset", - description = "Reset all tiles, autoclear", + name = 'Reset', + description = 'Reset all tiles, autoclear', offset = 0x0004, bitSize = 1, bitOffset = 0, - mode = "WO", - overlapEn = True, + mode = 'WO', )) self.add(pr.RemoteVariable( - name = "InterruptStatus", - description = "Interrupt status register", + name = 'InterruptStatus', + description = 'Interrupt status register', offset = 0x0100, bitSize = 8, bitOffset = 0, - mode = "RO", + mode = 'RO', hidden = True, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "axiTimeoutInterrupt", - description = "Interrupt status register", + name = 'axiTimeoutInterrupt', + description = 'Interrupt status register', offset = 0x0100, bitSize = 1, bitOffset = 31, - mode = "RO", + mode = 'RO', hidden = True, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "InterruptEnable", - description = "Interrupt enable register", + name = 'InterruptEnable', + description = 'Interrupt enable register', offset = 0x0104, bitSize = 8, bitOffset = 0, - mode = "RW", + mode = 'RW', hidden = True, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "axiTimeoutInterruptEnable", - description = "Interrupt status register", + name = 'axiTimeoutInterruptEnable', + description = 'Interrupt status register', offset = 0x0104, bitSize = 1, bitOffset = 31, - mode = "RW", + mode = 'RW', hidden = True, - overlapEn = True, )) for i in range(4): @@ -127,21 +119,3 @@ def __init__( offset = 0x14000 + 0x4000*i, expand = False, )) - - self.add(pr.RemoteVariable( - name = "RawData", - description = "", - offset = 0, - bitSize = 32 * 0x10000, - bitOffset = 0, - numValues = 0x10000, - valueBits = 32, - valueStride = 32, - updateNotify = True, - bulkOpEn = False, # FALSE for large variables - overlapEn = True, - verify = False, - hidden = True, - base = pr.UInt, - mode = "RW", - )) diff --git a/python/surf/xilinx/_RfTile.py b/python/surf/xilinx/_RfTile.py index aafedd3a04..e8ba4f8e4d 100644 --- a/python/surf/xilinx/_RfTile.py +++ b/python/surf/xilinx/_RfTile.py @@ -21,120 +21,110 @@ def __init__( self, gen3 = True, # True if using RFSoC GEN3 Hardware isAdc = False, # True if this is an ADC tile - description = "RFSoC data converter tile registers", + description = 'RFSoC data converter tile registers', **kwargs): super().__init__(description=description, **kwargs) powerOnSequenceSteps = { - 0: "Device_Power-up_and_Configuration[0]", - 1: "Device_Power-up_and_Configuration[1]", - 2: "Device_Power-up_and_Configuration[2]", - 3: "Power_Supply_Adjustment[0]", - 4: "Power_Supply_Adjustment[1]", - 5: "Power_Supply_Adjustment[2]", - 6: "Clock_Configuration[0]", - 7: "Clock_Configuration[1]", - 8: "Clock_Configuration[2]", - 9: "Clock_Configuration[3]", - 10: "Clock_Configuration[4]", - 11: "Converter_Calibration[0]", - 12: "Converter_Calibration[1]", - 13: "Converter_Calibration[2]", - 14: "Wait_for_deassertion_of_AXI4-Stream_reset", - 15: "Done", + 0: 'Device_Power-up_and_Configuration[0]', + 1: 'Device_Power-up_and_Configuration[1]', + 2: 'Device_Power-up_and_Configuration[2]', + 3: 'Power_Supply_Adjustment[0]', + 4: 'Power_Supply_Adjustment[1]', + 5: 'Power_Supply_Adjustment[2]', + 6: 'Clock_Configuration[0]', + 7: 'Clock_Configuration[1]', + 8: 'Clock_Configuration[2]', + 9: 'Clock_Configuration[3]', + 10: 'Clock_Configuration[4]', + 11: 'Converter_Calibration[0]', + 12: 'Converter_Calibration[1]', + 13: 'Converter_Calibration[2]', + 14: 'Wait_for_deassertion_of_AXI4-Stream_reset', + 15: 'Done', } ############################## # Variables ############################## self.add(pr.RemoteVariable( - name = "RestartSM", - description = "Write 1 to start power-on state machine. Auto-clear. SM stops at stages programmed in RestartState", + name = 'RestartSM', + description = 'Write 1 to start power-on state machine. Auto-clear. SM stops at stages programmed in RestartState', offset = 0x0004, bitSize = 1, bitOffset = 0, - mode = "WO", - overlapEn = True, + mode = 'WO', )) self.add(pr.RemoteVariable( - name = "RestartStateEnd", - description = "End state for power-on sequence", + name = 'RestartStateEnd', + description = 'End state for power-on sequence', offset = 0x0008, bitSize = 8, bitOffset = 0, - mode = "RW", + mode = 'RW', enum = powerOnSequenceSteps, - hidden = True, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "RestartStateStart", - description = "Start state for power-on sequence", + name = 'RestartStateStart', + description = 'Start state for power-on sequence', offset = 0x0008, bitSize = 8, bitOffset = 8, - mode = "RW", + mode = 'RW', enum = powerOnSequenceSteps, - hidden = True, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "CurrentState", - description = "Current state register", + name = 'CurrentState', + description = 'Current state register', offset = 0x000C, bitSize = 8, bitOffset = 0, - mode = "RO", + mode = 'RO', pollInterval = 1, enum = powerOnSequenceSteps, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "ResetCount", - description = "reset count register", + name = 'ResetCount', + description = 'reset count register', offset = 0x0038, bitSize = 8, bitOffset = 0, - mode = "RO", + mode = 'RO', hidden = True, - overlapEn = True, )) if gen3: self.add(pr.RemoteVariable( - name = "ClockDetector", - description = "Clock detector status. Asserted High when the tile clock detector has detected a valid clock on its local clock input.", + name = 'ClockDetector', + description = 'Clock detector status. Asserted High when the tile clock detector has detected a valid clock on its local clock input.', offset = 0x0084, bitSize = 1, bitOffset = 0, - mode = "RO", + mode = 'RO', pollInterval = 1, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "InterruptStatus", - description = "interrupt status register", + name = 'InterruptStatus', + description = 'interrupt status register', offset = 0x0200, bitSize = 4, bitOffset = 0, - mode = "RW", + mode = 'RW', hidden = True, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "InterruptEnable", - description = "interrupt status register", + name = 'InterruptEnable', + description = 'interrupt status register', offset = 0x0204, bitSize = 5, bitOffset = 0, - mode = "RW", + mode = 'RW', hidden = True, - overlapEn = True, )) for i in range(4): @@ -143,9 +133,8 @@ def __init__( description = f'Converter {i} interrupt enable', offset = 0x0208 + 8*i, bitSize = 32, - mode = "RW", + mode = 'RW', hidden = True, - overlapEn = True, )) self.add(pr.RemoteVariable( @@ -153,64 +142,58 @@ def __init__( description = f'Converter {i} interrupt register', offset = 0x020C + 8*i, bitSize = 32, - mode = "RW", + mode = 'RW', hidden = True, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "clockPresent", - description = "Clock present: Asserted when the reference clock for the tile is present.", + name = 'clockPresent', + description = 'Clock present: Asserted when the reference clock for the tile is present.', offset = 0x0228, bitSize = 1, bitOffset = 0, - mode = "RO", + mode = 'RO', pollInterval = 1, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "supplyStable", - description = "Supplies up: Asserted when the external supplies to the tile are stable.", + name = 'supplyStable', + description = 'Supplies up: Asserted when the external supplies to the tile are stable.', offset = 0x0228, bitSize = 1, bitOffset = 1, - mode = "RO", + mode = 'RO', pollInterval = 1, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "poweredUp", - description = "Power-up state: Asserted when the tile is in operation.", + name = 'poweredUp', + description = 'Power-up state: Asserted when the tile is in operation.', offset = 0x0228, bitSize = 1, bitOffset = 2, - mode = "RO", + mode = 'RO', pollInterval = 1, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "pllLocked", - description = "PLL locked: Asserted when the tile PLL has achieved lock.", + name = 'pllLocked', + description = 'PLL locked: Asserted when the tile PLL has achieved lock.', offset = 0x0228, bitSize = 1, bitOffset = 3, - mode = "RO", + mode = 'RO', pollInterval = 1, - overlapEn = True, )) self.add(pr.RemoteVariable( - name = "fifoDisable", - description = "Disable the interface FIFO for converter", + name = 'fifoDisable', + description = 'Disable the interface FIFO for converter', offset = 0x0230, bitSize = 1, bitOffset = 0, - mode = "RW", + mode = 'RW', hidden = True, - overlapEn = True, )) if gen3: @@ -218,8 +201,9 @@ def __init__( for i in range(4): self.add(xil.RfBlock( - name = f'{prefix}Block[{i}]', - isAdc = isAdc, - offset = 0x2000 + 0x400*i, - expand = False, + name = f'{prefix}Block[{i}]', + isAdc = isAdc, + RestartSM = self.RestartSM, + offset = 0x2000 + 0x400*i, + expand = False, ))