From 9ab33a8930668bf601e92c860c41f0bf842d3613 Mon Sep 17 00:00:00 2001 From: Luke Gorrie Date: Mon, 21 Aug 2017 08:23:47 +0200 Subject: [PATCH] README: shorten intro, move Optimization Resources down --- README.md | 38 ++++++++++++++++---------------------- 1 file changed, 16 insertions(+), 22 deletions(-) diff --git a/README.md b/README.md index 081eebb493..ba8690d691 100644 --- a/README.md +++ b/README.md @@ -7,15 +7,9 @@ Making performance predictable for application developers brings new requirements: - Providing an accurate mental model of how the JIT works and which programming techniques are effective. -- Providing diagnostic tools consistent with this mental model to make the actual operation transparent. +- Providing diagnostic tools ([Studio]((https://hydra.snabb.co/job/lukego/studio-manual/studio-manual-html/latest/download-by-type/file/Manual#view-hot-traces)) consistent with this mental model to make the actual operation transparent. - Making profiling completely ubiquitous in development, testing, and production environments. -These requirements drive RaptorJIT development in certain directions: - -- Providing programming constructs that produce fast code, every time. -- Minimizing the performance impact of non-deterministic JIT decisions. -- Creating high-level diagnostic tools in the [Studio](https://hydra.snabb.co/job/lukego/studio-manual/studio-manual-html/latest/download-by-type/file/Manual#view-hot-traces) project. - The development process has to support moving quickly in these directions: - Quality assurance based on repeatable standard benchmarks executed by CI. @@ -37,21 +31,6 @@ This makes the following classes of pull requests very welcome: The CI benchmark suite will evolve over time starting from the [standard LuaJIT benchmarks](https://hydra.snabb.co/job/luajit/branchmarks/benchmarkResults/latest/download/2) (already covers RaptorJIT) and the [Snabb end-to-end benchmark suite](https://hydra.snabb.co/job/snabb-new-tests/benchmarks-murren-large/benchmark-reports.report-full-matrix/latest/download/2) (must be updated to cover RaptorJIT.) -### Optimization resources - -These are the authoritative optimization resources for processors -supported by RaptorJIT. If you are confused by references to CPU -details in discussions then these are the places to look for answers. - -- [Computer Architecture: A Quantitiave Approach](https://www.amazon.com/Computer-Architecture-Fifth-Quantitative-Approach/dp/012383872X) by Hennessy and Patterson. -- [Intel Architectures Optimization Reference Manual](http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-optimization-manual.html). -- Agner Fog's [software optimization resources](http://www.agner.org/optimize/): - - [Instruction latency and throughput tables](http://www.agner.org/optimize/instruction_tables.pdf). - - [Microarchitecture of Intel, AMD, and VIA CPUs](http://www.agner.org/optimize/microarchitecture.pdf). - - [Optimizing subroutines in assembly language for x86](http://www.agner.org/optimize/optimizing_assembly.pdf). - -The [AnandTech review of the Haswell microarchitecture](http://www.anandtech.com/show/6355/intels-haswell-architecture) is also excellent lighter reading. - ### Compilation for users Simple build: @@ -149,6 +128,21 @@ as [Hydra](https://nixos.org/hydra/) then the tests can be automatically parallelized and distributed across a suitable build farm. +### Optimization resources + +These are the authoritative optimization resources for processors +supported by RaptorJIT. If you are confused by references to CPU +details in discussions then these are the places to look for answers. + +- [Computer Architecture: A Quantitiave Approach](https://www.amazon.com/Computer-Architecture-Fifth-Quantitative-Approach/dp/012383872X) by Hennessy and Patterson. +- [Intel Architectures Optimization Reference Manual](http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-optimization-manual.html). +- Agner Fog's [software optimization resources](http://www.agner.org/optimize/): + - [Instruction latency and throughput tables](http://www.agner.org/optimize/instruction_tables.pdf). + - [Microarchitecture of Intel, AMD, and VIA CPUs](http://www.agner.org/optimize/microarchitecture.pdf). + - [Optimizing subroutines in assembly language for x86](http://www.agner.org/optimize/optimizing_assembly.pdf). + +The [AnandTech review of the Haswell microarchitecture](http://www.anandtech.com/show/6355/intels-haswell-architecture) is also excellent lighter reading. + ### Quotes Here are some borrowed words to put this branch into context: