From f316d7b6015d236b0c34b81960413820bcec1912 Mon Sep 17 00:00:00 2001 From: Damjan Georgievski Date: Mon, 27 Jan 2020 01:42:18 +0100 Subject: [PATCH] add support for stm32g031/041 chipid 0x466 --- include/stlink/chipid.h | 3 ++- src/chipid.c | 13 ++++++++++++- src/common.c | 3 ++- 3 files changed, 16 insertions(+), 3 deletions(-) diff --git a/include/stlink/chipid.h b/include/stlink/chipid.h index a4f4be4c0..4de84a0c8 100644 --- a/include/stlink/chipid.h +++ b/include/stlink/chipid.h @@ -71,7 +71,8 @@ enum stlink_stm32_chipids { STLINK_CHIPID_STM32_F410 = 0x458, STLINK_CHIPID_STM32_F413 = 0x463, STLINK_CHIPID_STM32_L4RX = 0x470, // taken from the STM32L4R9I-DISCO board - STLINK_CHIPID_STM32_G0X1 = 0x460, + STLINK_CHIPID_STM32_G03X = 0x466, + STLINK_CHIPID_STM32_G07X = 0x460, STLINK_CHIPID_STM32_WB55 = 0x495 }; diff --git a/src/chipid.c b/src/chipid.c index d627849a3..076f17ee3 100644 --- a/src/chipid.c +++ b/src/chipid.c @@ -521,9 +521,20 @@ static const struct stlink_chipid_params devices[] = { .bootrom_base = 0x1ff00000, .bootrom_size = 0x2000 }, + { + // STM32G031/041 (RM0444) + .chip_id = STLINK_CHIPID_STM32_G03X, + .description = "G031/041 device", + .flash_type = STLINK_FLASH_TYPE_G0, + .flash_size_reg = 0x1FFF75E0, // Section 38.2 + .flash_pagesize = 0x800, // 2K (sec 3.2) + .sram_size = 0x2000, // 8K (table 3) + .bootrom_base = 0x1fff0000, + .bootrom_size = 0x2000 // 8K (table 3) + }, { // STM32G071/081 (from RM0444) - .chip_id = STLINK_CHIPID_STM32_G0X1, + .chip_id = STLINK_CHIPID_STM32_G07X, .description = "G071/G081 device", .flash_type = STLINK_FLASH_TYPE_G0, .flash_size_reg = 0x1FFF75E0, // Section 38.2 diff --git a/src/common.c b/src/common.c index 99bd7a842..54e55691c 100644 --- a/src/common.c +++ b/src/common.c @@ -2841,7 +2841,8 @@ int stlink_write_option_bytes(stlink_t *sl, stm32_addr_t addr, uint8_t* base, ui stlink_core_id(sl); /* Check if chip is supported and for correct address */ - if((sl->chip_id == STLINK_CHIPID_STM32_G0X1) && (addr == STM32_G0_OPTION_BYTES_BASE)) { + if(((sl->chip_id == STLINK_CHIPID_STM32_G07X) || (sl->chip_id == STLINK_CHIPID_STM32_G03X)) && + (addr == STM32_G0_OPTION_BYTES_BASE)) { return stlink_write_option_bytes_g0x1(sl, base, len); } else if((sl->chip_id == STLINK_CHIPID_STM32_L0_CAT2) && (addr == STM32_L0_CAT2_OPTION_BYTES_BASE)) {