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z80.hpp
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/**
* SUZUKI PLAN - Z80 Emulator
* -----------------------------------------------------------------------------
* The MIT License (MIT)
*
* Copyright (c) 2019 Yoji Suzuki.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
* -----------------------------------------------------------------------------
*/
#ifndef INCLUDE_Z80_HPP
#define INCLUDE_Z80_HPP
#include <limits.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include <vector>
class Z80
{
public: // Interface data types
struct WaitClocks {
int fretch; // Wait T-cycle (Hz) before fetching instruction (default is 0 = no wait)
int read; // Wait T-cycle (Hz) before to read memory (default is 0 = no wait)
int write; // Wait T-cycle (Hz) before to write memory (default is 0 = no wait)
} wtc;
struct RegisterPair {
unsigned char A;
unsigned char F;
unsigned char B;
unsigned char C;
unsigned char D;
unsigned char E;
unsigned char H;
unsigned char L;
};
struct Register {
struct RegisterPair pair;
struct RegisterPair back;
unsigned short PC;
unsigned short SP;
unsigned short IX;
unsigned short IY;
unsigned short interruptVector; // interrupt vector for IRQ
unsigned short interruptAddrN; // interrupt address for NMI
unsigned short WZ;
unsigned short reserved16;
unsigned char R;
unsigned char I;
unsigned char IFF;
unsigned char interrupt; // NI-- --mm (N: NMI, I: IRQ, mm: mode)
unsigned char consumeClockCounter;
unsigned char execEI;
unsigned char reserved8[2];
} reg;
inline unsigned char flagS() { return 0b10000000; }
inline unsigned char flagZ() { return 0b01000000; }
inline unsigned char flagY() { return 0b00100000; }
inline unsigned char flagH() { return 0b00010000; }
inline unsigned char flagX() { return 0b00001000; }
inline unsigned char flagPV() { return 0b00000100; }
inline unsigned char flagN() { return 0b00000010; }
inline unsigned char flagC() { return 0b00000001; }
inline unsigned char readByte(unsigned short addr, int clock = 4)
{
if (wtc.read) consumeClock(wtc.read);
unsigned char byte = CB.read(CB.arg, addr);
consumeClock(clock);
return byte;
}
inline void writeByte(unsigned short addr, unsigned char value, int clock = 4)
{
if (wtc.write) consumeClock(wtc.write);
CB.write(CB.arg, addr, value);
consumeClock(clock);
}
private: // Internal functions & variables
// flag setter
inline void setFlagS(bool on) { on ? reg.pair.F |= flagS() : reg.pair.F &= ~flagS(); }
inline void setFlagZ(bool on) { on ? reg.pair.F |= flagZ() : reg.pair.F &= ~flagZ(); }
inline void setFlagY(bool on) { on ? reg.pair.F |= flagY() : reg.pair.F &= ~flagY(); }
inline void setFlagH(bool on) { on ? reg.pair.F |= flagH() : reg.pair.F &= ~flagH(); }
inline void setFlagX(bool on) { on ? reg.pair.F |= flagX() : reg.pair.F &= ~flagX(); }
inline void setFlagPV(bool on) { on ? reg.pair.F |= flagPV() : reg.pair.F &= ~flagPV(); }
inline void setFlagN(bool on) { on ? reg.pair.F |= flagN() : reg.pair.F &= ~flagN(); }
inline void setFlagC(bool on) { on ? reg.pair.F |= flagC() : reg.pair.F &= ~flagC(); }
inline void setFlagXY(unsigned char value)
{
setFlagX(value & flagX());
setFlagY(value & flagY());
}
// flag checker
inline bool isFlagS() { return reg.pair.F & flagS(); }
inline bool isFlagZ() { return reg.pair.F & flagZ(); }
inline bool isFlagH() { return reg.pair.F & flagH(); }
inline bool isFlagPV() { return reg.pair.F & flagPV(); }
inline bool isFlagN() { return reg.pair.F & flagN(); }
inline bool isFlagC() { return reg.pair.F & flagC(); }
inline unsigned char IFF1() { return 0b00000001; }
inline unsigned char IFF2() { return 0b00000100; }
inline unsigned char IFF_IRQ() { return 0b00100000; }
inline unsigned char IFF_NMI() { return 0b01000000; }
inline unsigned char IFF_HALT() { return 0b10000000; }
class BreakPoint
{
public:
unsigned short addr;
void (*callback)(void* arg);
BreakPoint(unsigned short addr, void (*callback)(void* arg))
{
this->addr = addr;
this->callback = callback;
}
};
class BreakOperand
{
public:
unsigned char operandNumber;
void (*callback)(void* arg);
BreakOperand(unsigned char operandNumber, void (*callback)(void* arg))
{
this->operandNumber = operandNumber;
this->callback = callback;
}
};
class ReturnHandler
{
public:
void (*callback)(void* arg);
ReturnHandler(void (*callback)(void* arg)) { this->callback = callback; }
};
inline void invokeReturnHandlers()
{
for (auto handler : this->CB.returnHandlers) {
handler->callback(this->CB.arg);
}
}
class CallHandler
{
public:
void (*callback)(void* arg);
CallHandler(void (*callback)(void* arg)) { this->callback = callback; }
};
inline void invokeCallHandlers()
{
for (auto handler : this->CB.callHandlers) {
handler->callback(this->CB.arg);
}
}
struct Callback {
unsigned char (*read)(void* arg, unsigned short addr);
void (*write)(void* arg, unsigned short addr, unsigned char value);
unsigned char (*in)(void* arg, unsigned char port);
void (*out)(void* arg, unsigned char port, unsigned char value);
void (*debugMessage)(void* arg, const char* message);
void (*consumeClock)(void* arg, int clock);
std::vector<BreakPoint*> breakPoints;
std::vector<BreakOperand*> breakOperands;
std::vector<ReturnHandler*> returnHandlers;
std::vector<CallHandler*> callHandlers;
void* arg;
} CB;
bool requestBreakFlag;
inline void checkBreakPoint()
{
if (!CB.breakPoints.empty()) {
for (auto bp : CB.breakPoints) {
if (bp->addr == reg.PC) {
bp->callback(CB.arg);
}
}
}
}
inline void checkBreakOperand(unsigned char operandNumber)
{
if (!CB.breakOperands.empty()) {
for (auto bo : CB.breakOperands) {
if (bo->operandNumber == operandNumber) {
bo->callback(CB.arg);
}
}
}
}
inline void log(const char* format, ...)
{
char buf[1024];
va_list args;
va_start(args, format);
vsprintf(buf, format, args);
va_end(args);
CB.debugMessage(CB.arg, buf);
}
inline unsigned short getAF()
{
unsigned short result = reg.pair.A;
result <<= 8;
result |= reg.pair.F;
return result;
}
inline void setAF(unsigned short value)
{
reg.pair.A = (value & 0xFF00) >> 8;
reg.pair.F = (value & 0x00FF);
}
inline unsigned short getAF2()
{
unsigned short result = reg.back.A;
result <<= 8;
result |= reg.back.F;
return result;
}
inline void setAF2(unsigned short value)
{
reg.back.A = (value & 0xFF00) >> 8;
reg.back.F = (value & 0x00FF);
}
inline unsigned short getBC()
{
unsigned short result = reg.pair.B;
result <<= 8;
result |= reg.pair.C;
return result;
}
inline void setBC(unsigned short value)
{
reg.pair.B = (value & 0xFF00) >> 8;
reg.pair.C = (value & 0x00FF);
}
inline unsigned short getBC2()
{
unsigned short result = reg.back.B;
result <<= 8;
result |= reg.back.C;
return result;
}
inline void setBC2(unsigned short value)
{
reg.back.B = (value & 0xFF00) >> 8;
reg.back.C = (value & 0x00FF);
}
inline unsigned short getDE()
{
unsigned short result = reg.pair.D;
result <<= 8;
result |= reg.pair.E;
return result;
}
inline void setDE(unsigned short value)
{
reg.pair.D = (value & 0xFF00) >> 8;
reg.pair.E = (value & 0x00FF);
}
inline unsigned short getDE2()
{
unsigned short result = reg.back.D;
result <<= 8;
result |= reg.back.E;
return result;
}
inline void setDE2(unsigned short value)
{
reg.back.D = (value & 0xFF00) >> 8;
reg.back.E = (value & 0x00FF);
}
inline unsigned short getHL()
{
unsigned short result = reg.pair.H;
result <<= 8;
result |= reg.pair.L;
return result;
}
inline void setHL(unsigned short value)
{
reg.pair.H = (value & 0xFF00) >> 8;
reg.pair.L = (value & 0x00FF);
}
inline unsigned short getHL2()
{
unsigned short result = reg.back.H;
result <<= 8;
result |= reg.back.L;
return result;
}
inline void setHL2(unsigned short value)
{
reg.back.H = (value & 0xFF00) >> 8;
reg.back.L = (value & 0x00FF);
}
inline unsigned short getRP(unsigned char rp)
{
switch (rp & 0b11) {
case 0b00: return getBC();
case 0b01: return getDE();
case 0b10: return getHL();
default: return reg.SP;
}
}
inline unsigned short getRPIX(unsigned char rp)
{
switch (rp & 0b11) {
case 0b00: return (reg.pair.B << 8) + reg.pair.C;
case 0b01: return (reg.pair.D << 8) + reg.pair.E;
case 0b10: return reg.IX;
default: return reg.SP;
}
}
inline unsigned short getRPIY(unsigned char rp)
{
switch (rp & 0b11) {
case 0b00: return (reg.pair.B << 8) + reg.pair.C;
case 0b01: return (reg.pair.D << 8) + reg.pair.E;
case 0b10: return reg.IY;
default: return reg.SP;
}
}
inline void setRP(unsigned char rp, unsigned short value)
{
unsigned char h = (value & 0xFF00) >> 8;
unsigned char l = value & 0x00FF;
switch (rp & 0b11) {
case 0b00: {
reg.pair.B = h;
reg.pair.C = l;
break;
}
case 0b01: {
reg.pair.D = h;
reg.pair.E = l;
break;
}
case 0b10: {
reg.pair.H = h;
reg.pair.L = l;
break;
}
default: reg.SP = value;
}
}
inline unsigned char getIXH() { return (reg.IX & 0xFF00) >> 8; }
inline unsigned char getIXL() { return reg.IX & 0x00Ff; }
inline unsigned char getIYH() { return (reg.IY & 0xFF00) >> 8; }
inline unsigned char getIYL() { return reg.IY & 0x00Ff; }
inline void setIXH(unsigned char v) { reg.IX = (reg.IX & 0x00FF) + v * 256; }
inline void setIXL(unsigned char v) { reg.IX = (reg.IX & 0xFF00) + v; }
inline void setIYH(unsigned char v) { reg.IY = (reg.IY & 0x00FF) + v * 256; }
inline void setIYL(unsigned char v) { reg.IY = (reg.IY & 0xFF00) + v; }
inline bool isEvenNumberBits(unsigned char value)
{
int on = 0;
int off = 0;
value & 0b10000000 ? on++ : off++;
value & 0b01000000 ? on++ : off++;
value & 0b00100000 ? on++ : off++;
value & 0b00010000 ? on++ : off++;
value & 0b00001000 ? on++ : off++;
value & 0b00000100 ? on++ : off++;
value & 0b00000010 ? on++ : off++;
value & 0b00000001 ? on++ : off++;
return (on & 1) == 0;
}
inline int consumeClock(int hz)
{
reg.consumeClockCounter += hz;
if (CB.consumeClock) CB.consumeClock(CB.arg, hz);
return hz;
}
inline unsigned char inPort(unsigned char port, int clock = 4)
{
unsigned char byte = CB.in(CB.arg, port);
consumeClock(clock);
return byte;
}
inline void outPort(unsigned char port, unsigned char value, int clock = 4)
{
CB.out(CB.arg, port, value);
consumeClock(clock);
}
static inline int NOP(Z80* ctx)
{
if (ctx->isDebug()) ctx->log("[%04X] NOP", ctx->reg.PC);
ctx->reg.PC++;
return 0;
}
static inline int HALT(Z80* ctx)
{
if (ctx->isDebug()) ctx->log("[%04X] HALT", ctx->reg.PC);
ctx->reg.IFF |= ctx->IFF_HALT();
ctx->reg.PC++;
return 0;
}
static inline int DI(Z80* ctx)
{
if (ctx->isDebug()) ctx->log("[%04X] DI", ctx->reg.PC);
ctx->reg.IFF &= ~(ctx->IFF1() | ctx->IFF2());
ctx->reg.PC++;
return 0;
}
static inline int EI(Z80* ctx)
{
if (ctx->isDebug()) ctx->log("[%04X] EI", ctx->reg.PC);
ctx->reg.IFF |= ctx->IFF1() | ctx->IFF2();
ctx->reg.PC++;
ctx->reg.execEI = 1;
return 0;
}
inline int IM(unsigned char interrptMode)
{
if (isDebug()) log("[%04X] IM %d", reg.PC, interrptMode);
reg.interrupt &= 0b11111100;
reg.interrupt |= interrptMode & 0b11;
reg.PC += 2;
return 0;
}
inline int LD_A_I()
{
if (isDebug()) log("[%04X] LD A<$%02X>, I<$%02X>", reg.PC, reg.pair.A, reg.I);
reg.pair.A = reg.I;
setFlagPV(reg.IFF & IFF2());
reg.PC += 2;
return consumeClock(1);
}
inline int LD_I_A()
{
if (isDebug()) log("[%04X] LD I<$%02X>, A<$%02X>", reg.PC, reg.I, reg.pair.A);
reg.I = reg.pair.A;
reg.PC += 2;
return consumeClock(1);
}
inline int LD_A_R()
{
if (isDebug()) log("[%04X] LD A<$%02X>, R<$%02X>", reg.PC, reg.pair.A, reg.R);
reg.pair.A = reg.R;
setFlagPV(reg.IFF & IFF1());
reg.PC += 2;
return consumeClock(1);
}
inline int LD_R_A()
{
if (isDebug()) log("[%04X] LD R<$%02X>, A<$%02X>", reg.PC, reg.R, reg.pair.A);
reg.R = reg.pair.A;
reg.PC += 2;
return consumeClock(1);
}
static inline int EXTRA(Z80* ctx)
{
unsigned char mode = ctx->readByte(ctx->reg.PC + 1);
switch (mode) {
case 0b01000110: return ctx->IM(0);
case 0b01010110: return ctx->IM(1);
case 0b01011110: return ctx->IM(2);
case 0b01010111: return ctx->LD_A_I();
case 0b01000111: return ctx->LD_I_A();
case 0b01011111: return ctx->LD_A_R();
case 0b01001111: return ctx->LD_R_A();
case 0b10100000: return ctx->LDI();
case 0b10110000: return ctx->LDIR();
case 0b10101000: return ctx->LDD();
case 0b10111000: return ctx->LDDR();
case 0b01000100: return ctx->NEG();
case 0b10100001: return ctx->CPI();
case 0b10110001: return ctx->CPIR();
case 0b10101001: return ctx->CPD();
case 0b10111001: return ctx->CPDR();
case 0b01001101: return ctx->RETI();
case 0b01000101: return ctx->RETN();
case 0b10100010: return ctx->INI();
case 0b10110010: return ctx->INIR();
case 0b10101010: return ctx->IND();
case 0b10111010: return ctx->INDR();
case 0b10100011: return ctx->OUTI();
case 0b10110011: return ctx->OUTIR();
case 0b10101011: return ctx->OUTD();
case 0b10111011: return ctx->OUTDR();
case 0b01101111: return ctx->RLD();
case 0b01100111: return ctx->RRD();
}
switch (mode & 0b11001111) {
case 0b01001011: return ctx->LD_RP_ADDR((mode & 0b00110000) >> 4);
case 0b01000011: return ctx->LD_ADDR_RP((mode & 0b00110000) >> 4);
case 0b01001010: return ctx->ADC_HL_RP((mode & 0b00110000) >> 4);
case 0b01000010: return ctx->SBC_HL_RP((mode & 0b00110000) >> 4);
}
switch (mode & 0b11000111) {
case 0b01000000: return ctx->IN_R_C((mode & 0b00111000) >> 3);
case 0b01000001: return ctx->OUT_C_R((mode & 0b00111000) >> 3);
}
if (ctx->isDebug()) ctx->log("unknown EXTRA: $%02X", mode);
return -1;
}
// operand of using IX (first byte is 0b11011101)
static inline int OP_IX(Z80* ctx) { return ctx->opSetIX[ctx->readByte(ctx->reg.PC + 1)](ctx); }
static inline int OP_IX4(Z80* ctx)
{
signed char op3 = ctx->readByte(ctx->reg.PC + 2);
unsigned char op4 = ctx->readByte(ctx->reg.PC + 3);
return ctx->opSetIX4[op4](ctx, op3);
}
// operand of using IY (first byte is 0b11111101)
static inline int OP_IY(Z80* ctx) { return ctx->opSetIY[ctx->readByte(ctx->reg.PC + 1)](ctx); }
static inline int OP_IY4(Z80* ctx)
{
signed char op3 = ctx->readByte(ctx->reg.PC + 2);
unsigned char op4 = ctx->readByte(ctx->reg.PC + 3);
return ctx->opSetIY4[op4](ctx, op3);
}
// operand of using other register (first byte is 0b11001011)
static inline int OP_CB(Z80* ctx) { return ctx->opSetCB[ctx->readByte(ctx->reg.PC + 1)](ctx); }
// Load location (HL) with value n
static inline int LD_HL_N(Z80* ctx)
{
unsigned char n = ctx->readByte(ctx->reg.PC + 1, 3);
unsigned short hl = ctx->getHL();
if (ctx->isDebug()) ctx->log("[%04X] LD (HL<$%04X>), $%02X", ctx->reg.PC, hl, n);
ctx->writeByte(hl, n, 3);
ctx->reg.PC += 2;
return 0;
}
// Load Acc. wth location (BC)
static inline int LD_A_BC(Z80* ctx)
{
unsigned short addr = ctx->getBC();
unsigned char n = ctx->readByte(addr, 3);
if (ctx->isDebug()) ctx->log("[%04X] LD A, (BC<$%02X%02X>) = $%02X", ctx->reg.PC, ctx->reg.pair.B, ctx->reg.pair.C, n);
ctx->reg.pair.A = n;
ctx->reg.PC++;
return 0;
}
// Load Acc. wth location (DE)
static inline int LD_A_DE(Z80* ctx)
{
unsigned short addr = ctx->getDE();
unsigned char n = ctx->readByte(addr, 3);
if (ctx->isDebug()) ctx->log("[%04X] LD A, (DE<$%02X%02X>) = $%02X", ctx->reg.PC, ctx->reg.pair.D, ctx->reg.pair.E, n);
ctx->reg.pair.A = n;
ctx->reg.PC++;
return 0;
}
// Load Acc. wth location (nn)
static inline int LD_A_NN(Z80* ctx)
{
unsigned short addr = ctx->readByte(ctx->reg.PC + 1, 3);
addr += ctx->readByte(ctx->reg.PC + 2, 3) << 8;
unsigned char n = ctx->readByte(addr, 3);
if (ctx->isDebug()) ctx->log("[%04X] LD A, ($%04X) = $%02X", ctx->reg.PC, addr, n);
ctx->reg.pair.A = n;
ctx->reg.PC += 3;
return 0;
}
// Load location (BC) wtih Acc.
static inline int LD_BC_A(Z80* ctx)
{
unsigned short addr = ctx->getBC();
unsigned char n = ctx->reg.pair.A;
if (ctx->isDebug()) ctx->log("[%04X] LD (BC<$%02X%02X>), A<$%02X>", ctx->reg.PC, ctx->reg.pair.B, ctx->reg.pair.C, n);
ctx->writeByte(addr, n, 3);
ctx->reg.PC++;
return 0;
}
// Load location (DE) wtih Acc.
static inline int LD_DE_A(Z80* ctx)
{
unsigned short addr = ctx->getDE();
unsigned char n = ctx->reg.pair.A;
if (ctx->isDebug()) ctx->log("[%04X] LD (DE<$%02X%02X>), A<$%02X>", ctx->reg.PC, ctx->reg.pair.D, ctx->reg.pair.E, n);
ctx->writeByte(addr, n, 3);
ctx->reg.PC++;
return 0;
}
// Load location (nn) with Acc.
static inline int LD_NN_A(Z80* ctx)
{
unsigned short addr = ctx->readByte(ctx->reg.PC + 1, 3);
addr += ctx->readByte(ctx->reg.PC + 2, 3) << 8;
unsigned char n = ctx->reg.pair.A;
if (ctx->isDebug()) ctx->log("[%04X] LD ($%04X), A<$%02X>", ctx->reg.PC, addr, n);
ctx->writeByte(addr, n, 3);
ctx->reg.PC += 3;
return 0;
}
// Load HL with location (nn).
static inline int LD_HL_ADDR(Z80* ctx)
{
unsigned char nL = ctx->readByte(ctx->reg.PC + 1, 3);
unsigned char nH = ctx->readByte(ctx->reg.PC + 2, 3);
unsigned short addr = (nH << 8) + nL;
unsigned char l = ctx->readByte(addr, 3);
unsigned char h = ctx->readByte(addr + 1, 3);
if (ctx->isDebug()) ctx->log("[%04X] LD HL<$%04X>, ($%04X) = $%02X%02X", ctx->reg.PC, ctx->getHL(), addr, h, l);
ctx->reg.pair.L = l;
ctx->reg.pair.H = h;
ctx->reg.PC += 3;
return 0;
}
// Load location (nn) with HL.
static inline int LD_ADDR_HL(Z80* ctx)
{
unsigned char nL = ctx->readByte(ctx->reg.PC + 1, 3);
unsigned char nH = ctx->readByte(ctx->reg.PC + 2, 3);
unsigned short addr = (nH << 8) + nL;
if (ctx->isDebug()) ctx->log("[%04X] LD ($%04X), %s", ctx->reg.PC, addr, ctx->registerPairDump(0b10));
ctx->writeByte(addr, ctx->reg.pair.L, 3);
ctx->writeByte(addr + 1, ctx->reg.pair.H, 3);
ctx->reg.PC += 3;
return 0;
}
// Load SP with HL.
static inline int LD_SP_HL(Z80* ctx)
{
unsigned short value = ctx->getHL();
if (ctx->isDebug()) ctx->log("[%04X] LD %s, HL<$%04X>", ctx->reg.PC, ctx->registerPairDump(0b11), value);
ctx->reg.SP = value;
ctx->reg.PC++;
return ctx->consumeClock(2);
}
// Exchange H and L with D and E
static inline int EX_DE_HL(Z80* ctx)
{
unsigned short de = ctx->getDE();
unsigned short hl = ctx->getHL();
if (ctx->isDebug()) ctx->log("[%04X] EX %s, %s", ctx->reg.PC, ctx->registerPairDump(0b01), ctx->registerPairDump(0b10));
ctx->setDE(hl);
ctx->setHL(de);
ctx->reg.PC++;
return 0;
}
// Exchange A and F with A' and F'
static inline int EX_AF_AF2(Z80* ctx)
{
unsigned short af = ctx->getAF();
unsigned short af2 = ctx->getAF2();
if (ctx->isDebug()) ctx->log("[%04X] EX AF<$%02X%02X>, AF'<$%02X%02X>", ctx->reg.PC, ctx->reg.pair.A, ctx->reg.pair.F, ctx->reg.back.A, ctx->reg.back.F);
ctx->setAF(af2);
ctx->setAF2(af);
ctx->reg.PC++;
return 0;
}
static inline int EX_SP_HL(Z80* ctx)
{
unsigned char l = ctx->readByte(ctx->reg.SP);
unsigned char h = ctx->readByte(ctx->reg.SP + 1);
unsigned short hl = ctx->getHL();
if (ctx->isDebug()) ctx->log("[%04X] EX (SP<$%04X>) = $%02X%02X, HL<$%04X>", ctx->reg.PC, ctx->reg.SP, h, l, hl);
ctx->writeByte(ctx->reg.SP, ctx->reg.pair.L);
ctx->writeByte(ctx->reg.SP + 1, ctx->reg.pair.H, 3);
ctx->reg.pair.L = l;
ctx->reg.pair.H = h;
ctx->reg.PC++;
return 0;
}
static inline int EXX(Z80* ctx)
{
if (ctx->isDebug()) ctx->log("[%04X] EXX", ctx->reg.PC);
unsigned short bc = ctx->getBC();
unsigned short bc2 = ctx->getBC2();
unsigned short de = ctx->getDE();
unsigned short de2 = ctx->getDE2();
unsigned short hl = ctx->getHL();
unsigned short hl2 = ctx->getHL2();
ctx->setBC(bc2);
ctx->setBC2(bc);
ctx->setDE(de2);
ctx->setDE2(de);
ctx->setHL(hl2);
ctx->setHL2(hl);
ctx->reg.PC++;
return 0;
}
static inline int PUSH_AF(Z80* ctx)
{
if (ctx->isDebug()) ctx->log("[%04X] PUSH AF<$%02X%02X> <SP:$%04X>", ctx->reg.PC, ctx->reg.pair.A, ctx->reg.pair.F, ctx->reg.SP);
ctx->writeByte(--ctx->reg.SP, ctx->reg.pair.A);
ctx->writeByte(--ctx->reg.SP, ctx->reg.pair.F, 3);
ctx->reg.PC++;
return 0;
}
static inline int POP_AF(Z80* ctx)
{
unsigned short sp = ctx->reg.SP;
unsigned char l = ctx->readByte(ctx->reg.SP++, 3);
unsigned char h = ctx->readByte(ctx->reg.SP++, 3);
if (ctx->isDebug()) ctx->log("[%04X] POP AF <SP:$%04X> = $%02X%02X", ctx->reg.PC, sp, h, l);
ctx->reg.pair.F = l;
ctx->reg.pair.A = h;
ctx->reg.PC++;
return 0;
}
inline unsigned char* getRegisterPointer(unsigned char r)
{
switch (r) {
case 0b111: return ®.pair.A;
case 0b000: return ®.pair.B;
case 0b001: return ®.pair.C;
case 0b010: return ®.pair.D;
case 0b011: return ®.pair.E;
case 0b100: return ®.pair.H;
case 0b101: return ®.pair.L;
case 0b110: return ®.pair.F;
}
if (isDebug()) log("detected an unknown register number: $%02X", r);
return NULL;
}
inline char* registerDump(unsigned char r)
{
static char A[16];
static char B[16];
static char C[16];
static char D[16];
static char E[16];
static char H[16];
static char L[16];
static char F[16];
static char unknown[2];
switch (r & 0b111) {
case 0b111: sprintf(A, "A<$%02X>", reg.pair.A); return A;
case 0b000: sprintf(B, "B<$%02X>", reg.pair.B); return B;
case 0b001: sprintf(C, "C<$%02X>", reg.pair.C); return C;
case 0b010: sprintf(D, "D<$%02X>", reg.pair.D); return D;
case 0b011: sprintf(E, "E<$%02X>", reg.pair.E); return E;
case 0b100: sprintf(H, "H<$%02X>", reg.pair.H); return H;
case 0b101: sprintf(L, "L<$%02X>", reg.pair.L); return L;
case 0b110: sprintf(F, "F<$%02X>", reg.pair.F); return F;
}
unknown[0] = '?';
unknown[1] = '\0';
return unknown;
}
inline char* conditionDump(unsigned char c)
{
static char CN[4];
switch (c) {
case 0b000: strcpy(CN, "NZ"); break;
case 0b001: strcpy(CN, "Z"); break;
case 0b010: strcpy(CN, "NC"); break;
case 0b011: strcpy(CN, "C"); break;
case 0b100: strcpy(CN, "PO"); break;
case 0b101: strcpy(CN, "PE"); break;
case 0b110: strcpy(CN, "P"); break;
case 0b111: strcpy(CN, "M"); break;
default: strcpy(CN, "??");
}
return CN;
}
inline char* relativeDump(signed char e)
{
static char buf[80];
if (e < 0) {
int ee = -e;
ee -= 2;
sprintf(buf, "$%04X - %d = $%04X", reg.PC, ee, reg.PC + e + 2);
} else {
sprintf(buf, "$%04X + %d = $%04X", reg.PC, e + 2, reg.PC + e + 2);
}
return buf;
}
inline char* registerDump2(unsigned char r)
{
static char A[16];
static char B[16];
static char C[16];
static char D[16];
static char E[16];
static char H[16];
static char L[16];
static char unknown[2] = "?";
switch (r) {
case 0b111: sprintf(A, "A'<$%02X>", reg.back.A); return A;
case 0b000: sprintf(B, "B'<$%02X>", reg.back.B); return B;
case 0b001: sprintf(C, "C'<$%02X>", reg.back.C); return C;
case 0b010: sprintf(D, "D'<$%02X>", reg.back.D); return D;
case 0b011: sprintf(E, "E'<$%02X>", reg.back.E); return E;
case 0b100: sprintf(H, "H'<$%02X>", reg.back.H); return H;
case 0b101: sprintf(L, "L'<$%02X>", reg.back.L); return L;
default: return unknown;
}
}
inline char* registerPairDump(unsigned char ptn)
{
static char BC[16];
static char DE[16];
static char HL[16];
static char SP[16];
static char unknown[2] = "?";
switch (ptn & 0b11) {
case 0b00: sprintf(BC, "BC<$%02X%02X>", reg.pair.B, reg.pair.C); return BC;
case 0b01: sprintf(DE, "DE<$%02X%02X>", reg.pair.D, reg.pair.E); return DE;
case 0b10: sprintf(HL, "HL<$%02X%02X>", reg.pair.H, reg.pair.L); return HL;
case 0b11: sprintf(SP, "SP<$%04X>", reg.SP); return SP;
default: return unknown;
}
}
inline char* registerPairDumpIX(unsigned char ptn)
{
static char BC[16];
static char DE[16];
static char IX[16];
static char SP[16];
static char unknown[2] = "?";
switch (ptn & 0b11) {
case 0b00: sprintf(BC, "BC<$%02X%02X>", reg.pair.B, reg.pair.C); return BC;
case 0b01: sprintf(DE, "DE<$%02X%02X>", reg.pair.D, reg.pair.E); return DE;
case 0b10: sprintf(IX, "IX<$%04X>", reg.IX); return IX;
case 0b11: sprintf(SP, "SP<$%04X>", reg.SP); return SP;
default: return unknown;
}
}
inline char* registerPairDumpIY(unsigned char ptn)
{
static char BC[16];
static char DE[16];
static char IY[16];
static char SP[16];
static char unknown[2] = "?";
switch (ptn & 0b11) {
case 0b00: sprintf(BC, "BC<$%02X%02X>", reg.pair.B, reg.pair.C); return BC;
case 0b01: sprintf(DE, "DE<$%02X%02X>", reg.pair.D, reg.pair.E); return DE;
case 0b10: sprintf(IY, "IY<$%04X>", reg.IY); return IY;
case 0b11: sprintf(SP, "SP<$%04X>", reg.SP); return SP;
default: return unknown;
}
}
// Load Reg. r1 with Reg. r2
static inline int LD_B_B(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b000); }
static inline int LD_B_C(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b001); }
static inline int LD_B_D(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b010); }
static inline int LD_B_E(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b011); }
static inline int LD_B_B_2(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b000, 2); }
static inline int LD_B_C_2(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b001, 2); }
static inline int LD_B_D_2(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b010, 2); }
static inline int LD_B_E_2(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b011, 2); }
static inline int LD_B_H(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b100); }
static inline int LD_B_L(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b101); }
static inline int LD_B_A(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b111); }
static inline int LD_C_B(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b000); }
static inline int LD_C_C(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b001); }
static inline int LD_C_D(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b010); }
static inline int LD_C_E(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b011); }
static inline int LD_B_A_2(Z80* ctx) { return ctx->LD_R1_R2(0b000, 0b111, 2); }
static inline int LD_C_B_2(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b000, 2); }
static inline int LD_C_C_2(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b001, 2); }
static inline int LD_C_D_2(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b010, 2); }
static inline int LD_C_E_2(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b011, 2); }
static inline int LD_C_H(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b100); }
static inline int LD_C_L(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b101); }
static inline int LD_C_A(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b111); }
static inline int LD_D_B(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b000); }
static inline int LD_D_C(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b001); }
static inline int LD_D_D(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b010); }
static inline int LD_D_E(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b011); }
static inline int LD_C_A_2(Z80* ctx) { return ctx->LD_R1_R2(0b001, 0b111, 2); }
static inline int LD_D_B_2(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b000, 2); }
static inline int LD_D_C_2(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b001, 2); }
static inline int LD_D_D_2(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b010, 2); }
static inline int LD_D_E_2(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b011, 2); }
static inline int LD_D_H(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b100); }
static inline int LD_D_L(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b101); }
static inline int LD_D_A(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b111); }
static inline int LD_E_B(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b000); }
static inline int LD_E_C(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b001); }
static inline int LD_E_D(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b010); }
static inline int LD_E_E(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b011); }
static inline int LD_D_A_2(Z80* ctx) { return ctx->LD_R1_R2(0b010, 0b111, 2); }
static inline int LD_E_B_2(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b000, 2); }
static inline int LD_E_C_2(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b001, 2); }
static inline int LD_E_D_2(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b010, 2); }
static inline int LD_E_E_2(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b011, 2); }
static inline int LD_E_H(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b100); }
static inline int LD_E_L(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b101); }
static inline int LD_E_A(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b111); }
static inline int LD_E_A_2(Z80* ctx) { return ctx->LD_R1_R2(0b011, 0b111, 2); }
static inline int LD_H_B(Z80* ctx) { return ctx->LD_R1_R2(0b100, 0b000); }
static inline int LD_H_C(Z80* ctx) { return ctx->LD_R1_R2(0b100, 0b001); }
static inline int LD_H_D(Z80* ctx) { return ctx->LD_R1_R2(0b100, 0b010); }
static inline int LD_H_E(Z80* ctx) { return ctx->LD_R1_R2(0b100, 0b011); }
static inline int LD_H_H(Z80* ctx) { return ctx->LD_R1_R2(0b100, 0b100); }
static inline int LD_H_L(Z80* ctx) { return ctx->LD_R1_R2(0b100, 0b101); }
static inline int LD_H_A(Z80* ctx) { return ctx->LD_R1_R2(0b100, 0b111); }
static inline int LD_L_B(Z80* ctx) { return ctx->LD_R1_R2(0b101, 0b000); }
static inline int LD_L_C(Z80* ctx) { return ctx->LD_R1_R2(0b101, 0b001); }
static inline int LD_L_D(Z80* ctx) { return ctx->LD_R1_R2(0b101, 0b010); }
static inline int LD_L_E(Z80* ctx) { return ctx->LD_R1_R2(0b101, 0b011); }
static inline int LD_L_H(Z80* ctx) { return ctx->LD_R1_R2(0b101, 0b100); }
static inline int LD_L_L(Z80* ctx) { return ctx->LD_R1_R2(0b101, 0b101); }
static inline int LD_L_A(Z80* ctx) { return ctx->LD_R1_R2(0b101, 0b111); }
static inline int LD_A_B(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b000); }
static inline int LD_A_C(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b001); }
static inline int LD_A_D(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b010); }
static inline int LD_A_E(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b011); }
static inline int LD_A_B_2(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b000, 2); }
static inline int LD_A_C_2(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b001, 2); }
static inline int LD_A_D_2(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b010, 2); }
static inline int LD_A_E_2(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b011, 2); }
static inline int LD_A_H(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b100); }
static inline int LD_A_L(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b101); }
static inline int LD_A_A(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b111); }
static inline int LD_A_A_2(Z80* ctx) { return ctx->LD_R1_R2(0b111, 0b111, 2); }
inline int LD_R1_R2(unsigned char r1, unsigned char r2, int counter = 1)
{
unsigned char* r1p = getRegisterPointer(r1);
unsigned char* r2p = getRegisterPointer(r2);