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[RFC] Explore the CPU cost benefits of using deinterleaved data along the internal path of the pipeline #9212

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cujomalainey opened this issue Jun 7, 2024 · 1 comment
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enhancement New feature or request
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@cujomalainey
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Is your feature request related to a problem? Please describe.
A lot of components are complex, duplicating logic, do math on de-interleaved data, then have to undo their work

Describe the solution you'd like
Evaluate how much this is costing us in CPU time per component that has to de-interleave, consider possibly de-interleaving at host/dai endpoints to reduce the amount of back and forth work.

Describe alternatives you've considered
N/A as this is still scoping

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@cujomalainey cujomalainey added the enhancement New feature or request label Jun 7, 2024
@lgirdwood
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@cujomalainey good point, I guess the benefit is to de-interleave at host/dai copier only and have SIMD ready data for each processing module in the pipeline. This would also make dealing with odd number of channels more efficient too. @marcinszkudlinski fyi.

@lgirdwood lgirdwood added this to the TBD milestone Jun 11, 2024
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