adam-maj / tiny-gpu
A minimal GPU design in Verilog to learn how GPUs work from the ground up
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A minimal GPU design in Verilog to learn how GPUs work from the ground up
RISC-V Debug Support for our PULP RISC-V Cores
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
Common SystemVerilog components
BaseJump STL: A Standard Template Library for SystemVerilog
OpenTitan: Open source silicon root of trust