From 790762302bfa863643c8fa0f504e332a9a511dfc Mon Sep 17 00:00:00 2001 From: Philipp van Kempen Date: Mon, 25 Nov 2024 14:24:27 +0100 Subject: [PATCH] spike target fixes for rvv --- mlonmcu/target/riscv/riscv.py | 9 +++++++-- mlonmcu/target/riscv/util.py | 4 ++-- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/mlonmcu/target/riscv/riscv.py b/mlonmcu/target/riscv/riscv.py index 6b056c53..dff7bbdb 100644 --- a/mlonmcu/target/riscv/riscv.py +++ b/mlonmcu/target/riscv/riscv.py @@ -18,6 +18,7 @@ # """MLonMCU RISC-V Target definitions""" +import re from pathlib import Path from mlonmcu.logging import get_logger @@ -81,12 +82,16 @@ def reconfigure(self): @property def riscv_gcc_prefix(self): + arch = self.arch + arch_ = re.sub(r"_zvl\d+b", "", arch) ret = Path( pick_first( self.config, [ - f"riscv_gcc_{self.arch}_{self.abi}.install_dir", - f"riscv_gcc_{self.arch}.install_dir", + f"riscv_gcc_{arch}_{self.abi}.install_dir", + f"riscv_gcc_{arch_}_{self.abi}.install_dir", + f"riscv_gcc_{arch}.install_dir", + f"riscv_gcc_{arch_}.install_dir", f"riscv_gcc_rv{self.xlen}.install_dir", "riscv_gcc.install_dir", ], diff --git a/mlonmcu/target/riscv/util.py b/mlonmcu/target/riscv/util.py index 1783631d..d73246c6 100644 --- a/mlonmcu/target/riscv/util.py +++ b/mlonmcu/target/riscv/util.py @@ -223,8 +223,8 @@ def update_extensions( else: assert fpu == "double" require.add("v") - # if vlen: - # require.add(f"zvl{vlen}b") + if vlen: + require.add(f"zvl{vlen}b") if not minimal: if fpu in ["single", "double"] and not minimal: