From ab4cf24b55d1932313f25ad5f470b910d09895ba Mon Sep 17 00:00:00 2001
From: Francois Ramu <francois.ramu@st.com>
Date: Tue, 15 Oct 2024 10:23:54 +0200
Subject: [PATCH] dts: arm: st: stm32l4xx serie has 5 wakeup pins

Add the wakeUp pins selection on its GPIO
for all the stm32l4xx devices
Change if needed (see the corresponding datasheet/RefMan)

Signed-off-by: Francois Ramu <francois.ramu@st.com>
---
 dts/arm/st/l4/stm32l4.dtsi     | 23 +++++++++++++++++++++++
 dts/arm/st/l4/stm32l412.dtsi   |  4 ++++
 dts/arm/st/l4/stm32l432.dtsi   |  6 ++++++
 dts/arm/st/l4/stm32l4r5Xi.dtsi | 22 ----------------------
 4 files changed, 33 insertions(+), 22 deletions(-)

diff --git a/dts/arm/st/l4/stm32l4.dtsi b/dts/arm/st/l4/stm32l4.dtsi
index 0c4f3c2d576c..513412804bab 100644
--- a/dts/arm/st/l4/stm32l4.dtsi
+++ b/dts/arm/st/l4/stm32l4.dtsi
@@ -558,3 +558,26 @@
 &nvic {
 	arm,num-irq-priority-bits = <4>;
 };
+
+/* Define by default the wkup pins for all the stm32L4. Adapt if needed. */
+&pwr {
+	wkup-pin@1 {
+		wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
+	};
+
+	wkup-pin@2 {
+		wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
+	};
+
+	wkup-pin@3 {
+		wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_SRC_0>;
+	};
+
+	wkup-pin@4 {
+		wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_SRC_0>;
+	};
+
+	wkup-pin@5 {
+		wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_SRC_0>;
+	};
+};
diff --git a/dts/arm/st/l4/stm32l412.dtsi b/dts/arm/st/l4/stm32l412.dtsi
index 69c26d848aa9..1daf3c5eb95f 100644
--- a/dts/arm/st/l4/stm32l412.dtsi
+++ b/dts/arm/st/l4/stm32l412.dtsi
@@ -85,3 +85,7 @@
 		status = "disabled";
 	};
 };
+
+&pwr {
+	/delete-node/ wkup-pin@3;
+};
diff --git a/dts/arm/st/l4/stm32l432.dtsi b/dts/arm/st/l4/stm32l432.dtsi
index 138942cd77ff..e38f3b81cb93 100644
--- a/dts/arm/st/l4/stm32l432.dtsi
+++ b/dts/arm/st/l4/stm32l432.dtsi
@@ -96,3 +96,9 @@
 		#phy-cells = <0>;
 	};
 };
+
+&pwr {
+	/delete-node/ wkup-pin@2;
+	/delete-node/ wkup-pin@3;
+	/delete-node/ wkup-pin@5;
+};
diff --git a/dts/arm/st/l4/stm32l4r5Xi.dtsi b/dts/arm/st/l4/stm32l4r5Xi.dtsi
index 5da6f035e769..13eddd4261f8 100644
--- a/dts/arm/st/l4/stm32l4r5Xi.dtsi
+++ b/dts/arm/st/l4/stm32l4r5Xi.dtsi
@@ -17,25 +17,3 @@
 		};
 	};
 };
-
-&pwr {
-	wkup-pin@1 {
-		wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
-	};
-
-	wkup-pin@2 {
-		wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
-	};
-
-	wkup-pin@3 {
-		wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_SRC_0>;
-	};
-
-	wkup-pin@4 {
-		wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_SRC_0>;
-	};
-
-	wkup-pin@5 {
-		wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_SRC_0>;
-	};
-};