ARM Cortex-M4: Semaphores could not be used in ISRs with priority 0?

[eugmes]

Describe the bug
The documentations says that semaphores could be used from ISRs if they don't block. When I'm trying to use them from ISRs I'm sometimes getting assertion failures with message "recursive spinlock" with address of sem.c:lock (nrfconnect/sdk-nrf#3003 (comment)).

From reading the documentation for BASEPRI register I understand that it cannot be used alone to block priority-0 ISRs, this would break spin locks used from such interrupts.

I would like to clarify if my suspicion is correct, and if so, the limitation be documented somewhere.

Expected behavior
Semaphores could be used from all ISR priorities as documented.

Impact
In my case I can avoid using semaphores from ISRs.

[eugmes]

I guess these are zero latency IRQs so they should not be used with kernel APIs. Still, I wonder how many other people will overlook that...