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mec15xxevb_assy6853:running samples/boards/mec15xxevb_assy6853/power_management Sleep entry latency is higher than expected #29330
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This is a sample that runs without any tests, so it will run until it times out. With regard to "latency is higher than expected", not sure what is the expecation here, this is a sample that just spits some text out, what are we testing for here exactly? When did this start to fail? Was it always like this? |
@maksimmasalski regarding @nashif question, what is the latency issue here ? Is there any time constraint that this test is not achieving because of pm ? |
@ceolin I checked the code, I found out that someone changed original value, should be less than 300, but in code is 500 ms, that also doesn't help, because now it is even more than 500ms.
In fact I don't know who defined Maximum latency threshold. Why is 500? Why is 300? Tmrw I will clarify that. |
@scottwcpg |
@maksimmasalski |
Thank you for you detailed answer. Based upon your reply I understand that is not an issue, just the hardware special aspects. |
@scottwcpg the test is running with no host attached (no eSPI traffic) so only UART and even though other drivers are enabled, there is no activity. Nevertheless, the "latency" referred that the original test intended to measure was not consider SoC time to enter sleep. @ceolin @wentongwu @nashif please correct if my understanding of the power management subsystem hooks below is not correct. Test sequence
FYI Time between point 7 to point 9 for deep sleep is < 100 ms |
I may be wrong, but I think there is one thing not considered here. The logging subsys has it is own thread that may be scheduled after your thread call k_msleep() avoiding the idle thread of immediately run and as uptime_get() is collected before it the delta calculated when your thread wake up may be greater than expected. |
Agreed @ceolin. I just tried last night, disabling logging (CONFIG_LOG=Y) reduces this latency considerably to few ms. |
I am not aware about this in the previous work. But that is definitely something that we need to be aware. |
@albertofloyd Is it a real issue, or seems like just wrong CONFIG setup? |
I don't think CONFIG_LOG=y is mutually exclusive with PM enabled, is it? |
That means if CONFIG_LOG enabled, logging thread not aware of sleep states and impacts on them. Right? |
@albertofloyd You said that actual test was designed to ensure PM was evaluated with and without logging. That sample demonstrates it and works. @albertofloyd @ceolin Do you think that we can close that issue for now? |
We definitely have a problem that is the log subsystem not be power awareness. IMHO we should close this issue and open a new one about it. |
Moved to #30121 |
Describe the bug
Running samples/boards/mec15xxevb_assy6853/power_management failed. Sleep entry latency is higher than expected
To Reproduce
Steps to reproduce the behavior:
sanitycheck --hardware-map ~/mec1.file --device-testing -T samples/boards/mec15xxevb_assy6853/power_management -vv
Expected behavior
Sleep entry latency shouldn't be higher than expected. Test suite must not fail due to timeout in sanitycheck, caused by its forever loop. Seems, like that sample was not designed to be run in sanitycheck. When I run that sample in west, it can't come to the end.
Impact
Can't use sample in sanitycheck
Logs and console output
Environment (please complete the following information):
Additional context
Add any other context about the problem here.
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