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Cortex-M: vector table relocation is incorrect with XIP=n #31235

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GrixaYrev opened this issue Jan 11, 2021 · 7 comments · Fixed by #31872
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Cortex-M: vector table relocation is incorrect with XIP=n #31235

GrixaYrev opened this issue Jan 11, 2021 · 7 comments · Fixed by #31872
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area: ARM ARM (32-bit) Architecture bug The issue is a bug, or the PR is fixing a bug priority: low Low impact/importance bug

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@GrixaYrev
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GrixaYrev commented Jan 11, 2021

Describe the bug
In first, everything bellow is actual for case CONFIG_CPU_CORTEX_M_HAS_VTOR=y.
CortexM vector table relocate to SRAM start when CONFIG_XIP is not defined (see arch\arm\core\aarch32\prep_c.c:50).
But vector table can be placed with some offset, for example in i.MX RT.
So it is not possible to use non XIP application with i.MX RT boot header.

To Reproduce

  1. i.MX RT1052
  2. CONFIG_NXP_IMX_RT_BOOT_HEADER=y
  3. CONFIG_XIP=n
  4. Runtime error

Expected behavior
Definition VECTOR_ADDRESS is set to _vector_start in arch\arm\core\aarch32\prep_c.c:48 if CONFIG_XIP=y.
But _vector_start is declared in arch\arm\core\aarch32\vector_table.ld, which in turn is added to linker script in CMakeLists.txt unconditional.
So it is possible to set VECTOR_ADDRESS equal _vector_start unconditionally also (if CONFIG_CPU_CORTEX_M_HAS_VTOR=y, of course).

Impact
Showstopper

Environment:

Additional context
It is not possible to set CONFIG_XIP=y and CONFIG_FLASH_BASE_ADDRESS=CONFIG_SRAM_BASE_ADDRESS, because .text and .bss sections will be overlapped. So CONFIG_XIP=n is required.

@GrixaYrev GrixaYrev added the bug The issue is a bug, or the PR is fixing a bug label Jan 11, 2021
@nashif nashif added priority: low Low impact/importance bug area: ARM ARM (32-bit) Architecture labels Jan 12, 2021
@ioannisg
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ioannisg commented Feb 1, 2021

Will take a look

@ioannisg
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ioannisg commented Feb 2, 2021

Looks like the case with CPU_HAS_VTOR=y and XIP=n has not been changed, since it was originally introduced long time ago, in #5988

I wonder why this had never been a problem until now.

EDIT: it actually goes further back to https://github.com/tagunil/zephyr-for-patches/commit/6782c3ea236b737389dd6df1d361dfdfd6d910a2

EDIT: dates back to https://github.com/tagunil/zephyr-for-patches/commit/4465cf47e9cdccd7772b8a1e16a2b10ceba989ab

@ioannisg ioannisg changed the title CortexM vector table relocation is incorrect when non XIP Cortex-M: vector table relocation is incorrect with XIP=n Feb 2, 2021
@ioannisg
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ioannisg commented Feb 2, 2021

@GrixaYrev is there some specific in-tree sample or test you want to run with XIP=n

@ioannisg
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ioannisg commented Feb 2, 2021

@GrixaYrev #31872 , please, see if this simple fix makes sense.

@GrixaYrev
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@ioannisg is not, I use my custom project. In additional VTOR it is need to set custom MPU regions, because SRAM is not executable by default in zephyr\soc\arm\common\cortex_m\arm_mpu_regions.c.

@ioannisg
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ioannisg commented Feb 2, 2021

@ioannisg is not, I use my custom project. In additional VTOR it is need to set custom MPU regions, because SRAM is not executable by default in zephyr\soc\arm\common\cortex_m\arm_mpu_regions.c.

OK, fine but this is another issue - not part of the ticket here.
(FYI vector table fetches do not suffer from MPU settings)

I wanted to check with you whether #31872 is in the right direction, in your opinion.

@GrixaYrev
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@GrixaYrev #31872 , please, see if this simple fix makes sense.

@ioannisg, I have tested ioannisg:arch_arm_cortex_m_non_xip_vector_fix, it's OK. VTOR have actual value now, i have checked with jLink debugger on i.MX RT1052.

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Labels
area: ARM ARM (32-bit) Architecture bug The issue is a bug, or the PR is fixing a bug priority: low Low impact/importance bug
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