From 3d025d7b9c53253f7c384c8eea230288fb8ac78e Mon Sep 17 00:00:00 2001 From: Yannis Damigos Date: Wed, 3 Oct 2018 15:58:29 +0300 Subject: [PATCH 1/4] dts: bindings: Add yaml files for PHY subsystem Add yaml file for initial support of USB PHYs. It adds also yaml files for STM32 USBPHYC and USB controllers with embedded PHY. PHY refers to the physical layer which is used to connect a device to the physical medium e.g. USB controller. Origin: original Signed-off-by: Yannis Damigos --- dts/bindings/phy/phy.yaml | 29 ++++++++++++++++++++++++++ dts/bindings/phy/st,stm32-usbphyc.yaml | 28 +++++++++++++++++++++++++ dts/bindings/phy/usb-nop-xceiv.yaml | 23 ++++++++++++++++++++ 3 files changed, 80 insertions(+) create mode 100644 dts/bindings/phy/phy.yaml create mode 100644 dts/bindings/phy/st,stm32-usbphyc.yaml create mode 100644 dts/bindings/phy/usb-nop-xceiv.yaml diff --git a/dts/bindings/phy/phy.yaml b/dts/bindings/phy/phy.yaml new file mode 100644 index 000000000000..f452a8130faa --- /dev/null +++ b/dts/bindings/phy/phy.yaml @@ -0,0 +1,29 @@ +# +# Copyright (c) 2018, Yannis Damigos +# +# SPDX-License-Identifier: Apache-2.0 +# +--- +title: PHY Base Structure +version: 0.1 + +description: > + This binding gives the base structures for all PHY providers + +properties: + compatible: + type: string + category: required + description: compatible strings + generation: define + "#phy-cells": + type: int + category: required + description: Number of cells in a PHY provider. The meaning those + cells is defined by the binding for the phy node. + label: + type: string + category: required + description: Human readable string describing the device (used by Zephyr for API name) + generation: define +... diff --git a/dts/bindings/phy/st,stm32-usbphyc.yaml b/dts/bindings/phy/st,stm32-usbphyc.yaml new file mode 100644 index 000000000000..ac90a9ca00b6 --- /dev/null +++ b/dts/bindings/phy/st,stm32-usbphyc.yaml @@ -0,0 +1,28 @@ +# +# Copyright (c) 2018, Yannis Damigos +# +# SPDX-License-Identifier: Apache-2.0 +# +--- +title: STM32 USB HS PHY +version: 0.1 + +description: > + This binding gives a base representation of the STM32 USB HS PHY controller + +inherits: + !include phy.yaml + +properties: + compatible: + constraint: "st,stm32-usbphyc" + + reg: + type: array + description: address and length of the usb phy control register set + generation: define + category: required + + "phy-cells": + description: should be 0 +... diff --git a/dts/bindings/phy/usb-nop-xceiv.yaml b/dts/bindings/phy/usb-nop-xceiv.yaml new file mode 100644 index 000000000000..1cc5a37ae715 --- /dev/null +++ b/dts/bindings/phy/usb-nop-xceiv.yaml @@ -0,0 +1,23 @@ +# +# Copyright (c) 2018, Yannis Damigos +# +# SPDX-License-Identifier: Apache-2.0 +# +--- +title: NOP USB Transceiver +version: 0.1 + +description: > + This binding is to be used by all the usb transceivers which are built-in + with USB IP + +inherits: + !include phy.yaml + +properties: + compatible: + constraint: "usb-nop-xceiv" + + "phy-cells": + description: should be 0 +... From a81f583ce8dffb8acec816918230fac18f5b9c2c Mon Sep 17 00:00:00 2001 From: Yannis Damigos Date: Wed, 3 Oct 2018 16:38:53 +0300 Subject: [PATCH 2/4] dts/bindings/usb: Add phys property to STM32 USB yaml Add phys property, which specifies USB PHY provider, to STM32 USB yaml files. Signed-off-by: Yannis Damigos --- dts/bindings/usb/st,stm32-otgfs.yaml | 6 ++++++ dts/bindings/usb/st,stm32-otghs.yaml | 6 ++++++ dts/bindings/usb/st,stm32-usb.yaml | 6 ++++++ 3 files changed, 18 insertions(+) diff --git a/dts/bindings/usb/st,stm32-otgfs.yaml b/dts/bindings/usb/st,stm32-otgfs.yaml index 70d79fc7dd8f..ca2b07666779 100644 --- a/dts/bindings/usb/st,stm32-otgfs.yaml +++ b/dts/bindings/usb/st,stm32-otgfs.yaml @@ -41,4 +41,10 @@ properties: description: Size of USB dedicated RAM. STM32 SOC's reference manual defines a shared FIFO size. generation: define + + phys: + type: array + category: optional + generation: define + description: PHY provider specifier ... diff --git a/dts/bindings/usb/st,stm32-otghs.yaml b/dts/bindings/usb/st,stm32-otghs.yaml index 98c567753445..cc387f76bce3 100644 --- a/dts/bindings/usb/st,stm32-otghs.yaml +++ b/dts/bindings/usb/st,stm32-otghs.yaml @@ -41,4 +41,10 @@ properties: description: Size of USB dedicated RAM. STM32 SOC's reference manual defines a shared FIFO size. generation: define + + phys: + type: array + category: optional + generation: define + description: PHY provider specifier ... diff --git a/dts/bindings/usb/st,stm32-usb.yaml b/dts/bindings/usb/st,stm32-usb.yaml index cba616ce557a..140e55e37c10 100644 --- a/dts/bindings/usb/st,stm32-usb.yaml +++ b/dts/bindings/usb/st,stm32-usb.yaml @@ -48,4 +48,10 @@ properties: description: Some boards use a USB DISCONNECT pin to enable the pull-up resistor on USB Data Positive signal. generation: define, use-prop-name + + phys: + type: array + category: optional + generation: define + description: PHY provider specifier ... From 69c528fdab6e4822864473d9a0c772d36ef8415f Mon Sep 17 00:00:00 2001 From: Yannis Damigos Date: Wed, 3 Oct 2018 17:19:59 +0300 Subject: [PATCH 3/4] dts: st: Add USB PHY nodes Add USB phy nodes and phys property in USB nodes. Signed-off-by: Yannis Damigos --- dts/arm/st/f0/stm32f070.dtsi | 7 +++++++ dts/arm/st/f0/stm32f072.dtsi | 7 +++++++ dts/arm/st/f1/stm32f103X8.dtsi | 7 +++++++ dts/arm/st/f1/stm32f103Xb.dtsi | 7 +++++++ dts/arm/st/f2/stm32f2.dtsi | 7 +++++++ dts/arm/st/f3/stm32f3.dtsi | 7 +++++++ dts/arm/st/f4/stm32f4.dtsi | 7 +++++++ dts/arm/st/f4/stm32f405.dtsi | 7 +++++++ dts/arm/st/f4/stm32f446.dtsi | 7 +++++++ dts/arm/st/f7/stm32f7.dtsi | 14 ++++++++++++++ dts/arm/st/f7/stm32f723.dtsi | 11 +++++++++++ dts/arm/st/l0/stm32l072.dtsi | 7 +++++++ dts/arm/st/l0/stm32l073.dtsi | 7 +++++++ dts/arm/st/l4/stm32l432.dtsi | 7 +++++++ dts/arm/st/l4/stm32l475.dtsi | 7 +++++++ dts/arm/st/l4/stm32l4r5.dtsi | 7 +++++++ 16 files changed, 123 insertions(+) diff --git a/dts/arm/st/f0/stm32f070.dtsi b/dts/arm/st/f0/stm32f070.dtsi index 1c81916fd0fe..d7d437ce67cc 100644 --- a/dts/arm/st/f0/stm32f070.dtsi +++ b/dts/arm/st/f0/stm32f070.dtsi @@ -19,6 +19,12 @@ label = "SPI_2"; }; + usb_fs_phy: usbphy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "USB_FS_PHY"; + }; + usb: usb@40005c00 { compatible = "st,stm32-usb"; reg = <0x40005c00 0x400>; @@ -26,6 +32,7 @@ interrupt-names = "usb"; num-bidir-endpoints = <8>; ram-size = <1024>; + phys = <&usb_fs_phy>; status = "disabled"; label= "USB"; }; diff --git a/dts/arm/st/f0/stm32f072.dtsi b/dts/arm/st/f0/stm32f072.dtsi index 2bc1e96b0640..a1f478556380 100644 --- a/dts/arm/st/f0/stm32f072.dtsi +++ b/dts/arm/st/f0/stm32f072.dtsi @@ -47,6 +47,12 @@ label = "SPI_2"; }; + usb_fs_phy: usbphy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "USB_FS_PHY"; + }; + usb: usb@40005c00 { compatible = "st,stm32-usb"; reg = <0x40005c00 0x400>; @@ -54,6 +60,7 @@ interrupt-names = "usb"; num-bidir-endpoints = <8>; ram-size = <1024>; + phys = <&usb_fs_phy>; status = "disabled"; label= "USB"; }; diff --git a/dts/arm/st/f1/stm32f103X8.dtsi b/dts/arm/st/f1/stm32f103X8.dtsi index 63dd224fba8f..8f62ffcdb836 100644 --- a/dts/arm/st/f1/stm32f103X8.dtsi +++ b/dts/arm/st/f1/stm32f103X8.dtsi @@ -31,6 +31,12 @@ label = "SPI_2"; }; + usb_fs_phy: usbphy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "USB_FS_PHY"; + }; + usb: usb@40005c00 { compatible = "st,stm32-usb"; reg = <0x40005c00 0x400>; @@ -39,6 +45,7 @@ num-bidir-endpoints = <8>; ram-size = <512>; status = "disabled"; + phys = <&usb_fs_phy>; label= "USB"; }; }; diff --git a/dts/arm/st/f1/stm32f103Xb.dtsi b/dts/arm/st/f1/stm32f103Xb.dtsi index 525f36592a49..65491951a637 100644 --- a/dts/arm/st/f1/stm32f103Xb.dtsi +++ b/dts/arm/st/f1/stm32f103Xb.dtsi @@ -33,6 +33,12 @@ label = "SPI_2"; }; + usb_fs_phy: usbphy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "USB_FS_PHY"; + }; + usb: usb@40005c00 { compatible = "st,stm32-usb"; reg = <0x40005c00 0x400>; @@ -40,6 +46,7 @@ interrupt-names = "usb"; num-bidir-endpoints = <8>; ram-size = <512>; + phys = <&usb_fs_phy>; status = "disabled"; label= "USB"; }; diff --git a/dts/arm/st/f2/stm32f2.dtsi b/dts/arm/st/f2/stm32f2.dtsi index a8c1f8b20136..64c2cc21760b 100644 --- a/dts/arm/st/f2/stm32f2.dtsi +++ b/dts/arm/st/f2/stm32f2.dtsi @@ -194,6 +194,12 @@ label = "UART_5"; }; + otgfs_phy: otgfs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGFS_PHY"; + }; + usbotg_fs: usb@50000000 { compatible = "st,stm32-otgfs"; reg = <0x50000000 0x40000>; @@ -202,6 +208,7 @@ num-bidir-endpoints = <4>; ram-size = <1280>; maximum-speed = "full-speed"; + phys = <&otgfs_phy>; status = "disabled"; label = "OTGFS"; }; diff --git a/dts/arm/st/f3/stm32f3.dtsi b/dts/arm/st/f3/stm32f3.dtsi index ad3646563f93..f590bbb4a8e0 100644 --- a/dts/arm/st/f3/stm32f3.dtsi +++ b/dts/arm/st/f3/stm32f3.dtsi @@ -154,6 +154,12 @@ label = "SPI_1"; }; + usb_fs_phy: usbphy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "USB_FS_PHY"; + }; + usb: usb@40005c00 { compatible = "st,stm32-usb"; reg = <0x40005c00 0x400>; @@ -161,6 +167,7 @@ interrupt-names = "usb"; num-bidir-endpoints = <8>; ram-size = <512>; + phys = <&usb_fs_phy>; status = "disabled"; label= "USB"; }; diff --git a/dts/arm/st/f4/stm32f4.dtsi b/dts/arm/st/f4/stm32f4.dtsi index 33e67250641d..63c39592397c 100644 --- a/dts/arm/st/f4/stm32f4.dtsi +++ b/dts/arm/st/f4/stm32f4.dtsi @@ -201,6 +201,12 @@ label = "I2S_1"; }; + otgfs_phy: otgfs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGFS_PHY"; + }; + usbotg_fs: usb@50000000 { compatible = "st,stm32-otgfs"; reg = <0x50000000 0x40000>; @@ -209,6 +215,7 @@ num-bidir-endpoints = <4>; ram-size = <1280>; maximum-speed = "full-speed"; + phys = <&otgfs_phy>; status = "disabled"; label= "OTGFS"; }; diff --git a/dts/arm/st/f4/stm32f405.dtsi b/dts/arm/st/f4/stm32f405.dtsi index 1f2f3a1c7c61..ae356a12fbdc 100644 --- a/dts/arm/st/f4/stm32f405.dtsi +++ b/dts/arm/st/f4/stm32f405.dtsi @@ -163,6 +163,12 @@ }; }; + otghs_fs_phy: otghs_fs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGHS_FS_PHY"; + }; + usbotg_hs: usb@40040000 { compatible = "st,stm32-otghs", "st,stm32-otgfs"; reg = <0x40040000 0x40000>; @@ -171,6 +177,7 @@ num-bidir-endpoints = <6>; ram-size = <4096>; maximum-speed = "full-speed"; + phys = <&otghs_fs_phy>; status = "disabled"; label= "OTGHS"; }; diff --git a/dts/arm/st/f4/stm32f446.dtsi b/dts/arm/st/f4/stm32f446.dtsi index fe05ffc6f090..63648f9add7c 100644 --- a/dts/arm/st/f4/stm32f446.dtsi +++ b/dts/arm/st/f4/stm32f446.dtsi @@ -12,6 +12,12 @@ num-bidir-endpoints = <6>; }; + otghs_fs_phy: otghs_fs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGHS_FS_PHY"; + }; + usbotg_hs: usb@40040000 { compatible = "st,stm32-otghs", "st,stm32-otgfs"; reg = <0x40040000 0x40000>; @@ -20,6 +26,7 @@ num-bidir-endpoints = <9>; ram-size = <4096>; maximum-speed = "full-speed"; + phys = <&otghs_fs_phy>; status = "disabled"; label= "OTGHS"; }; diff --git a/dts/arm/st/f7/stm32f7.dtsi b/dts/arm/st/f7/stm32f7.dtsi index b85ca287ae4f..272b150fd8dc 100644 --- a/dts/arm/st/f7/stm32f7.dtsi +++ b/dts/arm/st/f7/stm32f7.dtsi @@ -531,6 +531,12 @@ }; }; + otgfs_phy: otgfs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGFS_PHY"; + }; + usbotg_fs: usb@50000000 { compatible = "st,stm32-otgfs"; reg = <0x50000000 0x40000>; @@ -539,10 +545,17 @@ num-bidir-endpoints = <6>; ram-size = <1280>; maximum-speed = "full-speed"; + phys = <&otgfs_phy>; status = "disabled"; label = "OTGFS"; }; + otghs_fs_phy: otghs_fs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGHS_FS_PHY"; + }; + usbotg_hs: usb@40040000 { compatible = "st,stm32-otghs", "st,stm32-otgfs"; reg = <0x40040000 0x40000>; @@ -551,6 +564,7 @@ num-bidir-endpoints = <9>; ram-size = <4096>; maximum-speed = "full-speed"; + phys = <&otghs_fs_phy>; status = "disabled"; label= "OTGHS"; }; diff --git a/dts/arm/st/f7/stm32f723.dtsi b/dts/arm/st/f7/stm32f723.dtsi index ed6be6f48f56..e889147a0439 100644 --- a/dts/arm/st/f7/stm32f723.dtsi +++ b/dts/arm/st/f7/stm32f723.dtsi @@ -8,8 +8,19 @@ / { soc { + usbphyc: usbphyc@40017c00 { + compatible = "st,stm32-usbphyc"; + reg = <0x40017c00 0x400>; + #phy-cells = <0>; + label = "USBPHYC"; + }; + usbotg_hs: usb@40040000 { + phys = <&usbphyc>; maximum-speed = "high-speed"; }; }; + }; + +/delete-node/ &otghs_fs_phy; diff --git a/dts/arm/st/l0/stm32l072.dtsi b/dts/arm/st/l0/stm32l072.dtsi index 629d04f93847..1715789bdfb8 100644 --- a/dts/arm/st/l0/stm32l072.dtsi +++ b/dts/arm/st/l0/stm32l072.dtsi @@ -57,6 +57,12 @@ label = "SPI_2"; }; + otgfs_phy: otgfs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGFS_PHY"; + }; + usb: usb@40005c00 { compatible = "st,stm32-usb"; reg = <0x40005c00 0x400>; @@ -64,6 +70,7 @@ interrupt-names = "usb"; num-bidir-endpoints = <8>; ram-size = <1024>; + phys = <&otgfs_phy>; status = "disabled"; label= "USB"; }; diff --git a/dts/arm/st/l0/stm32l073.dtsi b/dts/arm/st/l0/stm32l073.dtsi index 64152033e352..c9a522a65275 100644 --- a/dts/arm/st/l0/stm32l073.dtsi +++ b/dts/arm/st/l0/stm32l073.dtsi @@ -56,6 +56,12 @@ label = "SPI_2"; }; + otgfs_phy: otgfs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGFS_PHY"; + }; + usb: usb@40005c00 { compatible = "st,stm32-usb"; reg = <0x40005c00 0x400>; @@ -63,6 +69,7 @@ interrupt-names = "usb"; num-bidir-endpoints = <8>; ram-size = <1024>; + phys = <&otgfs_phy>; status = "disabled"; label= "USB"; }; diff --git a/dts/arm/st/l4/stm32l432.dtsi b/dts/arm/st/l4/stm32l432.dtsi index 90e046ef4c6f..55be4a0a7ff7 100644 --- a/dts/arm/st/l4/stm32l432.dtsi +++ b/dts/arm/st/l4/stm32l432.dtsi @@ -8,6 +8,12 @@ / { soc { + otgfs_phy: otgfs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGFS_PHY"; + }; + usb: usb@40006800 { compatible = "st,stm32-usb"; reg = <0x40006800 0x40000>; @@ -15,6 +21,7 @@ interrupt-names = "usb"; num-bidir-endpoints = <8>; ram-size = <1024>; + phys = <&otgfs_phy>; status = "disabled"; label = "USB"; }; diff --git a/dts/arm/st/l4/stm32l475.dtsi b/dts/arm/st/l4/stm32l475.dtsi index 8953979a7843..fa7db495fec4 100644 --- a/dts/arm/st/l4/stm32l475.dtsi +++ b/dts/arm/st/l4/stm32l475.dtsi @@ -89,6 +89,12 @@ label = "SPI_3"; }; + otgfs_phy: otgfs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGFS_PHY"; + }; + usbotg_fs: otgfs@50000000 { compatible = "st,stm32-otgfs"; reg = <0x50000000 0x40000>; @@ -97,6 +103,7 @@ num-bidir-endpoints = <6>; ram-size = <1280>; maximum-speed = "full-speed"; + phys = <&otgfs_phy>; status = "disabled"; label= "OTGFS"; }; diff --git a/dts/arm/st/l4/stm32l4r5.dtsi b/dts/arm/st/l4/stm32l4r5.dtsi index 27d99a173e74..bbd37fe78f38 100644 --- a/dts/arm/st/l4/stm32l4r5.dtsi +++ b/dts/arm/st/l4/stm32l4r5.dtsi @@ -98,6 +98,12 @@ label = "SPI_3"; }; + otgfs_phy: otgfs_phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + label = "OTGFS_PHY"; + }; + usbotg_fs: otgfs@50000000 { compatible = "st,stm32-otgfs"; reg = <0x50000000 0x40000>; @@ -106,6 +112,7 @@ num-bidir-endpoints = <6>; ram-size = <1280>; maximum-speed = "full-speed"; + phys = <&otgfs_phy>; status = "disabled"; label= "OTGFS"; }; From 918015b96b6cf7162c71d5f19d5301b19bad415d Mon Sep 17 00:00:00 2001 From: Yannis Damigos Date: Mon, 15 Oct 2018 21:55:15 +0300 Subject: [PATCH 4/4] drivers: usb_dc_stm32: Use DT to check if USBPHYC exists Use DT to check if SoC has a USBPHYC controller. Signed-off-by: Yannis Damigos --- drivers/usb/device/usb_dc_stm32.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/usb/device/usb_dc_stm32.c b/drivers/usb/device/usb_dc_stm32.c index 38cdbdae38bc..314026b4bc3c 100644 --- a/drivers/usb/device/usb_dc_stm32.c +++ b/drivers/usb/device/usb_dc_stm32.c @@ -258,14 +258,14 @@ static int usb_dc_stm32_clock_enable(void) #ifdef DT_USB_HS_BASE_ADDRESS -#ifdef USB_HS_PHYC +#ifdef DT_COMPAT_ST_STM32_USBPHYC LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_OTGHSULPI); LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_OTGPHYC); #else /* Disable ULPI interface (for external high-speed PHY) clock */ LL_AHB1_GRP1_DisableClock(LL_AHB1_GRP1_PERIPH_OTGHSULPI); LL_AHB1_GRP1_DisableClockLowPower(LL_AHB1_GRP1_PERIPH_OTGHSULPI); -#endif /* USB_HS_PHYC */ +#endif /* DT_COMPAT_ST_STM32_USBPHYC */ #endif /* DT_USB_HS_BASE_ADDRESS */ @@ -279,22 +279,22 @@ static u32_t usb_dc_stm32_get_maximum_speed(void) * If max-speed is not passed via DT, set it to USB controller's * maximum hardware capability. */ -#if defined(USB_HS_PHYC) && defined(DT_USB_HS_BASE_ADDRESS) +#if defined(DT_COMPAT_ST_STM32_USBPHYC) && defined(DT_USB_HS_BASE_ADDRESS) u32_t speed = USB_OTG_SPEED_HIGH; #else u32_t speed = USB_OTG_SPEED_FULL; -#endif /* USB_HS_PHYC && DT_USB_HS_BASE_ADDRESS */ +#endif /* DT_COMPAT_ST_STM32_USBPHYC && DT_USB_HS_BASE_ADDRESS */ #ifdef DT_USB_MAXIMUM_SPEED if (!strncmp(DT_USB_MAXIMUM_SPEED, "high-speed", 10)) { speed = USB_OTG_SPEED_HIGH; } else if (!strncmp(DT_USB_MAXIMUM_SPEED, "full-speed", 10)) { -#if defined(USB_HS_PHYC) && defined(DT_USB_HS_BASE_ADDRESS) +#if defined(DT_COMPAT_ST_STM32_USBPHYC) && defined(DT_USB_HS_BASE_ADDRESS) speed = USB_OTG_SPEED_HIGH_IN_FULL; #else speed = USB_OTG_SPEED_FULL; -#endif /* USB_HS_PHYC && DT_USB_HS_BASE_ADDRESS */ +#endif /* DT_COMPAT_ST_STM32_USBPHYC && DT_USB_HS_BASE_ADDRESS */ } else if (!strncmp(DT_USB_MAXIMUM_SPEED, "low-speed", 9)) { speed = USB_OTG_SPEED_LOW; } else { @@ -328,11 +328,11 @@ static int usb_dc_stm32_init(void) #endif usb_dc_stm32_state.pcd.Init.dev_endpoints = DT_USB_NUM_BIDIR_ENDPOINTS; usb_dc_stm32_state.pcd.Init.speed = usb_dc_stm32_get_maximum_speed(); -#if defined(USB_HS_PHYC) && defined(DT_USB_HS_BASE_ADDRESS) +#if defined(DT_COMPAT_ST_STM32_USBPHYC) && defined(DT_USB_HS_BASE_ADDRESS) usb_dc_stm32_state.pcd.Init.phy_itface = USB_OTG_HS_EMBEDDED_PHY; #else usb_dc_stm32_state.pcd.Init.phy_itface = PCD_PHY_EMBEDDED; -#endif /* USB_HS_PHYC */ +#endif /* DT_COMPAT_ST_STM32_USBPHYC */ usb_dc_stm32_state.pcd.Init.ep0_mps = USB_OTG_MAX_EP0_SIZE; usb_dc_stm32_state.pcd.Init.vbus_sensing_enable = DISABLE;