diff --git a/boards/arm/nucleo_f207zg/nucleo_f207zg.dts b/boards/arm/nucleo_f207zg/nucleo_f207zg.dts index 32cebcca8b43..f36a94683668 100644 --- a/boards/arm/nucleo_f207zg/nucleo_f207zg.dts +++ b/boards/arm/nucleo_f207zg/nucleo_f207zg.dts @@ -83,6 +83,15 @@ &mac { status = "okay"; + pinctrl-0 = <ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_ref_clk_pa1 + ð_mdio_pa2 + ð_crs_dv_pa7 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pb13>; }; &dac1 { diff --git a/boards/arm/nucleo_f207zg/pinmux.c b/boards/arm/nucleo_f207zg/pinmux.c index 8839316c4c5e..5b050bb36a73 100644 --- a/boards/arm/nucleo_f207zg/pinmux.c +++ b/boards/arm/nucleo_f207zg/pinmux.c @@ -14,19 +14,6 @@ /* pin assignments for NUCLEO-F207ZG board */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET - {STM32_PIN_PC1, STM32F2_PINMUX_FUNC_PC1_ETH}, - {STM32_PIN_PC4, STM32F2_PINMUX_FUNC_PC4_ETH}, - {STM32_PIN_PC5, STM32F2_PINMUX_FUNC_PC5_ETH}, - - {STM32_PIN_PA1, STM32F2_PINMUX_FUNC_PA1_ETH}, - {STM32_PIN_PA2, STM32F2_PINMUX_FUNC_PA2_ETH}, - {STM32_PIN_PA7, STM32F2_PINMUX_FUNC_PA7_ETH}, - - {STM32_PIN_PG11, STM32F2_PINMUX_FUNC_PG11_ETH}, - {STM32_PIN_PG13, STM32F2_PINMUX_FUNC_PG13_ETH}, - {STM32_PIN_PB13, STM32F2_PINMUX_FUNC_PB13_ETH}, -#endif #ifdef CONFIG_USB_DC_STM32 {STM32_PIN_PA11, STM32F2_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA12, STM32F2_PINMUX_FUNC_PA12_OTG_FS_DP}, diff --git a/boards/arm/nucleo_f429zi/nucleo_f429zi.dts b/boards/arm/nucleo_f429zi/nucleo_f429zi.dts index 17b36b379516..33953bffbf14 100644 --- a/boards/arm/nucleo_f429zi/nucleo_f429zi.dts +++ b/boards/arm/nucleo_f429zi/nucleo_f429zi.dts @@ -109,6 +109,15 @@ &mac { status = "okay"; + pinctrl-0 = <ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_ref_clk_pa1 + ð_mdio_pa2 + ð_crs_dv_pa7 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pb13>; }; &flash0 { diff --git a/boards/arm/nucleo_f429zi/pinmux.c b/boards/arm/nucleo_f429zi/pinmux.c index fc140b2d7b3c..a28ec89405e7 100644 --- a/boards/arm/nucleo_f429zi/pinmux.c +++ b/boards/arm/nucleo_f429zi/pinmux.c @@ -14,19 +14,6 @@ /* pin assignments for NUCLEO-F429ZI board */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET - {STM32_PIN_PC1, STM32F4_PINMUX_FUNC_PC1_ETH}, - {STM32_PIN_PC4, STM32F4_PINMUX_FUNC_PC4_ETH}, - {STM32_PIN_PC5, STM32F4_PINMUX_FUNC_PC5_ETH}, - - {STM32_PIN_PA1, STM32F4_PINMUX_FUNC_PA1_ETH}, - {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_ETH}, - {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_ETH}, - - {STM32_PIN_PG11, STM32F4_PINMUX_FUNC_PG11_ETH}, - {STM32_PIN_PG13, STM32F4_PINMUX_FUNC_PG13_ETH}, - {STM32_PIN_PB13, STM32F4_PINMUX_FUNC_PB13_ETH}, -#endif #ifdef CONFIG_USB_DC_STM32 {STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA12, STM32F4_PINMUX_FUNC_PA12_OTG_FS_DP}, diff --git a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts index 253650b6691f..ad5677431487 100644 --- a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts +++ b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts @@ -9,6 +9,13 @@ #include #include "arduino_r3_connector.dtsi" +/* + * WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL. + * If you require both peripherals, and you do not need Arduino Uno v3 + * comaptability, the pin PB5 (also on ST Zio connector) can be used + * for the SPI_1 MOSI signal. + */ + / { model = "STMicroelectronics STM32F746ZG-NUCLEO board"; compatible = "st,stm32f746zg-nucleo"; @@ -94,10 +101,6 @@ &spi1 { pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>; - /* - * WARNING: The pin PA7 will conflict on selection of SPI_1 and - * ETH_STM32_HAL. - */ status = "okay"; }; @@ -130,4 +133,13 @@ &mac { status = "okay"; + pinctrl-0 = <ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_ref_clk_pa1 + ð_mdio_pa2 + ð_crs_dv_pa7 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pb13>; }; diff --git a/boards/arm/nucleo_f746zg/pinmux.c b/boards/arm/nucleo_f746zg/pinmux.c index 98ff3f625db8..eb49eadcb56a 100644 --- a/boards/arm/nucleo_f746zg/pinmux.c +++ b/boards/arm/nucleo_f746zg/pinmux.c @@ -12,25 +12,8 @@ #include -/* NUCLEO-F746ZG pin configurations - * - * WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL. - * If you require both peripherals, and you do not need Arduino Uno v3 - * comaptability, the pin PB5 (also on ST Zio connector) can be used - * for the SPI_1 MOSI signal. - */ +/* NUCLEO-F746ZG pin configurations */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET - { STM32_PIN_PC1, STM32F7_PINMUX_FUNC_PC1_ETH }, - { STM32_PIN_PC4, STM32F7_PINMUX_FUNC_PC4_ETH }, - { STM32_PIN_PC5, STM32F7_PINMUX_FUNC_PC5_ETH }, - { STM32_PIN_PA1, STM32F7_PINMUX_FUNC_PA1_ETH }, - { STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_ETH }, - { STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_ETH }, - { STM32_PIN_PG11, STM32F7_PINMUX_FUNC_PG11_ETH }, - { STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH }, - { STM32_PIN_PB13, STM32F7_PINMUX_FUNC_PB13_ETH }, -#endif #ifdef CONFIG_USB_DC_STM32 { STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM }, { STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP }, diff --git a/boards/arm/nucleo_f756zg/nucleo_f756zg.dts b/boards/arm/nucleo_f756zg/nucleo_f756zg.dts index 980e840448a3..5f3ba07e8b76 100644 --- a/boards/arm/nucleo_f756zg/nucleo_f756zg.dts +++ b/boards/arm/nucleo_f756zg/nucleo_f756zg.dts @@ -9,6 +9,13 @@ #include #include "arduino_r3_connector.dtsi" +/* + * WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL. + * If you require both peripherals, and you do not need Arduino Uno v3 + * comaptability, the pin PB5 (also on ST Zio connector) can be used + * for the SPI_1 MOSI signal. + */ + / { model = "STMicroelectronics STM32F756ZG-NUCLEO board"; compatible = "st,stm32f756zg-nucleo"; @@ -94,13 +101,18 @@ &spi1 { pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>; - /* - * WARNING: The pin PA7 will conflict on selection of SPI_1 and - * ETH_STM32_HAL. - */ status = "okay"; }; &mac { status = "okay"; + pinctrl-0 = <ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_ref_clk_pa1 + ð_mdio_pa2 + ð_crs_dv_pa7 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pb13>; }; diff --git a/boards/arm/nucleo_f756zg/pinmux.c b/boards/arm/nucleo_f756zg/pinmux.c index 818dd6bd7bcd..321206553c67 100644 --- a/boards/arm/nucleo_f756zg/pinmux.c +++ b/boards/arm/nucleo_f756zg/pinmux.c @@ -12,25 +12,8 @@ #include -/* NUCLEO-F756ZG pin configurations - * - * WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL. - * If you require both peripherals, and you do not need Arduino Uno v3 - * comaptability, the pin PB5 (also on ST Zio connector) can be used - * for the SPI_1 MOSI signal. - */ +/* NUCLEO-F756ZG pin configurations */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET - { STM32_PIN_PC1, STM32F7_PINMUX_FUNC_PC1_ETH }, - { STM32_PIN_PC4, STM32F7_PINMUX_FUNC_PC4_ETH }, - { STM32_PIN_PC5, STM32F7_PINMUX_FUNC_PC5_ETH }, - { STM32_PIN_PA1, STM32F7_PINMUX_FUNC_PA1_ETH }, - { STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_ETH }, - { STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_ETH }, - { STM32_PIN_PG11, STM32F7_PINMUX_FUNC_PG11_ETH }, - { STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH }, - { STM32_PIN_PB13, STM32F7_PINMUX_FUNC_PB13_ETH }, -#endif #ifdef CONFIG_USB_DC_STM32 { STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM }, { STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP }, diff --git a/boards/arm/nucleo_f767zi/nucleo_f767zi.dts b/boards/arm/nucleo_f767zi/nucleo_f767zi.dts index b3ac9f2955a9..8d0be3a3870f 100644 --- a/boards/arm/nucleo_f767zi/nucleo_f767zi.dts +++ b/boards/arm/nucleo_f767zi/nucleo_f767zi.dts @@ -9,6 +9,13 @@ #include #include "arduino_r3_connector.dtsi" +/* + * WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL. + * If you require both peripherals, and you do not need Arduino Uno v3 + * comaptability, the pin PB5 (also on ST Zio connector) can be used + * for the SPI_1 MOSI signal. + */ + / { model = "STMicroelectronics STM32F767ZI-NUCLEO board"; compatible = "st,stm32f767zi-nucleo"; @@ -133,6 +140,15 @@ &mac { status = "okay"; + pinctrl-0 = <ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_ref_clk_pa1 + ð_mdio_pa2 + ð_crs_dv_pa7 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pb13>; }; &flash0 { diff --git a/boards/arm/nucleo_f767zi/pinmux.c b/boards/arm/nucleo_f767zi/pinmux.c index 036ab7e0d319..4dac6b9d72a5 100644 --- a/boards/arm/nucleo_f767zi/pinmux.c +++ b/boards/arm/nucleo_f767zi/pinmux.c @@ -12,25 +12,8 @@ #include -/* NUCLEO-F767ZI pin configurations - * - * WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL. - * If you require both peripherals, and you do not need Arduino Uno v3 - * comaptability, the pin PB5 (also on ST Zio connector) can be used - * for the SPI_1 MOSI signal. - */ +/* NUCLEO-F767ZI pin configurations */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET - { STM32_PIN_PC1, STM32F7_PINMUX_FUNC_PC1_ETH }, - { STM32_PIN_PC4, STM32F7_PINMUX_FUNC_PC4_ETH }, - { STM32_PIN_PC5, STM32F7_PINMUX_FUNC_PC5_ETH }, - { STM32_PIN_PA1, STM32F7_PINMUX_FUNC_PA1_ETH }, - { STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_ETH }, - { STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_ETH }, - { STM32_PIN_PG11, STM32F7_PINMUX_FUNC_PG11_ETH }, - { STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH }, - { STM32_PIN_PB13, STM32F7_PINMUX_FUNC_PB13_ETH }, -#endif #ifdef CONFIG_USB_DC_STM32 { STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM }, { STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP }, diff --git a/boards/arm/nucleo_h745zi_q/nucleo_h745zi_q_m7.dts b/boards/arm/nucleo_h745zi_q/nucleo_h745zi_q_m7.dts index 90e738f28724..8454180099ed 100644 --- a/boards/arm/nucleo_h745zi_q/nucleo_h745zi_q_m7.dts +++ b/boards/arm/nucleo_h745zi_q/nucleo_h745zi_q_m7.dts @@ -10,6 +10,13 @@ #include #include "nucleo_h745zi_q.dtsi" +/* + * WARNING: + * Possible pin conflicts: The pins PA2 and PB13 may conflict on selection of + * ETH_STM32_HAL, since they are used in ST Zio or ST morpho connectors. To + * avoid conflicting states the jumpers JP6 and JP7 must be in ON state. + */ + / { model = "STMicroelectronics STM32H745ZI-Q-NUCLEO board"; compatible = "st,stm32h745zi-q-nucleo"; @@ -66,6 +73,15 @@ &mac { status = "okay"; + pinctrl-0 = <ð_ref_clk_pa1 + ð_mdio_pa2 + ð_crs_dv_pa7 + ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pb13>; }; &rng { diff --git a/boards/arm/nucleo_h745zi_q/pinmux.c b/boards/arm/nucleo_h745zi_q/pinmux.c index f6d2362adcbc..092024c34371 100644 --- a/boards/arm/nucleo_h745zi_q/pinmux.c +++ b/boards/arm/nucleo_h745zi_q/pinmux.c @@ -13,27 +13,8 @@ #include -/* NUCLEO-F745ZI-Q pin configurations - * - * WARNING: - * Possible pin conflicts: - * The pins PA2 and PB13 may conflict on selection of ETH_STM32_HAL, - * since they are used in ST Zio or ST morpho connectors. - * To avoid conflicting states the jumpers JP6 and JP7 - * must be in ON state. - */ +/* NUCLEO-F745ZI-Q pin configurations */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET - { STM32_PIN_PA1, STM32H7_PINMUX_FUNC_PA1_ETH_REF_CLK }, - { STM32_PIN_PA2, STM32H7_PINMUX_FUNC_PA2_ETH_MDIO }, - { STM32_PIN_PA7, STM32H7_PINMUX_FUNC_PA7_ETH_CRS_DV }, - { STM32_PIN_PC1, STM32H7_PINMUX_FUNC_PC1_ETH_MDC }, - { STM32_PIN_PC4, STM32H7_PINMUX_FUNC_PC4_ETH_RXD0 }, - { STM32_PIN_PC5, STM32H7_PINMUX_FUNC_PC5_ETH_RXD1 }, - { STM32_PIN_PG11, STM32H7_PINMUX_FUNC_PG11_ETH_TX_EN }, - { STM32_PIN_PG13, STM32H7_PINMUX_FUNC_PG13_ETH_TXD0 }, - { STM32_PIN_PB13, STM32H7_PINMUX_FUNC_PB13_ETH_TXD1 }, -#endif }; static int pinmux_stm32_init(const struct device *port) diff --git a/boards/arm/olimex_stm32_e407/olimex_stm32_e407.dts b/boards/arm/olimex_stm32_e407/olimex_stm32_e407.dts index 3ca6a4d9a471..8011da31f3ad 100644 --- a/boards/arm/olimex_stm32_e407/olimex_stm32_e407.dts +++ b/boards/arm/olimex_stm32_e407/olimex_stm32_e407.dts @@ -79,4 +79,14 @@ usb_otg2: &usbotg_hs { &mac { status = "okay"; + pinctrl-0 = <ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_ref_clk_pa1 + ð_mdio_pa2 + ð_col_pa3 + ð_crs_dv_pa7 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pg14>; }; diff --git a/boards/arm/olimex_stm32_e407/pinmux.c b/boards/arm/olimex_stm32_e407/pinmux.c index eaa5e9a169e6..a7feee4e73bb 100644 --- a/boards/arm/olimex_stm32_e407/pinmux.c +++ b/boards/arm/olimex_stm32_e407/pinmux.c @@ -14,20 +14,6 @@ /* pin assignments for OLIMEX-STM32-E407 board */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET - {STM32_PIN_PC1, STM32F4_PINMUX_FUNC_PC1_ETH}, - {STM32_PIN_PC4, STM32F4_PINMUX_FUNC_PC4_ETH}, - {STM32_PIN_PC5, STM32F4_PINMUX_FUNC_PC5_ETH}, - - {STM32_PIN_PA1, STM32F4_PINMUX_FUNC_PA1_ETH}, - {STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_ETH}, - {STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_ETH}, - {STM32_PIN_PA7, STM32F4_PINMUX_FUNC_PA7_ETH}, - - {STM32_PIN_PG11, STM32F4_PINMUX_FUNC_PG11_ETH}, - {STM32_PIN_PG13, STM32F4_PINMUX_FUNC_PG13_ETH}, - {STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_ETH}, -#endif #ifdef CONFIG_USB_DC_STM32 #if DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_otgfs), okay) {STM32_PIN_PA11, STM32F4_PINMUX_FUNC_PA11_OTG_FS_DM}, diff --git a/boards/arm/stm32f746g_disco/pinmux.c b/boards/arm/stm32f746g_disco/pinmux.c index 582f03a97af4..4dd18a0839a3 100644 --- a/boards/arm/stm32f746g_disco/pinmux.c +++ b/boards/arm/stm32f746g_disco/pinmux.c @@ -14,19 +14,6 @@ /* pin assignments for STM32F746G-DISCO board */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET - {STM32_PIN_PC1, STM32F7_PINMUX_FUNC_PC1_ETH}, - {STM32_PIN_PC4, STM32F7_PINMUX_FUNC_PC4_ETH}, - {STM32_PIN_PC5, STM32F7_PINMUX_FUNC_PC5_ETH}, - - {STM32_PIN_PA1, STM32F7_PINMUX_FUNC_PA1_ETH}, - {STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_ETH}, - {STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_ETH}, - - {STM32_PIN_PG11, STM32F7_PINMUX_FUNC_PG11_ETH}, - {STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH}, - {STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_ETH}, -#endif #ifdef CONFIG_USB_DC_STM32 {STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM}, {STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP}, diff --git a/boards/arm/stm32f746g_disco/stm32f746g_disco.dts b/boards/arm/stm32f746g_disco/stm32f746g_disco.dts index 26864d632a6f..a3cdab3ac333 100644 --- a/boards/arm/stm32f746g_disco/stm32f746g_disco.dts +++ b/boards/arm/stm32f746g_disco/stm32f746g_disco.dts @@ -105,4 +105,13 @@ &mac { status = "okay"; + pinctrl-0 = <ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_ref_clk_pa1 + ð_mdio_pa2 + ð_crs_dv_pa7 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pg14>; }; diff --git a/boards/arm/stm32f769i_disco/pinmux.c b/boards/arm/stm32f769i_disco/pinmux.c index cd59da0c2ad5..35a839030bd2 100644 --- a/boards/arm/stm32f769i_disco/pinmux.c +++ b/boards/arm/stm32f769i_disco/pinmux.c @@ -14,19 +14,6 @@ /* pin assignments for STM32F769I-DISCO board */ static const struct pin_config pinconf[] = { -#if DT_NODE_HAS_STATUS(DT_NODELABEL(mac), okay) && CONFIG_NET_L2_ETHERNET - {STM32_PIN_PC1, STM32F7_PINMUX_FUNC_PC1_ETH}, - {STM32_PIN_PC4, STM32F7_PINMUX_FUNC_PC4_ETH}, - {STM32_PIN_PC5, STM32F7_PINMUX_FUNC_PC5_ETH}, - - {STM32_PIN_PA1, STM32F7_PINMUX_FUNC_PA1_ETH}, - {STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_ETH}, - {STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_ETH}, - - {STM32_PIN_PG11, STM32F7_PINMUX_FUNC_PG11_ETH}, - {STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH}, - {STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_ETH}, -#endif }; static int pinmux_stm32_init(const struct device *port) diff --git a/boards/arm/stm32f769i_disco/stm32f769i_disco.dts b/boards/arm/stm32f769i_disco/stm32f769i_disco.dts index e5b073b1fbce..23e6238ee30f 100644 --- a/boards/arm/stm32f769i_disco/stm32f769i_disco.dts +++ b/boards/arm/stm32f769i_disco/stm32f769i_disco.dts @@ -86,4 +86,13 @@ arduino_serial: &usart6 {}; &mac { status = "okay"; + pinctrl-0 = <ð_mdc_pc1 + ð_rxd0_pc4 + ð_rxd1_pc5 + ð_ref_clk_pa1 + ð_mdio_pa2 + ð_crs_dv_pa7 + ð_tx_en_pg11 + ð_txd0_pg13 + ð_txd1_pg14>; }; diff --git a/drivers/ethernet/eth_stm32_hal.c b/drivers/ethernet/eth_stm32_hal.c index 3a6a92a174e7..46b502019f09 100644 --- a/drivers/ethernet/eth_stm32_hal.c +++ b/drivers/ethernet/eth_stm32_hal.c @@ -26,6 +26,7 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME); #include #include #include +#include #include "eth.h" #include "eth_stm32_hal_priv.h" @@ -654,6 +655,14 @@ static int eth_initialize(const struct device *dev) return -EIO; } + /* configure pinmux */ + ret = stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len, + (uint32_t)dev_data->heth.Instance); + if (ret < 0) { + LOG_ERR("Could not configure ethernet pins"); + return ret; + } + heth = &dev_data->heth; #if defined(CONFIG_ETH_STM32_HAL_RANDOM_MAC) @@ -852,6 +861,8 @@ static void eth0_irq_config(void) irq_enable(DT_INST_IRQN(0)); } +static const struct soc_gpio_pinctrl eth0_pins[] = ST_STM32_DT_INST_PINCTRL(0, 0); + static const struct eth_stm32_hal_dev_cfg eth0_config = { .config_func = eth0_irq_config, .pclken = {.bus = DT_INST_CLOCKS_CELL_BY_NAME(0, stmmaceth, bus), @@ -864,6 +875,8 @@ static const struct eth_stm32_hal_dev_cfg eth0_config = { .pclken_ptp = {.bus = DT_INST_CLOCKS_CELL_BY_NAME(0, mac_clk_ptp, bus), .enr = DT_INST_CLOCKS_CELL_BY_NAME(0, mac_clk_ptp, bits)}, #endif /* !CONFIG_SOC_SERIES_STM32H7X */ + .pinctrl = eth0_pins, + .pinctrl_len = ARRAY_SIZE(eth0_pins), }; static struct eth_stm32_hal_dev_data eth0_data = { diff --git a/drivers/ethernet/eth_stm32_hal_priv.h b/drivers/ethernet/eth_stm32_hal_priv.h index f2a5c1f57858..b000b3685f75 100644 --- a/drivers/ethernet/eth_stm32_hal_priv.h +++ b/drivers/ethernet/eth_stm32_hal_priv.h @@ -29,6 +29,8 @@ struct eth_stm32_hal_dev_cfg { #if !defined(CONFIG_SOC_SERIES_STM32H7X) struct stm32_pclken pclken_ptp; #endif /* !defined(CONFIG_SOC_SERIES_STM32H7X) */ + const struct soc_gpio_pinctrl *pinctrl; + size_t pinctrl_len; }; /* Device run time data */ diff --git a/dts/bindings/ethernet/st,stm32-ethernet.yaml b/dts/bindings/ethernet/st,stm32-ethernet.yaml index 7c9a60484ab0..330aa815c37c 100644 --- a/dts/bindings/ethernet/st,stm32-ethernet.yaml +++ b/dts/bindings/ethernet/st,stm32-ethernet.yaml @@ -16,3 +16,12 @@ properties: required: true clock-names: required: true + + pinctrl-0: + type: phandles + required: false + description: | + GPIO pin configuration for Ethernet signals. We expect that the phandles + will reference pinctrl nodes, e.g. + + pinctrl-0 = <ð_ref_clk_pa1 ð_mdio_pa2 ...>;