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[fixup] Fix incorrect intrinsic name
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@momchil-velikov
momchil-velikov committed Sep 18, 2024
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2 changes: 1 addition & 1 deletion neon_intrinsics/advsimd.md
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Expand Up @@ -6090,7 +6090,7 @@ The intrinsics in this section are guarded by the macro ``__ARM_NEON``.
| <code>bfloat16x8_t <a href="https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt2_low_bf16_mf8_fpm" target="_blank">vcvt2_low_bf16_mf8_fpm</a>(<br>&nbsp;&nbsp;&nbsp;&nbsp; mfloat8x16_t vn,<br>&nbsp;&nbsp;&nbsp;&nbsp; fpm_t fpm)</code> | `vn -> Vn.8B` | `BF2CVTL Vd.8H,Vn.8B` | `Vd.8H -> result` | `A64` |
| <code>bfloat16x8_t <a href="https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt1_high_bf16_mf8_fpm" target="_blank">vcvt1_high_bf16_mf8_fpm</a>(<br>&nbsp;&nbsp;&nbsp;&nbsp; mfloat8x16_t vn,<br>&nbsp;&nbsp;&nbsp;&nbsp; fpm_t fpm)</code> | `vn -> Vn.16B` | `BF1CVTL2 Vd.8H,Vn.16B` | `Vd.8H -> result` | `A64` |
| <code>bfloat16x8_t <a href="https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt2_high_bf16_mf8_fpm" target="_blank">vcvt2_high_bf16_mf8_fpm</a>(<br>&nbsp;&nbsp;&nbsp;&nbsp; mfloat8x16_t vn,<br>&nbsp;&nbsp;&nbsp;&nbsp; fpm_t fpm)</code> | `vn -> Vn.16B` | `BF2CVTL2 Vd.8H,Vn.16B` | `Vd.8H -> result` | `A64` |
| <code>float16x8_t <a href="https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt1_bf16_mf8_fpm" target="_blank">vcvt1_bf16_mf8_fpm</a>(<br>&nbsp;&nbsp;&nbsp;&nbsp; mfloat8x8_t vn,<br>&nbsp;&nbsp;&nbsp;&nbsp; fpm_t fpm)</code> | `vn -> Vn.8B` | `F1CVTL Vd.8H,Vn.8B` | `Vd.8H -> result` | `A64` |
| <code>float16x8_t <a href="https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt1_f16_mf8_fpm" target="_blank">vcvt1_f16_mf8_fpm</a>(<br>&nbsp;&nbsp;&nbsp;&nbsp; mfloat8x8_t vn,<br>&nbsp;&nbsp;&nbsp;&nbsp; fpm_t fpm)</code> | `vn -> Vn.8B` | `F1CVTL Vd.8H,Vn.8B` | `Vd.8H -> result` | `A64` |
| <code>float16x8_t <a href="https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt1_low_f16_mf8_fpm" target="_blank">vcvt1_low_f16_mf8_fpm</a>(<br>&nbsp;&nbsp;&nbsp;&nbsp; mfloat8x16_t vn,<br>&nbsp;&nbsp;&nbsp;&nbsp; fpm_t fpm)</code> | `vn -> Vn.8B` | `F1CVTL Vd.8H,Vn.8B` | `Vd.8H -> result` | `A64` |
| <code>float16x8_t <a href="https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt2_f16_mf8_fpm" target="_blank">vcvt2_f16_mf8_fpm</a>(<br>&nbsp;&nbsp;&nbsp;&nbsp; mfloat8x8_t vn,<br>&nbsp;&nbsp;&nbsp;&nbsp; fpm_t fpm)</code> | `vn -> Vn.8B` | `F2CVTL Vd.8H,Vn.8B` | `Vd.8H -> result` | `A64` |
| <code>float16x8_t <a href="https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt2_low_f16_mf8_fpm" target="_blank">vcvt2_low_f16_mf8_fpm</a>(<br>&nbsp;&nbsp;&nbsp;&nbsp; mfloat8x16_t vn,<br>&nbsp;&nbsp;&nbsp;&nbsp; fpm_t fpm)</code> | `vn -> Vn.8B` | `F2CVTL Vd.8H,Vn.8B` | `Vd.8H -> result` | `A64` |
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2 changes: 1 addition & 1 deletion tools/intrinsic_db/advsimd.csv
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Expand Up @@ -4741,7 +4741,7 @@ bfloat16x8_t vcvt2_low_bf16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm) vn -> Vn.8B BF2C
bfloat16x8_t vcvt1_high_bf16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm) vn -> Vn.16B BF1CVTL2 Vd.8H,Vn.16B Vd.8H -> result A64
bfloat16x8_t vcvt2_high_bf16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm) vn -> Vn.16B BF2CVTL2 Vd.8H,Vn.16B Vd.8H -> result A64

float16x8_t vcvt1_bf16_mf8_fpm(mfloat8x8_t vn, fpm_t fpm) vn -> Vn.8B F1CVTL Vd.8H,Vn.8B Vd.8H -> result A64
float16x8_t vcvt1_f16_mf8_fpm(mfloat8x8_t vn, fpm_t fpm) vn -> Vn.8B F1CVTL Vd.8H,Vn.8B Vd.8H -> result A64
float16x8_t vcvt1_low_f16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm) vn -> Vn.8B F1CVTL Vd.8H,Vn.8B Vd.8H -> result A64
float16x8_t vcvt2_f16_mf8_fpm(mfloat8x8_t vn, fpm_t fpm) vn -> Vn.8B F2CVTL Vd.8H,Vn.8B Vd.8H -> result A64
float16x8_t vcvt2_low_f16_mf8_fpm(mfloat8x16_t vn, fpm_t fpm) vn -> Vn.8B F2CVTL Vd.8H,Vn.8B Vd.8H -> result A64
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