Implement Matrix Load

[Beanavil]

Implement load of two $2\times 2$ matrices 🎉 .
Relevant changes are:

• New vx_mload intrinsic. It inserts a new custom R-type RISCV instruction with two addresses as input (inside registers), one for each matrix to load.
  • This new instruction is at warp level. Each thread loads the two rows that it will need to compute one of the output values of the matrix multiplication (for instance, thread 0 loads the first row of the first matrix and the first column of the second matrix).
• New INST_LSU_MLOAD macro with value 4b'1110 for the op_type of the new instruction. The combination of op_type=INST_LSU_MLOAD and ex_type=01 is unique, which allows to uniquely identify the new instruction added.
• Modified VX_lsu_unit.sv so that when an INST_LSU_MLOAD arrives, 3 additional "instructions" are spawned in the pipeline so that the threads do their corresponding four memory requests and the pipeline is stalled until the requests are made.
• Modified the commit procedure by only decreasing the count of scheduled instructions when the last of the new instructions generated is committed. This solves the problem that one mload instruction is scheduled at the beginning but 4 of them are committed afterwards.