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Add basic InstSimplify folds for CGetHigh and CSetFlags #697

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Add basic InstSimplify folds for CGetHigh and CSetFlags #697

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85efaa0
[InstSimplify] Add a test for current get/set intrinsic folding
arichardson Apr 17, 2023
61a3130
[InstSimplify] Simplify getoffset/getaddr folding code. NFC
arichardson May 12, 2023
fcc87ce
[InstSimplify] Add folds for @llvm.cheri.cap.high.get
arichardson May 12, 2023
d9bf74f
[InstSimplify] Add basic fold for @llvm.cheri.cap.flags.set
arichardson May 12, 2023
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12 changes: 9 additions & 3 deletions clang/test/CodeGen/cheri/vaddr-mode.c
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Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,9 @@ long write_uintcap(__uintcap_t *cap) {
// OFFSET-NEXT: entry:
// OFFSET-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.cheri.cap.offset.get.i64(ptr addrspace(200) [[CAP:%.*]])
// OFFSET-NEXT: [[AND:%.*]] = and i64 [[TMP0]], 3
// OFFSET-NEXT: ret i64 [[AND]]
// OFFSET-NEXT: [[TMP1:%.*]] = tail call i8 addrspace(200)* @llvm.cheri.cap.offset.set.i64(i8 addrspace(200)* [[CAP]], i64 [[AND]])
// OFFSET-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.cheri.cap.offset.get.i64(i8 addrspace(200)* [[TMP1]])
// OFFSET-NEXT: ret i64 [[TMP2]]
//
long get_low_bits(__uintcap_t cap) {
return cap & 3;
Expand Down Expand Up @@ -126,7 +128,9 @@ __uintcap_t xor_uintcap(__uintcap_t cap, __uintcap_t cap2) {
// OFFSET-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.cheri.cap.offset.get.i64(ptr addrspace(200) [[CAP:%.*]])
// OFFSET-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.cheri.cap.offset.get.i64(ptr addrspace(200) [[CAP2:%.*]])
// OFFSET-NEXT: [[XOR:%.*]] = xor i64 [[TMP1]], [[TMP0]]
// OFFSET-NEXT: ret i64 [[XOR]]
// OFFSET-NEXT: [[TMP2:%.*]] = tail call i8 addrspace(200)* @llvm.cheri.cap.offset.set.i64(i8 addrspace(200)* [[CAP]], i64 [[XOR]])
// OFFSET-NEXT: [[TMP3:%.*]] = tail call i64 @llvm.cheri.cap.offset.get.i64(i8 addrspace(200)* [[TMP2]])
// OFFSET-NEXT: ret i64 [[TMP3]]
//
long xor_uintcap_return_long(__uintcap_t cap, __uintcap_t cap2) {
return cap ^ cap2;
Expand Down Expand Up @@ -160,7 +164,9 @@ __uintcap_t modulo_return_uintcap(__uintcap_t cap) {
// OFFSET-NEXT: entry:
// OFFSET-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.cheri.cap.offset.get.i64(ptr addrspace(200) [[CAP:%.*]])
// OFFSET-NEXT: [[REM:%.*]] = and i64 [[TMP0]], 31
// OFFSET-NEXT: ret i64 [[REM]]
// OFFSET-NEXT: [[TMP1:%.*]] = tail call i8 addrspace(200)* @llvm.cheri.cap.offset.set.i64(i8 addrspace(200)* [[CAP]], i64 [[REM]])
// OFFSET-NEXT: [[TMP2:%.*]] = tail call i64 @llvm.cheri.cap.offset.get.i64(i8 addrspace(200)* [[TMP1]])
// OFFSET-NEXT: ret i64 [[TMP2]]
//
long modulo_return_long(__uintcap_t cap) {
return cap % 32;
Expand Down
10 changes: 8 additions & 2 deletions llvm/include/llvm/IR/CheriIntrinsics.h
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Original file line number Diff line number Diff line change
Expand Up @@ -21,26 +21,32 @@
namespace llvm {
namespace cheri {

inline Intrinsic::ID correspondingSetIntrinsic(Intrinsic::ID GetIntrin) {
inline constexpr Intrinsic::ID
correspondingSetIntrinsic(Intrinsic::ID GetIntrin) {
switch (GetIntrin) {
case Intrinsic::cheri_cap_offset_get:
return Intrinsic::cheri_cap_offset_set;
case Intrinsic::cheri_cap_address_get:
return Intrinsic::cheri_cap_address_set;
case Intrinsic::cheri_cap_flags_get:
return Intrinsic::cheri_cap_flags_set;
case Intrinsic::cheri_cap_high_get:
return Intrinsic::cheri_cap_high_set;
default:
llvm_unreachable("No matching set intrinsic");
}
}
inline Intrinsic::ID correspondingGetIntrinsic(Intrinsic::ID SetIntrin) {
inline constexpr Intrinsic::ID
correspondingGetIntrinsic(Intrinsic::ID SetIntrin) {
switch (SetIntrin) {
case Intrinsic::cheri_cap_offset_set:
return Intrinsic::cheri_cap_offset_get;
case Intrinsic::cheri_cap_address_set:
return Intrinsic::cheri_cap_address_get;
case Intrinsic::cheri_cap_flags_set:
return Intrinsic::cheri_cap_flags_get;
case Intrinsic::cheri_cap_high_set:
return Intrinsic::cheri_cap_high_get;
default:
llvm_unreachable("No matching get intrinsic");
}
Expand Down
81 changes: 59 additions & 22 deletions llvm/lib/Analysis/InstructionSimplify.cpp
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Expand Up @@ -5716,15 +5716,47 @@ stripAndAccumulateGEPsAndPointerCastsSameRepr(Value *V, const DataLayout &DL,
return Result;
}

template <Intrinsic::ID Intrin, Intrinsic::ID SetIntrin>
// Common helper to fold llvm.cheri.get.foo intrinsics
template <Intrinsic::ID Intrin>
static Value *foldCheriGetSetPair(Value *V, Type *ResultTy,
const DataLayout &DL) {
constexpr Intrinsic::ID SetIntrin = cheri::correspondingSetIntrinsic(Intrin);
// getFoo(setFoo(A, B)) -> B
// This is true for address and high, but not necessarily true for flags and
// offset since setflags truncates the value and setoffset may change the
// bounds representation (and thus the offset) if it is significantly OOB.
constexpr bool SetUpdatesAllGetBits =
SetIntrin != Intrinsic::cheri_cap_offset_set &&
SetIntrin != Intrinsic::cheri_cap_flags_set;
Value *IntrinArg = nullptr;
if (SetUpdatesAllGetBits &&
match(V, m_Intrinsic<SetIntrin>(m_Value(), m_Value(IntrinArg)))) {
return IntrinArg;
}
// All intrinsics we call this function for return zero for NULL inputs.
// In fact, we can extend this to any input derived from NULL where the only
// operations that have been address manipulations (unless we are retrieving
// a result depending on the address), since those cannot affect non-bounds
// capability metadata.
constexpr bool CanIgnoreAddressManipulation =
Intrin != Intrinsic::cheri_cap_address_get &&
Intrin != Intrinsic::cheri_cap_offset_get;
Value *Base = CanIgnoreAddressManipulation
? getBasePtrIgnoringCapabilityAddressManipulation(V, DL)
: V->stripPointerCastsSameRepresentation();
if (isa<ConstantPointerNull>(Base)) {
return Constant::getNullValue(ResultTy);
}
return nullptr;
}

template <Intrinsic::ID Intrin>
static Value *inferCapabilityOffsetOrAddr(Value *V, Type *ResultTy,
const DataLayout &DL) {
if (Value *Ret = foldCheriGetSetPair<Intrin>(V, ResultTy, DL))
return Ret;
// Try to infer the offset/address from a prior setoffset/setaddr value
Value *IntrinArg = nullptr;
// getaddr(setaddr(A, B)) -> B and getoffset(setoffset(A, B)) -> B
if (match(V, m_Intrinsic<SetIntrin>(m_Value(), m_Value(IntrinArg)))) {
return IntrinArg;
}
// get{addr,offset}(setaddr(NULL, B)) -> B
if (match(V, m_Intrinsic<Intrinsic::cheri_cap_address_set>(
m_Zero(), m_Value(IntrinArg)))) {
Expand Down Expand Up @@ -5765,6 +5797,7 @@ static Value *inferCapabilityOffsetOrAddr(Value *V, Type *ResultTy,
// We can also fold chains of constant GEPS:
// For example: getoffset(GEP(setoffset(A, Const1), 100) -> Const1 + 100
ConstantInt *ConstSetArg;
constexpr Intrinsic::ID SetIntrin = cheri::correspondingSetIntrinsic(Intrin);
if (match(BasePtr,
m_Intrinsic<SetIntrin>(m_Value(), m_ConstantInt(ConstSetArg)))) {
return ConstantInt::get(ResultTy, ConstSetArg->getValue() + OffsetAPInt);
Expand All @@ -5774,20 +5807,6 @@ static Value *inferCapabilityOffsetOrAddr(Value *V, Type *ResultTy,
return nullptr;
}

Value *simplifyCapabilityGetOffset(Value *V, Type *ResultTy,
const DataLayout &DL) {
return inferCapabilityOffsetOrAddr<Intrinsic::cheri_cap_offset_get,
Intrinsic::cheri_cap_offset_set>(
V, ResultTy, DL);
}

Value *simplifyCapabilityGetAddress(Value *V, Type *ResultTy,
const DataLayout &DL) {
return inferCapabilityOffsetOrAddr<Intrinsic::cheri_cap_address_get,
Intrinsic::cheri_cap_address_set>(
V, ResultTy, DL);
}

static Value *simplifyUnaryIntrinsic(Function *F, Value *Op0,
const SimplifyQuery &Q) {
// Idempotent functions return the same result when called repeatedly.
Expand Down Expand Up @@ -5818,7 +5837,6 @@ static Value *simplifyUnaryIntrinsic(Function *F, Value *Op0,
return Constant::getNullValue(F->getReturnType());
break;
case Intrinsic::cheri_cap_sealed_get:
case Intrinsic::cheri_cap_flags_get:
case Intrinsic::cheri_cap_base_get:
// Values derived from NULL and where the only operations that have been
// applied are address manipulations, always have the following properties:
Expand Down Expand Up @@ -5852,11 +5870,25 @@ static Value *simplifyUnaryIntrinsic(Function *F, Value *Op0,
case Intrinsic::cheri_cap_length_get:
break;
case Intrinsic::cheri_cap_address_get:
if (Value *V = simplifyCapabilityGetAddress(Op0, F->getReturnType(), Q.DL))
if (auto *V = inferCapabilityOffsetOrAddr<Intrinsic::cheri_cap_address_get>(
Op0, F->getReturnType(), Q.DL))
return V;
break;
case Intrinsic::cheri_cap_flags_get: {
if (auto *Ret = foldCheriGetSetPair<Intrinsic::cheri_cap_flags_get>(
Op0, F->getReturnType(), Q.DL))
return Ret;
break;
}
case Intrinsic::cheri_cap_high_get: {
if (auto *Ret = foldCheriGetSetPair<Intrinsic::cheri_cap_high_get>(
Op0, F->getReturnType(), Q.DL))
return Ret;
break;
}
case Intrinsic::cheri_cap_offset_get:
if (Value *V = simplifyCapabilityGetOffset(Op0, F->getReturnType(), Q.DL))
if (auto *V = inferCapabilityOffsetOrAddr<Intrinsic::cheri_cap_offset_get>(
Op0, F->getReturnType(), Q.DL))
return V;
break;

Expand Down Expand Up @@ -6117,6 +6149,11 @@ static Value *simplifyBinaryIntrinsic(Function *F, Value *Op0, Value *Op1,
return Op0;
}
break;
case Intrinsic::cheri_cap_flags_set:
if (match(Op1,
m_Intrinsic<Intrinsic::cheri_cap_flags_get>(m_Specific(Op0))))
return Op0;
break;
case Intrinsic::cheri_cap_offset_set:
case Intrinsic::cheri_cap_address_set: {
Value *Base = getBasePtrIgnoringCapabilityAddressManipulation(Op0, Q.DL);
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/CHERI-Generic/MIPS/cheri-intrinsics-folding-broken-module-regression.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -23,20 +23,20 @@ define void @g(i64 %x, i64 %y) addrspace(200) nounwind {
; ASM-NEXT: lui $1, %pcrel_hi(_CHERI_CAPABILITY_TABLE_-8)
; ASM-NEXT: daddiu $1, $1, %pcrel_lo(_CHERI_CAPABILITY_TABLE_-4)
; ASM-NEXT: cgetpccincoffset $c1, $1
; ASM-NEXT: daddu $2, $5, $4
; ASM-NEXT: clcbi $c2, %captab20(d)($c1)
; ASM-NEXT: clcbi $c1, %captab20(e)($c1)
; ASM-NEXT: cgetoffset $1, $c2
; ASM-NEXT: daddu $1, $2, $1
; ASM-NEXT: daddu $1, $1, $4
; ASM-NEXT: csetoffset $c2, $c2, $1
; ASM-NEXT: cincoffset $c2, $c2, $5
; ASM-NEXT: cjr $c17
; ASM-NEXT: csc $c2, $zero, 0($c1)
; CHECK-LABEL: define {{[^@]+}}@g
; CHECK-SAME: (i64 [[X:%.*]], i64 [[Y:%.*]]) addrspace(200) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.cheri.cap.offset.get.i64(i8 addrspace(200)* bitcast (i64 addrspace(200)* @d to i8 addrspace(200)*))
; CHECK-NEXT: [[ADD:%.*]] = add i64 [[TMP3]], [[X]]
; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[ADD]], [[Y]]
; CHECK-NEXT: [[TMP11:%.*]] = call i8 addrspace(200)* @llvm.cheri.cap.offset.set.i64(i8 addrspace(200)* bitcast (i64 addrspace(200)* @d to i8 addrspace(200)*), i64 [[ADD1]])
; CHECK-NEXT: [[TMP5:%.*]] = call i8 addrspace(200)* @llvm.cheri.cap.offset.set.i64(i8 addrspace(200)* bitcast (i64 addrspace(200)* @d to i8 addrspace(200)*), i64 [[ADD]])
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8 addrspace(200)* [[TMP5]], i64 [[Y]]
; CHECK-NEXT: store i8 addrspace(200)* [[TMP11]], i8 addrspace(200)* addrspace(200)* @e, align 32
; CHECK-NEXT: ret void
;
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/CHERI-Generic/RISCV32/cheri-intrinsics-folding-broken-module-regression.ll
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Expand Up @@ -27,17 +27,17 @@ define void @g(i32 %x, i32 %y) addrspace(200) nounwind {
; ASM-NEXT: .LBB0_2: # Label of block must be emitted
; ASM-NEXT: auipcc ca4, %captab_pcrel_hi(e)
; ASM-NEXT: clc ca4, %pcrel_lo(.LBB0_2)(ca4)
; ASM-NEXT: add a0, a1, a0
; ASM-NEXT: add a0, a0, a3
; ASM-NEXT: add a0, a3, a0
; ASM-NEXT: csetoffset ca0, ca2, a0
; ASM-NEXT: cincoffset ca0, ca0, a1
; ASM-NEXT: csc ca0, 0(ca4)
; ASM-NEXT: cret
; CHECK-LABEL: define {{[^@]+}}@g
; CHECK-SAME: (i32 [[X:%.*]], i32 [[Y:%.*]]) addrspace(200) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.cheri.cap.offset.get.i32(i8 addrspace(200)* bitcast (i32 addrspace(200)* @d to i8 addrspace(200)*))
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP3]], [[X]]
; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[ADD]], [[Y]]
; CHECK-NEXT: [[TMP11:%.*]] = call i8 addrspace(200)* @llvm.cheri.cap.offset.set.i32(i8 addrspace(200)* bitcast (i32 addrspace(200)* @d to i8 addrspace(200)*), i32 [[ADD1]])
; CHECK-NEXT: [[TMP5:%.*]] = call i8 addrspace(200)* @llvm.cheri.cap.offset.set.i32(i8 addrspace(200)* bitcast (i32 addrspace(200)* @d to i8 addrspace(200)*), i32 [[ADD]])
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8 addrspace(200)* [[TMP5]], i32 [[Y]]
; CHECK-NEXT: store i8 addrspace(200)* [[TMP11]], i8 addrspace(200)* addrspace(200)* @e, align 32
; CHECK-NEXT: ret void
;
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/CHERI-Generic/RISCV64/cheri-intrinsics-folding-broken-module-regression.ll
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Expand Up @@ -23,21 +23,21 @@ define void @g(i64 %x, i64 %y) addrspace(200) nounwind {
; ASM-NEXT: .LBB0_1: # Label of block must be emitted
; ASM-NEXT: auipcc ca2, %captab_pcrel_hi(d)
; ASM-NEXT: clc ca2, %pcrel_lo(.LBB0_1)(ca2)
; ASM-NEXT: add a0, a1, a0
; ASM-NEXT: .LBB0_2: # Label of block must be emitted
; ASM-NEXT: auipcc ca1, %captab_pcrel_hi(e)
; ASM-NEXT: clc ca1, %pcrel_lo(.LBB0_2)(ca1)
; ASM-NEXT: cgetoffset a3, ca2
; ASM-NEXT: add a0, a0, a3
; ASM-NEXT: .LBB0_2: # Label of block must be emitted
; ASM-NEXT: auipcc ca4, %captab_pcrel_hi(e)
; ASM-NEXT: clc ca4, %pcrel_lo(.LBB0_2)(ca4)
; ASM-NEXT: add a0, a3, a0
; ASM-NEXT: csetoffset ca0, ca2, a0
; ASM-NEXT: csc ca0, 0(ca1)
; ASM-NEXT: cincoffset ca0, ca0, a1
; ASM-NEXT: csc ca0, 0(ca4)
; ASM-NEXT: cret
; CHECK-LABEL: define {{[^@]+}}@g
; CHECK-SAME: (i64 [[X:%.*]], i64 [[Y:%.*]]) addrspace(200) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.cheri.cap.offset.get.i64(i8 addrspace(200)* bitcast (i64 addrspace(200)* @d to i8 addrspace(200)*))
; CHECK-NEXT: [[ADD:%.*]] = add i64 [[TMP3]], [[X]]
; CHECK-NEXT: [[ADD1:%.*]] = add i64 [[ADD]], [[Y]]
; CHECK-NEXT: [[TMP11:%.*]] = call i8 addrspace(200)* @llvm.cheri.cap.offset.set.i64(i8 addrspace(200)* bitcast (i64 addrspace(200)* @d to i8 addrspace(200)*), i64 [[ADD1]])
; CHECK-NEXT: [[TMP5:%.*]] = call i8 addrspace(200)* @llvm.cheri.cap.offset.set.i64(i8 addrspace(200)* bitcast (i64 addrspace(200)* @d to i8 addrspace(200)*), i64 [[ADD]])
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, i8 addrspace(200)* [[TMP5]], i64 [[Y]]
; CHECK-NEXT: store i8 addrspace(200)* [[TMP11]], i8 addrspace(200)* addrspace(200)* @e, align 32
; CHECK-NEXT: ret void
;
Expand Down
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