Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Backport https://github.com/llvm/llvm-project/commit/83d9aa27680b6a7f3556fcf13ada70b4be95bab2 to 18.x #29

Merged
merged 1 commit into from
Jun 21, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 1 addition & 0 deletions llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -160,6 +160,7 @@ Type *VPTypeAnalysis::inferScalarTypeForRecipe(const VPReplicateRecipe *R) {
case Instruction::ICmp:
case Instruction::FCmp:
return IntegerType::get(Ctx, 1);
case Instruction::AddrSpaceCast:
case Instruction::Alloca:
case Instruction::BitCast:
case Instruction::Trunc:
Expand Down
40 changes: 40 additions & 0 deletions llvm/test/Transforms/LoopVectorize/as_cast.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,40 @@
; RUN: opt -passes=loop-vectorize %s -force-vector-width=1 -force-vector-interleave=2 -S -o - | FileCheck %s

define void @foo(ptr addrspace(1) %in) {
entry:
br label %loop

loop:
%iter = phi i64 [ %next, %loop ], [ 0, %entry ]
%ascast = addrspacecast ptr addrspace(1) %in to ptr
%next = add i64 %iter, 1
%arrayidx = getelementptr inbounds i64, ptr %ascast, i64 %next
store i64 %next, ptr %arrayidx, align 4

; check that we find the two interleaved blocks with ascast, gep and store:
; CHECK: pred.store.if:
; CHECK: [[ID1:%.*]] = add i64 %{{.*}}, 1
; CHECK: [[AS1:%.*]] = addrspacecast ptr addrspace(1) %{{.*}} to ptr
; CHECK: [[GEP1:%.*]] = getelementptr inbounds i64, ptr [[AS1]], i64 [[ID1]]
; CHECK: store i64 [[ID1]], ptr [[GEP1]]

; CHECK: pred.store.if1:
; CHECK: [[ID2:%.*]] = add i64 %{{.*}}, 1
; CHECK: [[AS2:%.*]] = addrspacecast ptr addrspace(1) %in to ptr
; CHECK: [[GEP2:%.*]] = getelementptr inbounds i64, ptr [[AS2]], i64 [[ID2]]
; CHECK: store i64 [[ID2]], ptr %9, align 4

%cmp = icmp eq i64 %next, 7
br i1 %cmp, label %exit, label %loop

; check that we branch to the exit block
; CHECK: middle.block:
; CHECK: br i1 true, label %exit, label %scalar.ph

exit:
ret void
; CHECK: exit:
; CHECK: ret void
}

; CHECK: !{{[0-9]*}} = !{!"llvm.loop.isvectorized", i32 1}