arch/: Unify the cache interface for all architectures

arch/Kconfig

@@ -171,11 +171,15 @@ config ARCH_HAVE_IRQPRIO
 	bool
 	default n
 
-config ARCH_L2CACHE
+config ARCH_ICACHE
 	bool
 	default n
 
-config ARCH_HAVE_COHERENT_DCACHE
+config ARCH_DCACHE
+	bool
+	default n
+
+config ARCH_L2CACHE
 	bool
 	default n
 

arch/arm/Kconfig

@@ -405,6 +405,8 @@ endchoice
 config ARCH_ARM7TDMI
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	---help---
 		The Arm7TDMI-S is an excellent workhorse processor capable of a wide
 		array of applications. Traditionally used in mobile handsets, the
@@ -413,6 +415,8 @@ config ARCH_ARM7TDMI
 config ARCH_ARM920T
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MMU
 	select ARCH_USE_MMU
 	---help---
@@ -428,6 +432,8 @@ config ARCH_ARM920T
 config ARCH_ARM926EJS
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MMU
 	select ARCH_USE_MMU
 	---help---
@@ -449,6 +455,8 @@ config ARCH_ARM926EJS
 config ARCH_ARM1136J
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MMU
 	select ARCH_USE_MMU
 	---help---
@@ -459,6 +467,8 @@ config ARCH_ARM1136J
 config ARCH_ARM1156T2
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MMU
 	select ARCH_USE_MMU
 	---help---
@@ -468,6 +478,8 @@ config ARCH_ARM1156T2
 config ARCH_ARM1176JZ
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MMU
 	select ARCH_USE_MMU
 	---help---
@@ -527,54 +539,59 @@ config ARCH_CORTEXM7
 	select ARCH_HAVE_HIPRI_INTERRUPT
 	select ARCH_HAVE_RESET
 	select ARCH_HAVE_TESTSET
-	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
 	select ARCH_HAVE_HARDFAULT_DEBUG
 	select ARCH_HAVE_MEMFAULT_DEBUG
 
 config ARCH_CORTEXA5
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MMU
 	select ARCH_USE_MMU
 	select ARCH_HAVE_TESTSET
-	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
 
 config ARCH_CORTEXA8
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MMU
 	select ARCH_USE_MMU
 	select ARCH_HAVE_TESTSET
-	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
 
 config ARCH_CORTEXA9
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MMU
 	select ARCH_USE_MMU
 	select ARCH_HAVE_TESTSET
-	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
 
 config ARCH_CORTEXR4
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MPU
 	select ARCH_HAVE_TESTSET
-	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
 
 config ARCH_CORTEXR5
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MPU
 	select ARCH_HAVE_TESTSET
-	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
 
 config ARCH_CORTEXR7
 	bool
 	default n
+	select ARCH_DCACHE
+	select ARCH_ICACHE
 	select ARCH_HAVE_MPU
 	select ARCH_HAVE_TESTSET
-	select ARCH_HAVE_COHERENT_DCACHE if ELF || MODULE
 
 config ARCH_FAMILY
 	string

arch/arm/src/a1x/Make.defs

@@ -111,11 +111,7 @@ CMN_CSRCS += arm_virtpgaddr.c
 endif
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += arm_coherent_dcache.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += arm_coherent_dcache.c
-endif
+CMN_CSRCS += arm_cache.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_savefpu.S arm_restorefpu.S

arch/arm/src/am335x/Make.defs

@@ -107,11 +107,7 @@ CMN_CSRCS += arm_virtpgaddr.c
 endif
 endif
 
-ifeq ($(CONFIG_ELF),y)
-CMN_CSRCS += arm_coherent_dcache.c
-else ifeq ($(CONFIG_MODULE),y)
-CMN_CSRCS += arm_coherent_dcache.c
-endif
+CMN_CSRCS += arm_cache.c
 
 ifeq ($(CONFIG_ARCH_FPU),y)
 CMN_ASRCS += arm_savefpu.S arm_restorefpu.S

arch/arm/src/am335x/am335x_boot.c

@@ -43,6 +43,7 @@
 #include <assert.h>
 #include <debug.h>
 
+#include <nuttx/cache.h>
 #ifdef CONFIG_PAGING
 #  include <nuttx/page.h>
 #endif
@@ -52,7 +53,6 @@
 #include "chip.h"
 #include "arm.h"
 #include "mmu.h"
-#include "cache.h"
 #include "fpu.h"
 #include "up_internal.h"
 #include "up_arch.h"
@@ -348,8 +348,8 @@ static void am335x_copyvectorblock(void)
 #else
   /* Flush the DCache to assure that the vector data is in physical RAM */
 
-  arch_clean_dcache((uintptr_t)AM335X_VECTOR_VSRAM,
-                    (uintptr_t)AM335X_VECTOR_VSRAM + am335x_vectorsize());
+  up_clean_dcache((uintptr_t)AM335X_VECTOR_VSRAM,
+                  (uintptr_t)AM335X_VECTOR_VSRAM + am335x_vectorsize());
 #endif
 }
 

arch/arm/src/arm/arm.h

@@ -44,12 +44,6 @@
  * Pre-processor Definitions
  ************************************************************************************/
 
-#undef CONFIG_ALIGNMENT_TRAP
-#undef CONFIG_DCACHE_WRITETHROUGH
-#undef CONFIG_CACHE_ROUND_ROBIN
-#undef CONFIG_DCACHE_DISABLE
-#undef CONFIG_ICACHE_DISABLE
-
 /* ARM9EJS **************************************************************************/
 
 /* PSR bits */