px4io-v2:Resonable Def config memory - verified by inspection

boards/px4/io-v2/nuttx-config/nsh/defconfig

@@ -15,7 +15,7 @@ CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
 CONFIG_ARCH_CHIP_STM32F100C8=y
 CONFIG_ARCH_MATH_H=y
-CONFIG_ARCH_STACKDUMP=y
+#CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_ARMV7M_USEBASEPRI=y
 CONFIG_BOARD_LOOPSPERMSEC=2000
@@ -30,13 +30,14 @@ CONFIG_FDCLONE_DISABLE=y
 CONFIG_FDCLONE_STDIO=y
 CONFIG_HAVE_CXX=y
 CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_IDLETHREAD_STACKSIZE=400
 CONFIG_LIB_BOARDCTL=y
 CONFIG_MAX_TASKS=2
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_MM_FILL_ALLOCATIONS=y
 CONFIG_MM_SMALL=y
 CONFIG_NAME_MAX=12
-CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_DESCRIPTORS=3
 CONFIG_NFILE_STREAMS=0
 CONFIG_PREALLOC_TIMERS=0
 CONFIG_PREALLOC_WDOGS=6
@@ -54,9 +55,6 @@ CONFIG_STDIO_DISABLE_BUFFERING=y
 CONFIG_STM32_ADC1=y
 CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
 CONFIG_STM32_DMA1=y
-CONFIG_STM32_I2C1=y
-CONFIG_STM32_I2CTIMEOMS=1
-CONFIG_STM32_I2CTIMEOTICKS=1
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_USART1=y
 CONFIG_STM32_USART2=y
@@ -74,6 +72,6 @@ CONFIG_USART3_RXBUFSIZE=64
 CONFIG_USART3_RXDMA=y
 CONFIG_USART3_TXBUFSIZE=64
 CONFIG_USEC_PER_TICK=1000
-CONFIG_USERMAIN_STACKSIZE=1300
+CONFIG_USERMAIN_STACKSIZE=1132
 CONFIG_USER_ENTRYPOINT="user_start"
 CONFIG_WDOG_INTRESERVE=2