Skip to content

Commit

Permalink
DShot: updated driver to use NuttX DMA functions (#13233)
Browse files Browse the repository at this point in the history
  • Loading branch information
Igor-Misic authored and bkueng committed Oct 25, 2019
1 parent 7ebaf9a commit f4ee914
Show file tree
Hide file tree
Showing 11 changed files with 79 additions and 307 deletions.
20 changes: 8 additions & 12 deletions boards/holybro/kakutef7/src/timer_config.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler0,
.vectorno = STM32_IRQ_TIM3,
.dshot = {
.dma_base = DSHOT_DMA1_BASE,
.channel = DShot_Channel5,
.stream = DShot_Stream2,
.dma_base = STM32_DMA1_BASE,
.dmamap = DMAMAP_TIM3_UP,
.start_ccr_register = TIM_DMABASE_CCR3,
.channels_number = 2u /* CCR3 and CCR4 */
}
Expand All @@ -78,9 +77,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler1,
.vectorno = STM32_IRQ_TIM1CC,
.dshot = {
.dma_base = DSHOT_DMA2_BASE,
.channel = DShot_Channel6,
.stream = DShot_Stream5,
.dma_base = STM32_DMA2_BASE,
.dmamap = DMAMAP_TIM1_UP,
.start_ccr_register = TIM_DMABASE_CCR1,
.channels_number = 2u /* CCR1 and CCR2 */
}
Expand All @@ -95,9 +93,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler2,
.vectorno = STM32_IRQ_TIM8CC,
.dshot = {
.dma_base = DSHOT_DMA2_BASE,
.channel = DShot_Channel7,
.stream = DShot_Stream1,
.dma_base = STM32_DMA2_BASE,
.dmamap = DMAMAP_TIM8_UP,
.start_ccr_register = TIM_DMABASE_CCR4,
.channels_number = 1u /* CCR4 */
}
Expand All @@ -112,9 +109,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler3,
.vectorno = STM32_IRQ_TIM5,
.dshot = {
.dma_base = DSHOT_DMA1_BASE,
.channel = DShot_Channel6,
.stream = DShot_Stream6, // alternatively DShot_Stream0
.dma_base = STM32_DMA1_BASE,
.dmamap = DMAMAP_TIM5_UP_2,
.start_ccr_register = TIM_DMABASE_CCR4,
.channels_number = 1u /* CCR4 */
}
Expand Down
5 changes: 2 additions & 3 deletions boards/modalai/fc-v1/src/timer_config.c
Original file line number Diff line number Diff line change
Expand Up @@ -76,9 +76,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler0,
.vectorno = STM32_IRQ_TIM1CC,
.dshot = {
.dma_base = DSHOT_DMA2_BASE,
.channel = DShot_Channel6,
.stream = DShot_Stream5,
.dma_base = STM32_DMA2_BASE,
.dmamap = DMAMAP_TIM1_UP,
.start_ccr_register = TIM_DMABASE_CCR1,
.channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */
}
Expand Down
10 changes: 4 additions & 6 deletions boards/omnibus/f4sd/src/timer_config.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler1,
.vectorno = STM32_IRQ_TIM2,
.dshot = {
.dma_base = DSHOT_DMA1_BASE,
.channel = DShot_Channel3,
.stream = DShot_Stream1,
.dma_base = STM32_DMA1_BASE,
.dmamap = DMAMAP_TIM2_UP_1,
.start_ccr_register = TIM_DMABASE_CCR3,
.channels_number = 2u /* CCR3 and CCR4 */
}
Expand All @@ -78,9 +77,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler2,
.vectorno = STM32_IRQ_TIM3,
.dshot = {
.dma_base = DSHOT_DMA1_BASE,
.channel = DShot_Channel5,
.stream = DShot_Stream2,
.dma_base = STM32_DMA1_BASE,
.dmamap = DMAMAP_TIM3_UP,
.start_ccr_register = TIM_DMABASE_CCR3,
.channels_number = 2u /* CCR3 and CCR4 */
}
Expand Down
10 changes: 4 additions & 6 deletions boards/px4/fmu-v2/src/timer_config.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler0,
.vectorno = STM32_IRQ_TIM1CC,
.dshot = {
.dma_base = DSHOT_DMA2_BASE,
.channel = DShot_Channel6,
.stream = DShot_Stream5,
.dma_base = STM32_DMA2_BASE,
.dmamap = DMAMAP_TIM1_UP,
.start_ccr_register = TIM_DMABASE_CCR1,
.channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */
}
Expand All @@ -78,9 +77,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler1,
.vectorno = STM32_IRQ_TIM4,
.dshot = {
.dma_base = DSHOT_DMA1_BASE,
.channel = DShot_Channel2,
.stream = DShot_Stream6,
.dma_base = STM32_DMA1_BASE,
.dmamap = DMAMAP_TIM4_UP,
.start_ccr_register = TIM_DMABASE_CCR2,
.channels_number = 2u /* CCR2 and CCR3 */
}
Expand Down
10 changes: 4 additions & 6 deletions boards/px4/fmu-v3/src/timer_config.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler0,
.vectorno = STM32_IRQ_TIM1CC,
.dshot = {
.dma_base = DSHOT_DMA2_BASE,
.channel = DShot_Channel6,
.stream = DShot_Stream5,
.dma_base = STM32_DMA2_BASE,
.dmamap = DMAMAP_TIM1_UP,
.start_ccr_register = TIM_DMABASE_CCR1,
.channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */
}
Expand All @@ -78,9 +77,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler1,
.vectorno = STM32_IRQ_TIM4,
.dshot = {
.dma_base = DSHOT_DMA1_BASE,
.channel = DShot_Channel2,
.stream = DShot_Stream6,
.dma_base = STM32_DMA1_BASE,
.dmamap = DMAMAP_TIM4_UP,
.start_ccr_register = TIM_DMABASE_CCR2,
.channels_number = 2u /* CCR2 and CCR3 */
}
Expand Down
13 changes: 6 additions & 7 deletions boards/px4/fmu-v4/src/timer_config.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler0,
.vectorno = STM32_IRQ_TIM1CC,
.dshot = {
.dma_base = DSHOT_DMA2_BASE,
.channel = DShot_Channel6,
.stream = DShot_Stream5,
.dma_base = STM32_DMA2_BASE,
.dmamap = DMAMAP_TIM1_UP,
.start_ccr_register = TIM_DMABASE_CCR1,
.channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */
}
Expand All @@ -79,12 +78,12 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler1,
.vectorno = STM32_IRQ_TIM4,
.dshot = {
.dma_base = DSHOT_DMA1_BASE,
.channel = DShot_Channel2,
.stream = DShot_Stream6,
.dma_base = STM32_DMA1_BASE,
.dmamap = DMAMAP_TIM4_UP,
.start_ccr_register = TIM_DMABASE_CCR2,
.channels_number = 2u /* CCR2 and CCR3 */
.channels_number = 2u // CCR2 and CCR3
}

}
};

Expand Down
5 changes: 2 additions & 3 deletions boards/px4/fmu-v5/src/timer_config.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,8 @@ __EXPORT const io_timers_t io_timers[MAX_IO_TIMERS] = {
.handler = io_timer_handler0,
.vectorno = STM32_IRQ_TIM1CC,
.dshot = {
.dma_base = DSHOT_DMA2_BASE,
.channel = DShot_Channel6,
.stream = DShot_Stream5,
.dma_base = STM32_DMA2_BASE,
.dmamap = DMAMAP_TIM1_UP,
.start_ccr_register = TIM_DMABASE_CCR1,
.channels_number = 4u /* CCR1, CCR2, CCR3 and CCR4 */
}
Expand Down
Loading

0 comments on commit f4ee914

Please sign in to comment.