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FMUv5: Swap debug and PX4 IO serial ports to avoid DMA channel issues #8978

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Apr 4, 2018
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6 changes: 6 additions & 0 deletions ROMFS/px4fmu_common/init.d/rcS
Original file line number Diff line number Diff line change
Expand Up @@ -552,6 +552,12 @@ then
mavlink start -r 20000 -b 921600 -d /dev/ttyS0
fi

# Use ttyS3 (TELEM4) for MAVLink on FMUv5 in addition to ttyS1 (TELEM1) and ttyS2 (TELEM2)
if ver hwcmp PX4FMU_V5
then
mavlink start -r 2000 -b 57600 -d /dev/ttyS3
fi

if ver hwcmp AEROFC_V1
then
set MAVLINK_F "-r 1200 -d /dev/ttyS3"
Expand Down
6 changes: 3 additions & 3 deletions platforms/nuttx/nuttx-configs/px4fmu-v5/nsh/defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -174,7 +174,7 @@ CONFIG_UART4_RXDMA=y
# CONFIG_USART6_RS485 is not set
CONFIG_USART6_RXDMA=y
# CONFIG_UART7_RS485 is not set
CONFIG_UART7_RXDMA=y
# CONFIG_UART7_RXDMA is not set
# CONFIG_UART8_RS485 is not set
CONFIG_UART8_RXDMA=y
CONFIG_SERIAL_DISABLE_REORDERING=y
Expand Down Expand Up @@ -835,8 +835,8 @@ CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
# CONFIG_USART3_SERIAL_CONSOLE is not set
# CONFIG_UART4_SERIAL_CONSOLE is not set
# CONFIG_USART6_SERIAL_CONSOLE is not set
# CONFIG_UART7_SERIAL_CONSOLE is not set
CONFIG_UART8_SERIAL_CONSOLE=y
CONFIG_UART7_SERIAL_CONSOLE=y
# CONFIG_UART8_SERIAL_CONSOLE is not set
# CONFIG_OTHER_SERIAL_CONSOLE is not set
# CONFIG_NO_SERIAL_CONSOLE is not set

Expand Down
36 changes: 26 additions & 10 deletions src/drivers/boards/px4fmu-v5/board_config.h
Original file line number Diff line number Diff line change
Expand Up @@ -56,15 +56,15 @@
/* PX4IO connection configuration */

#define BOARD_USES_PX4IO_VERSION 2
#define PX4IO_SERIAL_DEVICE "/dev/ttyS5"
#define PX4IO_SERIAL_TX_GPIO GPIO_UART7_TX
#define PX4IO_SERIAL_RX_GPIO GPIO_UART7_RX
#define PX4IO_SERIAL_BASE STM32_UART7_BASE /* hardwired on the board */
#define PX4IO_SERIAL_VECTOR STM32_IRQ_UART7
#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_UART7_TX
#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_UART7_RX
#define PX4IO_SERIAL_DEVICE "/dev/ttyS6"
#define PX4IO_SERIAL_TX_GPIO GPIO_UART8_TX
#define PX4IO_SERIAL_RX_GPIO GPIO_UART8_RX
#define PX4IO_SERIAL_BASE STM32_UART8_BASE /* hardwired on the board */
#define PX4IO_SERIAL_VECTOR STM32_IRQ_UART8
#define PX4IO_SERIAL_TX_DMAMAP DMAMAP_UART8_TX
#define PX4IO_SERIAL_RX_DMAMAP DMAMAP_UART8_RX
#define PX4IO_SERIAL_RCC_REG STM32_RCC_APB1ENR
#define PX4IO_SERIAL_RCC_EN RCC_APB1ENR_UART7EN
#define PX4IO_SERIAL_RCC_EN RCC_APB1ENR_UART8EN
#define PX4IO_SERIAL_CLOCK STM32_PCLK1_FREQUENCY
#define PX4IO_SERIAL_BITRATE 1500000 /* 1.5Mbps -> max rate for IO */

Expand Down Expand Up @@ -360,10 +360,14 @@
*/
#define GPIO_TIM2_CH1_IN /* PA5 T22C1 FMU_CAP1 */ GPIO_TIM2_CH1IN_3
#define GPIO_TIM2_CH2_IN /* PB3 T22C2 FMU_CAP2 */ GPIO_TIM2_CH2IN_2
#define GPIO_TIM2_CH4_IN /* PB1 T22C4 FMU_CAP3 */ GPIO_TIM2_CH4IN_2
#define GPIO_TIM2_CH4_IN /* PB11 T22C4 FMU_CAP3 */ GPIO_TIM2_CH4IN_2

#define DIRECT_PWM_CAPTURE_CHANNELS 3

/* TIM5_CH4 SPARE PIN */
#define GPIO_TIM5_CH4IN /* PI0 T5C4 TIM5_SPARE_4 */ GPIO_TIM5_CH4IN_2
#define GPIO_TIM5_CH4OUT /* PI0 T5C4 TIM5_SPARE_4 */ GPIO_TIM5_CH4OUT_2

/* PWM
*
* 8 PWM outputs are configured.
Expand Down Expand Up @@ -517,10 +521,22 @@
#define GPIO_PPM_IN /* PI5 T8C1 */ GPIO_TIM8_CH1IN_2

#define RC_UXART_BASE STM32_USART6_BASE /* NOT FMUv5 test HW ONLY*/
#define RC_SERIAL_PORT "/dev/ttyS4" /* NOT FMUv5 test HW ONLY*/

#define GPS_DEFAULT_UART_PORT "/dev/ttyS0" /* UART1 on FMUv5 */

/* Input Capture Channels. */
#define INPUT_CAP1_TIMER 2
#define INPUT_CAP1_CHANNEL /* T4C1 */ 1
#define GPIO_INPUT_CAP1 /* PA5 */ GPIO_TIM2_CH1_IN

#define INPUT_CAP2_TIMER 2
#define INPUT_CAP2_CHANNEL /* T4C2 */ 2
#define GPIO_INPUT_CAP2 /* PB3 */ GPIO_TIM2_CH2_IN

#define INPUT_CAP3_TIMER 2
#define INPUT_CAP3_CHANNEL /* T4C4 */ 4
#define GPIO_INPUT_CAP3 /* PB11 */ GPIO_TIM2_CH4_IN

/* PWM input driver. Use FMU AUX5 pins attached to timer4 channel 2 */
#define PWMIN_TIMER 4
#define PWMIN_TIMER_CHANNEL /* T4C2 */ 2
Expand Down
40 changes: 22 additions & 18 deletions src/modules/px4iofirmware/controls.c
Original file line number Diff line number Diff line change
Expand Up @@ -230,24 +230,6 @@ controls_tick()
rssi = 0;
}

perf_begin(c_gather_dsm);
bool dsm_updated, st24_updated, sumd_updated;
(void)dsm_port_input(&rssi, &dsm_updated, &st24_updated, &sumd_updated);

if (dsm_updated) {
PX4_ATOMIC_MODIFY_OR(r_status_flags, PX4IO_P_STATUS_FLAGS_RC_DSM);
}

if (st24_updated) {
PX4_ATOMIC_MODIFY_OR(r_status_flags, PX4IO_P_STATUS_FLAGS_RC_ST24);
}

if (sumd_updated) {
PX4_ATOMIC_MODIFY_OR(r_status_flags, PX4IO_P_STATUS_FLAGS_RC_SUMD);
}

perf_end(c_gather_dsm);

perf_begin(c_gather_sbus);

bool sbus_failsafe, sbus_frame_drop;
Expand Down Expand Up @@ -300,6 +282,28 @@ controls_tick()

perf_end(c_gather_ppm);

bool dsm_updated = false, st24_updated = false, sumd_updated = false;

if (!((r_status_flags & PX4IO_P_STATUS_FLAGS_RC_SBUS) || (r_status_flags & PX4IO_P_STATUS_FLAGS_RC_PPM))) {
perf_begin(c_gather_dsm);

(void)dsm_port_input(&rssi, &dsm_updated, &st24_updated, &sumd_updated);

if (dsm_updated) {
PX4_ATOMIC_MODIFY_OR(r_status_flags, PX4IO_P_STATUS_FLAGS_RC_DSM);
}

if (st24_updated) {
PX4_ATOMIC_MODIFY_OR(r_status_flags, PX4IO_P_STATUS_FLAGS_RC_ST24);
}

if (sumd_updated) {
PX4_ATOMIC_MODIFY_OR(r_status_flags, PX4IO_P_STATUS_FLAGS_RC_SUMD);
}

perf_end(c_gather_dsm);
}

/* limit number of channels to allowable data size */
if (r_raw_rc_count > PX4IO_RC_INPUT_CHANNELS) {
r_raw_rc_count = PX4IO_RC_INPUT_CHANNELS;
Expand Down