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[bot] AutoMerging: merge all upstream's changes:
* https://github.com/coolsnowwolf/lede: rockchip: force enable rk3568 msi interrupt rockchip: update rk3568 pcie2x1 dts part kernel: package mhi pci driver linux-firmware: package ath11k consumer cards firmware linux-firmware: update to 20221109
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -8,12 +8,12 @@ | |
| include $(TOPDIR)/rules.mk | ||
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| PKG_NAME:=linux-firmware | ||
| PKG_VERSION:=20221012 | ||
| PKG_RELEASE:=1 | ||
| PKG_VERSION:=20221109 | ||
| PKG_RELEASE:=2 | ||
|
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| PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware | ||
| PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz | ||
| PKG_HASH:=e9d174af729511c8cccb60ec4e0b223b3c44b67d813b42d1ab9813acfa667fa5 | ||
| PKG_HASH:=c0ddffbbcf30f2e015bddd5c6d3ce1f13976b906aceabda4a57e3c41a3190701 | ||
|
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| PKG_MAINTAINER:=Felix Fietkau <[email protected]> | ||
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||
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||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,23 @@ | ||
| Package/ath11k-firmware-qca6390 = $(call Package/firmware-default,QCA6390 ath11k firmware) | ||
| define Package/ath11k-firmware-qca6390/install | ||
| $(INSTALL_DIR) $(1)/lib/firmware/ath11k/QCA6390/hw2.0 | ||
| $(INSTALL_DATA) \ | ||
| $(PKG_BUILD_DIR)/ath11k/QCA6390/hw2.0/* $(1)/lib/firmware/ath11k/QCA6390/hw2.0/ | ||
| endef | ||
| $(eval $(call BuildPackage,ath11k-firmware-qca6390)) | ||
|
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||
| Package/ath11k-firmware-wcn6750 = $(call Package/firmware-default,WCN6750 ath11k firmware) | ||
| define Package/ath11k-firmware-wcn6750/install | ||
| $(INSTALL_DIR) $(1)/lib/firmware/ath11k/WCN6750/hw1.0 | ||
| $(INSTALL_DATA) \ | ||
| $(PKG_BUILD_DIR)/ath11k/WCN6750/hw1.0/* $(1)/lib/firmware/ath11k/WCN6750/hw1.0/ | ||
| endef | ||
| $(eval $(call BuildPackage,ath11k-firmware-wcn6750)) | ||
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||
| Package/ath11k-firmware-wcn6855 = $(call Package/firmware-default,WCN6855 ath11k firmware) | ||
| define Package/ath11k-firmware-wcn6855/install | ||
| $(INSTALL_DIR) $(1)/lib/firmware/ath11k/WCN6855/hw2.0 | ||
| $(INSTALL_DATA) \ | ||
| $(PKG_BUILD_DIR)/ath11k/WCN6855/hw2.0/* $(1)/lib/firmware/ath11k/WCN6855/hw2.0/ | ||
| endef | ||
| $(eval $(call BuildPackage,ath11k-firmware-wcn6855)) |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -1284,22 +1284,37 @@ endef | |
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| $(eval $(call KernelPackage,qcom-qmi-helpers)) | ||
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| define KernelPackage/mhi | ||
| define KernelPackage/mhi-bus | ||
| SUBMENU:=$(OTHER_MENU) | ||
| TITLE:=Modem Host Interface (MHI) bus | ||
| TITLE:=MHI bus | ||
| DEPENDS:=@(LINUX_5_15||LINUX_6_1) | ||
| KCONFIG:=CONFIG_MHI_BUS \ | ||
| CONFIG_MHI_BUS_DEBUG=y \ | ||
| CONFIG_MHI_BUS_PCI_GENERIC=n \ | ||
| CONFIG_MHI_NET=n | ||
| CONFIG_MHI_BUS_DEBUG=y | ||
| FILES:= \ | ||
| $(LINUX_DIR)/drivers/bus/mhi/core/[email protected] \ | ||
| $(LINUX_DIR)/drivers/bus/mhi/host/[email protected] | ||
| $(LINUX_DIR)/drivers/bus/mhi/core/[email protected] \ | ||
| $(LINUX_DIR)/drivers/bus/mhi/host/[email protected] | ||
| AUTOLOAD:=$(call AutoProbe,mhi) | ||
| endef | ||
|
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||
| define KernelPackage/mhi/description | ||
| Bus driver for MHI protocol. | ||
| define KernelPackage/mhi-bus/description | ||
| Kernel module for the Qualcomm MHI bus. | ||
| endef | ||
|
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||
| $(eval $(call KernelPackage,mhi)) | ||
| $(eval $(call KernelPackage,mhi-bus)) | ||
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| define KernelPackage/mhi-pci-generic | ||
| SUBMENU:=$(OTHER_MENU) | ||
| TITLE:=MHI PCI controller driver | ||
| DEPENDS:=@(LINUX_5_15||LINUX_6_1) +kmod-mhi-bus | ||
| KCONFIG:=CONFIG_MHI_BUS_PCI_GENERIC | ||
| FILES:= \ | ||
| $(LINUX_DIR)/drivers/bus/mhi/[email protected] \ | ||
| $(LINUX_DIR)/drivers/bus/mhi/host/[email protected] | ||
| AUTOLOAD:=$(call AutoProbe,mhi_pci_generic) | ||
| endef | ||
|
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||
| define KernelPackage/mhi-pci-generic/description | ||
| Kernel module for the MHI PCI controller driver. | ||
| endef | ||
|
|
||
| $(eval $(call KernelPackage,mhi-pci-generic)) | ||
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40 changes: 40 additions & 0 deletions
40
target/linux/rockchip/patches-5.15/109-arm64-dts-rockchip-rk356x-Fix-PCIe-register-map.patch
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,40 @@ | ||
| From 0cdf37b755feda3aaceb749750613b5e563e7284 Mon Sep 17 00:00:00 2001 | ||
| From: Andrew Powers-Holmes <[email protected]> | ||
| Date: Sat, 12 Nov 2022 22:41:26 +1100 | ||
| Subject: [PATCH] arm64: dts: rockchip: rk356x: Fix PCIe register and | ||
| range mappings | ||
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| The register and range mappings for the PCIe controller in Rockchip's | ||
| RK356x SoCs are incorrect. Replace them with corrected values from the | ||
| vendor BSP sources, updated to match current DT schema. | ||
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| Tested-by: Ondrej Jirman <[email protected]> | ||
| Signed-off-by: Andrew Powers-Holmes <[email protected]> | ||
| --- | ||
| arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++++++++------ | ||
| arch/arm64/boot/dts/rockchip/rk356x.dtsi | 7 ++++--- | ||
| 2 files changed, 12 insertions(+), 9 deletions(-) | ||
|
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| --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi | ||
| +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi | ||
| @@ -707,7 +707,7 @@ pcie2x1: pcie@fe260000 { | ||
| compatible = "rockchip,rk3568-pcie"; | ||
| reg = <0x3 0xc0000000 0x0 0x00400000>, | ||
| <0x0 0xfe260000 0x0 0x00010000>, | ||
| - <0x3 0x3f000000 0x0 0x01000000>; | ||
| + <0x0 0xf4000000 0x0 0x00100000>; | ||
| reg-names = "dbi", "apb", "config"; | ||
| interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, | ||
| <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, | ||
| @@ -736,8 +736,9 @@ pcie2x1: pcie@fe260000 { | ||
| phys = <&combphy2 PHY_TYPE_PCIE>; | ||
| phy-names = "pcie-phy"; | ||
| power-domains = <&power RK3568_PD_PIPE>; | ||
| - ranges = <0x01000000 0x0 0x3ef00000 0x3 0x3ef00000 0x0 0x00100000 | ||
| - 0x02000000 0x0 0x00000000 0x3 0x00000000 0x0 0x3ef00000>; | ||
| + ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>, | ||
| + <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x01e00000>, | ||
| + <0x03000000 0x0 0x40000000 0x3 0x00000000 0x0 0x40000000>; | ||
| resets = <&cru SRST_PCIE20_POWERUP>; | ||
| reset-names = "pipe"; | ||
| #address-cells = <3>; |
94 changes: 94 additions & 0 deletions
94
target/linux/rockchip/patches-5.15/110-arm64-rk3568-update-gicv3-its-and-pci-msi-map.patch
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,94 @@ | ||
| --- a/arch/arm64/Kconfig | ||
| +++ b/arch/arm64/Kconfig | ||
| @@ -899,6 +899,14 @@ config SOCIONEXT_SYNQUACER_PREITS | ||
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| If unsure, say Y. | ||
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| +config ROCKCHIP_ERRATUM_114514 | ||
| + bool "Rockchip RK3568 force no_local_cache" | ||
| + default y | ||
| + help | ||
| + They consider this as a SoC implement design instead of a bug. | ||
| + | ||
| + If unsure, say Y. | ||
| + | ||
| endmenu | ||
|
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|
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| --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi | ||
| +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi | ||
| @@ -64,7 +64,7 @@ | ||
| compatible = "rockchip,rk3568-pcie"; | ||
| #address-cells = <3>; | ||
| #size-cells = <2>; | ||
| - bus-range = <0x0 0xf>; | ||
| + bus-range = <0x10 0x1f>; | ||
| clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>, | ||
| <&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>, | ||
| <&cru CLK_PCIE30X1_AUX_NDFT>; | ||
| @@ -87,7 +87,7 @@ | ||
| num-ib-windows = <6>; | ||
| num-ob-windows = <2>; | ||
| max-link-speed = <3>; | ||
| - msi-map = <0x0 &gic 0x1000 0x1000>; | ||
| + msi-map = <0x1000 &its 0x1000 0x1000>; | ||
| num-lanes = <1>; | ||
| phys = <&pcie30phy>; | ||
| phy-names = "pcie-phy"; | ||
| @@ -116,7 +116,7 @@ | ||
| compatible = "rockchip,rk3568-pcie"; | ||
| #address-cells = <3>; | ||
| #size-cells = <2>; | ||
| - bus-range = <0x0 0xf>; | ||
| + bus-range = <0x20 0x2f>; | ||
| clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>, | ||
| <&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>, | ||
| <&cru CLK_PCIE30X2_AUX_NDFT>; | ||
| @@ -139,7 +139,7 @@ | ||
| num-ib-windows = <6>; | ||
| num-ob-windows = <2>; | ||
| max-link-speed = <3>; | ||
| - msi-map = <0x0 &gic 0x2000 0x1000>; | ||
| + msi-map = <0x2000 &its 0x2000 0x1000>; | ||
| num-lanes = <2>; | ||
| phys = <&pcie30phy>; | ||
| phy-names = "pcie-phy"; | ||
| --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi | ||
| +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi | ||
| @@ -260,14 +260,21 @@ | ||
|
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| gic: interrupt-controller@fd400000 { | ||
| compatible = "arm,gic-v3"; | ||
| + #interrupt-cells = <3>; | ||
| + #address-cells = <2>; | ||
| + #size-cells = <2>; | ||
| + ranges; | ||
| + interrupt-controller; | ||
| + | ||
| reg = <0x0 0xfd400000 0 0x10000>, /* GICD */ | ||
| - <0x0 0xfd460000 0 0x80000>; /* GICR */ | ||
| + <0x0 0xfd460000 0 0xc0000>; /* GICR */ | ||
| interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; | ||
| - interrupt-controller; | ||
| - #interrupt-cells = <3>; | ||
| - mbi-alias = <0x0 0xfd410000>; | ||
| - mbi-ranges = <296 24>; | ||
| - msi-controller; | ||
| + its: interrupt-controller@fd440000 { | ||
| + compatible = "arm,gic-v3-its"; | ||
| + msi-controller; | ||
| + #msi-cells = <1>; | ||
| + reg = <0x0 0xfd440000 0x0 0x20000>; | ||
| + }; | ||
| }; | ||
|
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| usb_host0_ehci: usb@fd800000 { | ||
| @@ -731,7 +738,7 @@ | ||
| num-ib-windows = <6>; | ||
| num-ob-windows = <2>; | ||
| max-link-speed = <2>; | ||
| - msi-map = <0x0 &gic 0x0 0x1000>; | ||
| + msi-map = <0x0 &its 0x0 0x1000>; | ||
| num-lanes = <1>; | ||
| phys = <&combphy2 PHY_TYPE_PCIE>; | ||
| phy-names = "pcie-phy"; |
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