update; change png to jpg, and using smaller figures

Qinka · Mar 13, 2017 · 4eeb98c · 4eeb98c
1 parent b2ad850
commit 4eeb98c
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Showing 15 changed files with 14 additions and 14 deletions.
diff --git a/.../fpga.nexys-3-2.png.imgnexys-3-2.png.json → .../fpga.nexys-3-2.jpg.imgnexys-3-2.jpg.json b/.../fpga.nexys-3-2.png.imgnexys-3-2.png.json → .../fpga.nexys-3-2.jpg.imgnexys-3-2.jpg.json
@@ -1 +1 @@
-{"summary":{"Right":""},"path":"/img/fpga/nexys-3-2.png","whose":"Qinka","create-time":"2017-03-13T14:25:00.0904661Z","binary":"img/fpga/nexys-3-2.png","id":"fpga.nexys-3-2.png.imgnexys-3-2.png","title":"Nexys 3 (2)","type":"binary","tags":["FPGA","Get Start"]}
+{"summary":{"Right":""},"path":"/img/fpga/nexys-3-2.jpg","whose":"Qinka","create-time":"2017-03-13T14:25:00.0904661Z","binary":"img/fpga/nexys-3-2.jpg","id":"fpga.nexys-3-2.jpg.imgnexys-3-2.jpg","title":"Nexys 3 (2)","type":"binary","tags":["FPGA","Get Start"]}
diff --git a/.infos/fpga.nexys-3-3.jpg.imgnexys-3-3.jpg.json b/.infos/fpga.nexys-3-3.jpg.imgnexys-3-3.jpg.json
@@ -0,0 +1 @@
+{"summary":{"Right":""},"path":"/img/fpga/nexys-3-3.jpg","whose":"Qinka","create-time":"2017-03-13T14:25:01.0945786Z","binary":"img/fpga/nexys-3-3.jpg","id":"fpga.nexys-3-3.jpgx.imgnexys-3-3.jpg","title":"Nexys 3 (3)","type":"binary","tags":["FPGA","Get Start"]}
diff --git a/.infos/fpga.nexys-3-3.png.imgnexys-3-3.png.json b/.infos/fpga.nexys-3-3.png.imgnexys-3-3.png.json
diff --git a/img/fpga/adder-dc.JPG b/img/fpga/adder-dc.JPG
diff --git a/img/fpga/full-adder-dc.jpg b/img/fpga/full-adder-dc.jpg
diff --git a/img/fpga/half-adder-dc.jpg b/img/fpga/half-adder-dc.jpg
diff --git a/img/fpga/io-ports.JPG b/img/fpga/io-ports.JPG
diff --git a/img/fpga/nexys-3-1.jpg b/img/fpga/nexys-3-1.jpg
diff --git a/img/fpga/nexys-3-2.jpg b/img/fpga/nexys-3-2.jpg
diff --git a/img/fpga/nexys-3-2.png b/img/fpga/nexys-3-2.png
diff --git a/img/fpga/nexys-3-3.jpg b/img/fpga/nexys-3-3.jpg
diff --git a/img/fpga/nexys-3-3.png b/img/fpga/nexys-3-3.png
diff --git a/img/fpga/show.jpg b/img/fpga/show.jpg
diff --git a/post-fpga.mk b/post-fpga.mk
@@ -98,44 +98,44 @@ fpga.nexys-3-1.jpg.imgnexys-3-1.jpg.del:
 		 $(SITE_URL)/img/fpga/nexys-3-1.jpg  |  $(IH_PATH) -m  -f '$(IH_DELAY)' -p '$(PRIVATE_KEY)' -d '$(SITE_DELTA)' -v | $(SHELL)
 
 
-fpga.nexys-3-2.png.imgnexys-3-2.png: img/fpga/nexys-3-2.png 
+fpga.nexys-3-2.jpg.imgnexys-3-2.jpg: img/fpga/nexys-3-2.jpg 
 	@$(ECHO) $(CURL_PATH) $(CURL_DETAIL)  -X PUT  \
 		' -F "type=binary" ' \
 		' -F "create-time=2017-03-13 14:25:00.0904661 UTC" ' \
 		' -F "update-time=$(IH_NOW)" ' \
 		' -F "title=Nexys 3 (2)" ' \
-		' -F "binary=@img/fpga/nexys-3-2.png" ' \
+		' -F "binary=@img/fpga/nexys-3-2.jpg" ' \
 		' -F "sha-file-name=/`$(MD5) $(PRIVATE_KEY).pub`" ' \
 		' -F "whose=Qinka" ' \
 		' -F "tag=FPGA" ' \
 		' -F "tag=Get Start" ' \
-		 $(SITE_URL)/img/fpga/nexys-3-2.png  |  $(IH_PATH) -m  -f '$(IH_DELAY)' -p '$(PRIVATE_KEY)' -d '$(SITE_DELTA)' -v | $(SHELL)
+		 $(SITE_URL)/img/fpga/nexys-3-2.jpg  |  $(IH_PATH) -m  -f '$(IH_DELAY)' -p '$(PRIVATE_KEY)' -d '$(SITE_DELTA)' -v | $(SHELL)
 
-fpga.nexys-3-2.png.imgnexys-3-2.png.del:
+fpga.nexys-3-2.jpg.imgnexys-3-2.jpg.del:
 	@$(ECHO) $(CURL_PATH) $(CURL_DETAIL)  -X DELETE  \
 		' -F "type=binary" ' \
 		' -F "sha-file-name=/`$(MD5) $(PRIVATE_KEY).pub`" ' \
-		 $(SITE_URL)/img/fpga/nexys-3-2.png  |  $(IH_PATH) -m  -f '$(IH_DELAY)' -p '$(PRIVATE_KEY)' -d '$(SITE_DELTA)' -v | $(SHELL)
+		 $(SITE_URL)/img/fpga/nexys-3-2.jpg  |  $(IH_PATH) -m  -f '$(IH_DELAY)' -p '$(PRIVATE_KEY)' -d '$(SITE_DELTA)' -v | $(SHELL)
 
 
-fpga.nexys-3-3.png.imgnexys-3-3.png: img/fpga/nexys-3-3.png 
+fpga.nexys-3-3.jpg.imgnexys-3-3.jpg: img/fpga/nexys-3-3.jpg 
 	@$(ECHO) $(CURL_PATH) $(CURL_DETAIL)  -X PUT  \
 		' -F "type=binary" ' \
 		' -F "create-time=2017-03-13 14:25:01.0945786 UTC" ' \
 		' -F "update-time=$(IH_NOW)" ' \
 		' -F "title=Nexys 3 (3)" ' \
-		' -F "binary=@img/fpga/nexys-3-3.png" ' \
+		' -F "binary=@img/fpga/nexys-3-3.jpg" ' \
 		' -F "sha-file-name=/`$(MD5) $(PRIVATE_KEY).pub`" ' \
 		' -F "whose=Qinka" ' \
 		' -F "tag=FPGA" ' \
 		' -F "tag=Get Start" ' \
-		 $(SITE_URL)/img/fpga/nexys-3-3.png  |  $(IH_PATH) -m  -f '$(IH_DELAY)' -p '$(PRIVATE_KEY)' -d '$(SITE_DELTA)' -v | $(SHELL)
+		 $(SITE_URL)/img/fpga/nexys-3-3.jpg  |  $(IH_PATH) -m  -f '$(IH_DELAY)' -p '$(PRIVATE_KEY)' -d '$(SITE_DELTA)' -v | $(SHELL)
 
-fpga.nexys-3-3.png.imgnexys-3-3.png.del:
+fpga.nexys-3-3.jpg.imgnexys-3-3.jpg.del:
 	@$(ECHO) $(CURL_PATH) $(CURL_DETAIL)  -X DELETE  \
 		' -F "type=binary" ' \
 		' -F "sha-file-name=/`$(MD5) $(PRIVATE_KEY).pub`" ' \
-		 $(SITE_URL)/img/fpga/nexys-3-3.png  |  $(IH_PATH) -m  -f '$(IH_DELAY)' -p '$(PRIVATE_KEY)' -d '$(SITE_DELTA)' -v | $(SHELL)
+		 $(SITE_URL)/img/fpga/nexys-3-3.jpg  |  $(IH_PATH) -m  -f '$(IH_DELAY)' -p '$(PRIVATE_KEY)' -d '$(SITE_DELTA)' -v | $(SHELL)
 
 
 fpga.show.jpg.imgshow.jpg: img/fpga/show.jpg 

diff --git a/post/fpga/get-started.md b/post/fpga/get-started.md
@@ -24,9 +24,9 @@ According to the manual, the features of this borad include:
 
 This is the peripheral device of the Nexys 3:
 
-  ![Nexys 3 (2) ((C) Digilient)](/img/fpga/nexys-3-2.png)
+  ![Nexys 3 (2) ((C) Digilient)](/img/fpga/nexys-3-2.jpg)
 
-  ![Nexys 3 (3) ((C) Digilient)](/img/fpga/nexys-3-3.png)
+  ![Nexys 3 (3) ((C) Digilient)](/img/fpga/nexys-3-3.jpg)
 
 ## ISE Design Suite
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		{"summary":{"Right":""},"path":"/img/fpga/nexys-3-2.png","whose":"Qinka","create-time":"2017-03-13T14:25:00.0904661Z","binary":"img/fpga/nexys-3-2.png","id":"fpga.nexys-3-2.png.imgnexys-3-2.png","title":"Nexys 3 (2)","type":"binary","tags":["FPGA","Get Start"]}
		{"summary":{"Right":""},"path":"/img/fpga/nexys-3-2.jpg","whose":"Qinka","create-time":"2017-03-13T14:25:00.0904661Z","binary":"img/fpga/nexys-3-2.jpg","id":"fpga.nexys-3-2.jpg.imgnexys-3-2.jpg","title":"Nexys 3 (2)","type":"binary","tags":["FPGA","Get Start"]}
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1 @@
		{"summary":{"Right":""},"path":"/img/fpga/nexys-3-3.jpg","whose":"Qinka","create-time":"2017-03-13T14:25:01.0945786Z","binary":"img/fpga/nexys-3-3.jpg","id":"fpga.nexys-3-3.jpgx.imgnexys-3-3.jpg","title":"Nexys 3 (3)","type":"binary","tags":["FPGA","Get Start"]}