rename fixed-point to fixed-sized

Qiskit · May 20, 2021 · 456020a · 456020a
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Showing 3 changed files with 6 additions and 6 deletions.
diff --git a/qiskit/circuit/library/arithmetic/adders/cdkm_ripple_carry_adder.py b/qiskit/circuit/library/arithmetic/adders/cdkm_ripple_carry_adder.py
@@ -95,8 +95,8 @@ def __init__(
                 state :math:`|a\rangle` or :math:`|b\rangle`. The two input
                 registers must have the same number of qubits.
             kind: The kind of adder, can be ``'full'`` for a full adder, ``'half'`` for a half
-                adder, or ``'fixed'`` for a fixed-point adder. A full adder includes both carry-in
-                and carry-out, a half only carry-out, and a fixed-point adder neither carry-in
+                adder, or ``'fixed'`` for a fixed-sized adder. A full adder includes both carry-in
+                and carry-out, a half only carry-out, and a fixed-sized adder neither carry-in
                 nor carry-out.
             name: The name of the circuit object.
         Raises:

diff --git a/qiskit/circuit/library/arithmetic/adders/draper_qft_adder.py b/qiskit/circuit/library/arithmetic/adders/draper_qft_adder.py
@@ -65,8 +65,8 @@ def __init__(
                 state :math:`|a\rangle` or :math:`|b\rangle`. The two input
                 registers must have the same number of qubits.
             kind: The kind of adder, can be ``'half'`` for a half adder or
-                ``'fixed'`` for a fixed-point adder. A half adder contains a carry-out to represent
-                the most-significant bit, but the fixed-point adder doesn't and hence performs
+                ``'fixed'`` for a fixed-sized adder. A half adder contains a carry-out to represent
+                the most-significant bit, but the fixed-sized adder doesn't and hence performs
                 addition modulo ``2 ** num_state_qubits``.
             name: The name of the circuit object.
         Raises:

diff --git a/qiskit/circuit/library/arithmetic/adders/vbe_ripple_carry_adder.py b/qiskit/circuit/library/arithmetic/adders/vbe_ripple_carry_adder.py
@@ -64,8 +64,8 @@ def __init__(
         Args:
             num_state_qubits: The size of the register.
             kind: The kind of adder, can be ``'full'`` for a full adder, ``'half'`` for a half
-                adder, or ``'fixed'`` for a fixed-point adder. A full adder includes both carry-in
-                and carry-out, a half only carry-out, and a fixed-point adder neither carry-in
+                adder, or ``'fixed'`` for a fixed-sized adder. A full adder includes both carry-in
+                and carry-out, a half only carry-out, and a fixed-sized adder neither carry-in
                 nor carry-out.
             name: The name of the circuit.