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[WIP] Remove condition/c_if, duration, and unit from instructions #13506

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5 changes: 2 additions & 3 deletions crates/accelerate/src/barrier_before_final_measurement.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,6 @@ use hashbrown::HashSet;
use pyo3::prelude::*;
use rustworkx_core::petgraph::stable_graph::NodeIndex;

use qiskit_circuit::circuit_instruction::ExtraInstructionAttributes;
use qiskit_circuit::dag_circuit::{DAGCircuit, NodeType};
use qiskit_circuit::imports::BARRIER;
use qiskit_circuit::operations::{Operation, PyInstruction};
Expand Down Expand Up @@ -92,7 +91,7 @@ pub fn barrier_before_final_measurements(
qargs.as_slice(),
&[],
None,
ExtraInstructionAttributes::new(label, None, None, None),
label,
Some(new_barrier.unbind()),
)?;
}
Expand All @@ -104,7 +103,7 @@ pub fn barrier_before_final_measurements(
qargs.as_slice(),
&[],
None,
ExtraInstructionAttributes::new(label, None, None, None),
label,
)?;
}
for inst in final_packed_ops {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,7 @@ pub(super) fn compose_transforms<'a>(
} else {
Some(gate_obj.params)
},
gate_obj.extra_attrs,
gate_obj.label.map(|x| *x),
#[cfg(feature = "cache_pygates")]
Some(gate.into()),
)?;
Expand Down
27 changes: 6 additions & 21 deletions crates/accelerate/src/basis/basis_translator/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -481,7 +481,7 @@ fn apply_translation(
} else {
Some(new_op.params)
},
new_op.extra_attrs,
new_op.label.map(|x| *x),
#[cfg(feature = "cache_pygates")]
None,
)?;
Expand All @@ -502,7 +502,7 @@ fn apply_translation(
.collect(),
)
},
node_obj.extra_attrs.clone(),
node_obj.label.as_ref().map(|x| x.as_ref().clone()),
#[cfg(feature = "cache_pygates")]
None,
)?;
Expand Down Expand Up @@ -530,7 +530,7 @@ fn apply_translation(
.collect(),
)
},
node_obj.extra_attrs.clone(),
node_obj.label.as_ref().map(|x| x.as_ref().clone()),
#[cfg(feature = "cache_pygates")]
None,
)?;
Expand All @@ -554,7 +554,7 @@ fn apply_translation(
.collect(),
)
},
node_obj.extra_attrs.clone(),
node_obj.label.as_ref().map(|x| x.as_ref().clone()),
#[cfg(feature = "cache_pygates")]
None,
)?;
Expand Down Expand Up @@ -626,27 +626,12 @@ fn replace_node(
} else {
inner_node.op.clone()
};
if node.condition().is_some() {
match new_op.view() {
OperationRef::Gate(gate) => {
gate.gate.setattr(py, "condition", node.condition())?
}
OperationRef::Instruction(inst) => {
inst.instruction
.setattr(py, "condition", node.condition())?
}
OperationRef::Operation(oper) => {
oper.operation.setattr(py, "condition", node.condition())?
}
_ => (),
}
}
let new_params: SmallVec<[Param; 3]> = inner_node
.params_view()
.iter()
.map(|param| param.clone_ref(py))
.collect();
let new_extra_props = node.extra_attrs.clone();
let new_extra_props = node.label.as_ref().map(|x| x.as_ref().clone());
dag.apply_operation_back(
py,
new_op,
Expand Down Expand Up @@ -761,7 +746,7 @@ fn replace_node(
} else {
Some(new_params)
},
inner_node.extra_attrs.clone(),
inner_node.label.as_ref().map(|x| x.as_ref().clone()),
#[cfg(feature = "cache_pygates")]
None,
)?;
Expand Down
2 changes: 0 additions & 2 deletions crates/accelerate/src/commutation_analysis.rs
Original file line number Diff line number Diff line change
Expand Up @@ -95,12 +95,10 @@ pub(crate) fn analyze_commutations_inner(
py,
&op1,
params1,
&packed_inst0.extra_attrs,
qargs1,
cargs1,
&op2,
params2,
&packed_inst1.extra_attrs,
qargs2,
cargs2,
MAX_NUM_QUBITS,
Expand Down
18 changes: 2 additions & 16 deletions crates/accelerate/src/commutation_checker.rs
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ use pyo3::prelude::*;
use pyo3::types::{IntoPyDict, PyBool, PyDict, PySequence, PyTuple};

use qiskit_circuit::bit_data::BitData;
use qiskit_circuit::circuit_instruction::{ExtraInstructionAttributes, OperationFromPython};
use qiskit_circuit::circuit_instruction::OperationFromPython;
use qiskit_circuit::dag_node::DAGOpNode;
use qiskit_circuit::imports::QI_OPERATOR;
use qiskit_circuit::operations::OperationRef::{Gate as PyGateType, Operation as PyOperationType};
Expand Down Expand Up @@ -149,12 +149,10 @@ impl CommutationChecker {
py,
&op1.instruction.operation.view(),
&op1.instruction.params,
&op1.instruction.extra_attrs,
&qargs1,
&cargs1,
&op2.instruction.operation.view(),
&op2.instruction.params,
&op2.instruction.extra_attrs,
&qargs2,
&cargs2,
max_num_qubits,
Expand Down Expand Up @@ -190,12 +188,10 @@ impl CommutationChecker {
py,
&op1.operation.view(),
&op1.params,
&op1.extra_attrs,
&qargs1,
&cargs1,
&op2.operation.view(),
&op2.params,
&op2.extra_attrs,
&qargs2,
&cargs2,
max_num_qubits,
Expand Down Expand Up @@ -260,12 +256,10 @@ impl CommutationChecker {
py: Python,
op1: &OperationRef,
params1: &[Param],
attrs1: &ExtraInstructionAttributes,
qargs1: &[Qubit],
cargs1: &[Clbit],
op2: &OperationRef,
params2: &[Param],
attrs2: &ExtraInstructionAttributes,
qargs2: &[Qubit],
cargs2: &[Clbit],
max_num_qubits: u32,
Expand Down Expand Up @@ -296,12 +290,10 @@ impl CommutationChecker {
let commutation: Option<bool> = commutation_precheck(
op1,
params1,
attrs1,
qargs1,
cargs1,
op2,
params2,
attrs2,
qargs2,
cargs2,
max_num_qubits,
Expand Down Expand Up @@ -547,21 +539,15 @@ impl CommutationChecker {
fn commutation_precheck(
op1: &OperationRef,
params1: &[Param],
attrs1: &ExtraInstructionAttributes,
qargs1: &[Qubit],
cargs1: &[Clbit],
op2: &OperationRef,
params2: &[Param],
attrs2: &ExtraInstructionAttributes,
qargs2: &[Qubit],
cargs2: &[Clbit],
max_num_qubits: u32,
) -> Option<bool> {
if op1.control_flow()
|| op2.control_flow()
|| attrs1.condition().is_some()
|| attrs2.condition().is_some()
{
if op1.control_flow() || op2.control_flow() {
return Some(false);
}

Expand Down
4 changes: 2 additions & 2 deletions crates/accelerate/src/consolidate_blocks.rs
Original file line number Diff line number Diff line change
Expand Up @@ -116,7 +116,7 @@ pub(crate) fn consolidate_blocks(
let unitary_gate = UNITARY_GATE
.get_bound(py)
.call1((array, py.None(), false))?;
dag.substitute_node_with_py_op(py, inst_node, &unitary_gate, false)?;
dag.substitute_node_with_py_op(py, inst_node, &unitary_gate)?;
continue;
}
}
Expand Down Expand Up @@ -261,7 +261,7 @@ pub(crate) fn consolidate_blocks(
let unitary_gate = UNITARY_GATE
.get_bound(py)
.call1((array, py.None(), false))?;
dag.substitute_node_with_py_op(py, first_inst_node, &unitary_gate, false)?;
dag.substitute_node_with_py_op(py, first_inst_node, &unitary_gate)?;
continue;
}
let qubit = first_qubits[0];
Expand Down
8 changes: 4 additions & 4 deletions crates/accelerate/src/elide_permutations.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,14 +40,14 @@ fn run(py: Python, dag: &mut DAGCircuit) -> PyResult<Option<(DAGCircuit, Vec<usi
let mut new_dag = dag.copy_empty_like(py, "alike")?;
for node_index in dag.topological_op_nodes()? {
if let NodeType::Operation(inst) = &dag.dag()[node_index] {
match (inst.op.name(), inst.condition()) {
("swap", None) => {
match inst.op.name() {
"swap" => {
let qargs = dag.get_qargs(inst.qubits);
let index0 = qargs[0].index();
let index1 = qargs[1].index();
mapping.swap(index0, index1);
}
("permutation", None) => {
"permutation" => {
if let Param::Obj(ref pyobj) = inst.params.as_ref().unwrap()[0] {
let pyarray: PyReadonlyArray1<i32> = pyobj.extract(py)?;
let pattern = pyarray.as_array();
Expand Down Expand Up @@ -88,7 +88,7 @@ fn run(py: Python, dag: &mut DAGCircuit) -> PyResult<Option<(DAGCircuit, Vec<usi
&mapped_qargs,
cargs,
inst.params.as_deref().cloned(),
inst.extra_attrs.clone(),
inst.label.as_ref().map(|x| x.as_ref().clone()),
#[cfg(feature = "cache_pygates")]
inst.py_op.get().map(|x| x.clone_ref(py)),
)?;
Expand Down
5 changes: 2 additions & 3 deletions crates/accelerate/src/gate_direction.rs
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,6 @@ use qiskit_circuit::operations::OperationRef;
use qiskit_circuit::packed_instruction::PackedOperation;
use qiskit_circuit::{
circuit_instruction::CircuitInstruction,
circuit_instruction::ExtraInstructionAttributes,
converters::{circuit_to_dag, QuantumCircuitData},
dag_circuit::{DAGCircuit, NodeType},
dag_node::{DAGNode, DAGOpNode},
Expand Down Expand Up @@ -400,7 +399,7 @@ fn has_calibration_for_op_node(
qubits: py_args.unbind(),
clbits: PyTuple::empty_bound(py).unbind(),
params: packed_inst.params_view().iter().cloned().collect(),
extra_attrs: packed_inst.extra_attrs.clone(),
label: packed_inst.label.clone(),
#[cfg(feature = "cache_pygates")]
py_op: packed_inst.py_op.clone(),
},
Expand Down Expand Up @@ -474,7 +473,7 @@ fn apply_operation_back(
qargs,
&[],
param,
ExtraInstructionAttributes::default(),
None,
#[cfg(feature = "cache_pygates")]
None,
)?;
Expand Down
12 changes: 6 additions & 6 deletions crates/accelerate/src/twirling.rs
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ use rand_pcg::Pcg64Mcg;
use smallvec::SmallVec;

use qiskit_circuit::circuit_data::CircuitData;
use qiskit_circuit::circuit_instruction::{ExtraInstructionAttributes, OperationFromPython};
use qiskit_circuit::circuit_instruction::OperationFromPython;
use qiskit_circuit::converters::dag_to_circuit;
use qiskit_circuit::dag_circuit::DAGCircuit;
use qiskit_circuit::gate_matrix::ONE_QUBIT_IDENTITY;
Expand Down Expand Up @@ -207,7 +207,7 @@ fn twirl_gate(
qubits: bit_zero,
clbits: circ.cargs_interner().get_default(),
params: None,
extra_attrs: ExtraInstructionAttributes::new(None, None, None, None),
label: None,
#[cfg(feature = "cache_pygates")]
py_op: std::sync::OnceLock::new(),
},
Expand All @@ -219,7 +219,7 @@ fn twirl_gate(
qubits: bit_one,
clbits: circ.cargs_interner().get_default(),
params: None,
extra_attrs: ExtraInstructionAttributes::new(None, None, None, None),
label: None,
#[cfg(feature = "cache_pygates")]
py_op: std::sync::OnceLock::new(),
},
Expand All @@ -233,7 +233,7 @@ fn twirl_gate(
qubits: bit_zero,
clbits: circ.cargs_interner().get_default(),
params: None,
extra_attrs: ExtraInstructionAttributes::new(None, None, None, None),
label: None,
#[cfg(feature = "cache_pygates")]
py_op: std::sync::OnceLock::new(),
},
Expand All @@ -245,7 +245,7 @@ fn twirl_gate(
qubits: bit_one,
clbits: circ.cargs_interner().get_default(),
params: None,
extra_attrs: ExtraInstructionAttributes::new(None, None, None, None),
label: None,
#[cfg(feature = "cache_pygates")]
py_op: std::sync::OnceLock::new(),
},
Expand Down Expand Up @@ -359,7 +359,7 @@ fn generate_twirled_circuit(
.map(|x| Param::Obj(x.into_py(py)))
.collect::<SmallVec<[Param; 3]>>(),
)),
extra_attrs: inst.extra_attrs.clone(),
label: inst.label.clone(),
#[cfg(feature = "cache_pygates")]
py_op: std::sync::OnceLock::new(),
};
Expand Down
8 changes: 4 additions & 4 deletions crates/accelerate/src/unitary_synthesis.rs
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ use itertools::Itertools;
use ndarray::prelude::*;
use num_complex::{Complex, Complex64};
use numpy::IntoPyArray;
use qiskit_circuit::circuit_instruction::{ExtraInstructionAttributes, OperationFromPython};
use qiskit_circuit::circuit_instruction::OperationFromPython;
use smallvec::{smallvec, SmallVec};

use pyo3::intern;
Expand Down Expand Up @@ -147,7 +147,7 @@ fn apply_synth_sequence(
qubits: out_dag.qargs_interner.insert(&mapped_qargs),
clbits: out_dag.cargs_interner.get_default(),
params: new_params,
extra_attrs: ExtraInstructionAttributes::default(),
label: None,
#[cfg(feature = "cache_pygates")]
py_op: OnceLock::new(),
};
Expand Down Expand Up @@ -284,7 +284,7 @@ fn py_run_main_loop(
qubits: packed_instr.qubits,
clbits: packed_instr.clbits,
params: (!new_node_op.params.is_empty()).then(|| Box::new(new_node_op.params)),
extra_attrs: new_node_op.extra_attrs,
label: new_node_op.label,
#[cfg(feature = "cache_pygates")]
py_op: new_node.unbind().into(),
};
Expand Down Expand Up @@ -323,7 +323,7 @@ fn py_run_main_loop(
&[qubit],
&[],
Some(new_params),
ExtraInstructionAttributes::default(),
None,
#[cfg(feature = "cache_pygates")]
None,
)?;
Expand Down
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